[x86] fix assert with horizontal math + broadcast of vector (PR43402)
[llvm-core.git] / lib / Target / X86 / Utils / X86ShuffleDecode.h
blobf52785063071adb2f9861d3197ee0e2c6d602af6
1 //===-- X86ShuffleDecode.h - X86 shuffle decode logic -----------*-C++-*---===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Define several functions to decode x86 specific shuffle semantics into a
10 // generic vector mask.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_X86_UTILS_X86SHUFFLEDECODE_H
15 #define LLVM_LIB_TARGET_X86_UTILS_X86SHUFFLEDECODE_H
17 #include "llvm/ADT/APInt.h"
18 #include "llvm/ADT/SmallVector.h"
20 //===----------------------------------------------------------------------===//
21 // Vector Mask Decoding
22 //===----------------------------------------------------------------------===//
24 namespace llvm {
25 template <typename T> class ArrayRef;
27 enum { SM_SentinelUndef = -1, SM_SentinelZero = -2 };
29 /// Decode a 128-bit INSERTPS instruction as a v4f32 shuffle mask.
30 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
32 // Insert the bottom Len elements from a second source into a vector starting at
33 // element Idx.
34 void DecodeInsertElementMask(unsigned NumElts, unsigned Idx, unsigned Len,
35 SmallVectorImpl<int> &ShuffleMask);
37 /// Decode a MOVHLPS instruction as a v2f64/v4f32 shuffle mask.
38 /// i.e. <3,1> or <6,7,2,3>
39 void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask);
41 /// Decode a MOVLHPS instruction as a v2f64/v4f32 shuffle mask.
42 /// i.e. <0,2> or <0,1,4,5>
43 void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask);
45 void DecodeMOVSLDUPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask);
47 void DecodeMOVSHDUPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask);
49 void DecodeMOVDDUPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask);
51 void DecodePSLLDQMask(unsigned NumElts, unsigned Imm,
52 SmallVectorImpl<int> &ShuffleMask);
54 void DecodePSRLDQMask(unsigned NumElts, unsigned Imm,
55 SmallVectorImpl<int> &ShuffleMask);
57 void DecodePALIGNRMask(unsigned NumElts, unsigned Imm,
58 SmallVectorImpl<int> &ShuffleMask);
60 void DecodeVALIGNMask(unsigned NumElts, unsigned Imm,
61 SmallVectorImpl<int> &ShuffleMask);
63 /// Decodes the shuffle masks for pshufd/pshufw/vpermilpd/vpermilps.
64 /// VT indicates the type of the vector allowing it to handle different
65 /// datatypes and vector widths.
66 void DecodePSHUFMask(unsigned NumElts, unsigned ScalarBits, unsigned Imm,
67 SmallVectorImpl<int> &ShuffleMask);
69 /// Decodes the shuffle masks for pshufhw.
70 /// VT indicates the type of the vector allowing it to handle different
71 /// datatypes and vector widths.
72 void DecodePSHUFHWMask(unsigned NumElts, unsigned Imm,
73 SmallVectorImpl<int> &ShuffleMask);
75 /// Decodes the shuffle masks for pshuflw.
76 /// VT indicates the type of the vector allowing it to handle different
77 /// datatypes and vector widths.
78 void DecodePSHUFLWMask(unsigned NumElts, unsigned Imm,
79 SmallVectorImpl<int> &ShuffleMask);
81 /// Decodes a PSWAPD 3DNow! instruction.
82 void DecodePSWAPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask);
84 /// Decodes the shuffle masks for shufp*.
85 /// VT indicates the type of the vector allowing it to handle different
86 /// datatypes and vector widths.
87 void DecodeSHUFPMask(unsigned NumElts, unsigned ScalarBits, unsigned Imm,
88 SmallVectorImpl<int> &ShuffleMask);
90 /// Decodes the shuffle masks for unpckhps/unpckhpd and punpckh*.
91 /// VT indicates the type of the vector allowing it to handle different
92 /// datatypes and vector widths.
93 void DecodeUNPCKHMask(unsigned NumElts, unsigned ScalarBits,
94 SmallVectorImpl<int> &ShuffleMask);
96 /// Decodes the shuffle masks for unpcklps/unpcklpd and punpckl*.
97 /// VT indicates the type of the vector allowing it to handle different
98 /// datatypes and vector widths.
99 void DecodeUNPCKLMask(unsigned NumElts, unsigned ScalarBits,
100 SmallVectorImpl<int> &ShuffleMask);
102 /// Decodes a broadcast of the first element of a vector.
103 void DecodeVectorBroadcast(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask);
105 /// Decodes a broadcast of a subvector to a larger vector type.
106 void DecodeSubVectorBroadcast(unsigned DstNumElts, unsigned SrcNumElts,
107 SmallVectorImpl<int> &ShuffleMask);
109 /// Decode a PSHUFB mask from a raw array of constants such as from
110 /// BUILD_VECTOR.
111 void DecodePSHUFBMask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts,
112 SmallVectorImpl<int> &ShuffleMask);
114 /// Decode a BLEND immediate mask into a shuffle mask.
115 void DecodeBLENDMask(unsigned NumElts, unsigned Imm,
116 SmallVectorImpl<int> &ShuffleMask);
118 void DecodeVPERM2X128Mask(unsigned NumElts, unsigned Imm,
119 SmallVectorImpl<int> &ShuffleMask);
121 /// Decode a shuffle packed values at 128-bit granularity
122 /// immediate mask into a shuffle mask.
123 void decodeVSHUF64x2FamilyMask(unsigned NumElts, unsigned ScalarSize,
124 unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
126 /// Decodes the shuffle masks for VPERMQ/VPERMPD.
127 void DecodeVPERMMask(unsigned NumElts, unsigned Imm,
128 SmallVectorImpl<int> &ShuffleMask);
130 /// Decode a VPPERM mask from a raw array of constants such as from
131 /// BUILD_VECTOR.
132 /// This can only basic masks (permutes + zeros), not any of the other
133 /// operations that VPPERM can perform.
134 void DecodeVPPERMMask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts,
135 SmallVectorImpl<int> &ShuffleMask);
137 /// Decode a zero extension instruction as a shuffle mask.
138 void DecodeZeroExtendMask(unsigned SrcScalarBits, unsigned DstScalarBits,
139 unsigned NumDstElts, bool IsAnyExtend,
140 SmallVectorImpl<int> &ShuffleMask);
142 /// Decode a move lower and zero upper instruction as a shuffle mask.
143 void DecodeZeroMoveLowMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask);
145 /// Decode a scalar float move instruction as a shuffle mask.
146 void DecodeScalarMoveMask(unsigned NumElts, bool IsLoad,
147 SmallVectorImpl<int> &ShuffleMask);
149 /// Decode a SSE4A EXTRQ instruction as a shuffle mask.
150 void DecodeEXTRQIMask(unsigned NumElts, unsigned EltSize, int Len, int Idx,
151 SmallVectorImpl<int> &ShuffleMask);
153 /// Decode a SSE4A INSERTQ instruction as a shuffle mask.
154 void DecodeINSERTQIMask(unsigned NumElts, unsigned EltSize, int Len, int Idx,
155 SmallVectorImpl<int> &ShuffleMask);
157 /// Decode a VPERMILPD/VPERMILPS variable mask from a raw array of constants.
158 void DecodeVPERMILPMask(unsigned NumElts, unsigned ScalarBits,
159 ArrayRef<uint64_t> RawMask, const APInt &UndefElts,
160 SmallVectorImpl<int> &ShuffleMask);
162 /// Decode a VPERMIL2PD/VPERMIL2PS variable mask from a raw array of constants.
163 void DecodeVPERMIL2PMask(unsigned NumElts, unsigned ScalarBits, unsigned M2Z,
164 ArrayRef<uint64_t> RawMask, const APInt &UndefElts,
165 SmallVectorImpl<int> &ShuffleMask);
167 /// Decode a VPERM W/D/Q/PS/PD mask from a raw array of constants.
168 void DecodeVPERMVMask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts,
169 SmallVectorImpl<int> &ShuffleMask);
171 /// Decode a VPERMT2 W/D/Q/PS/PD mask from a raw array of constants.
172 void DecodeVPERMV3Mask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts,
173 SmallVectorImpl<int> &ShuffleMask);
174 } // llvm namespace
176 #endif