1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
4 define i32 @shl48sar47(i64 %a) #0 {
5 ; CHECK-LABEL: shl48sar47:
7 ; CHECK-NEXT: movswq %di, %rax
8 ; CHECK-NEXT: addl %eax, %eax
9 ; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
12 %2 = ashr exact i64 %1, 47
13 %3 = trunc i64 %2 to i32
17 define i32 @shl48sar49(i64 %a) #0 {
18 ; CHECK-LABEL: shl48sar49:
20 ; CHECK-NEXT: movswq %di, %rax
21 ; CHECK-NEXT: shrq %rax
22 ; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
25 %2 = ashr exact i64 %1, 49
26 %3 = trunc i64 %2 to i32
30 define i32 @shl56sar55(i64 %a) #0 {
31 ; CHECK-LABEL: shl56sar55:
33 ; CHECK-NEXT: movsbq %dil, %rax
34 ; CHECK-NEXT: addl %eax, %eax
35 ; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
38 %2 = ashr exact i64 %1, 55
39 %3 = trunc i64 %2 to i32
43 define i32 @shl56sar57(i64 %a) #0 {
44 ; CHECK-LABEL: shl56sar57:
46 ; CHECK-NEXT: movsbq %dil, %rax
47 ; CHECK-NEXT: shrq %rax
48 ; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
51 %2 = ashr exact i64 %1, 57
52 %3 = trunc i64 %2 to i32
56 define i8 @all_sign_bit_ashr(i8 %x) {
57 ; CHECK-LABEL: all_sign_bit_ashr:
59 ; CHECK-NEXT: movl %edi, %eax
60 ; CHECK-NEXT: andb $1, %al
61 ; CHECK-NEXT: negb %al
62 ; CHECK-NEXT: # kill: def $al killed $al killed $eax
66 %sar = ashr i8 %neg, 6
70 define <4 x i32> @all_sign_bit_ashr_vec(<4 x i32> %x) {
71 ; CHECK-LABEL: all_sign_bit_ashr_vec:
73 ; CHECK-NEXT: pand {{.*}}(%rip), %xmm0
74 ; CHECK-NEXT: pxor %xmm1, %xmm1
75 ; CHECK-NEXT: psubd %xmm0, %xmm1
76 ; CHECK-NEXT: movdqa %xmm1, %xmm0
78 %and = and <4 x i32> %x, <i32 1, i32 1, i32 1 , i32 1>
79 %neg = sub <4 x i32> zeroinitializer, %and
80 %sar = ashr <4 x i32> %neg, <i32 1, i32 31, i32 5, i32 0>
84 attributes #0 = { nounwind }