| blob | 19b2b4864ea7ae107b3c8c5bd212596d8c0ff8a4 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s | FileCheck %s
3 ; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+avx < %s | FileCheck --check-prefix=AVX %s
5 define <1 x float> @constrained_vector_fdiv_v1f32() {
6 ; CHECK-LABEL: constrained_vector_fdiv_v1f32:
7 ; CHECK: # %bb.0: # %entry
8 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
9 ; CHECK-NEXT: divss {{.*}}(%rip), %xmm0
10 ; CHECK-NEXT: retq
11 ;
12 ; AVX-LABEL: constrained_vector_fdiv_v1f32:
13 ; AVX: # %bb.0: # %entry
14 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
15 ; AVX-NEXT: vdivss {{.*}}(%rip), %xmm0, %xmm0
16 ; AVX-NEXT: retq
17 entry:
18 %div = call <1 x float> @llvm.experimental.constrained.fdiv.v1f32(
19 <1 x float> <float 1.000000e+00>,
20 <1 x float> <float 1.000000e+01>,
21 metadata !"round.dynamic",
22 metadata !"fpexcept.strict")
23 ret <1 x float> %div
24 }
26 define <2 x double> @constrained_vector_fdiv_v2f64() {
27 ; CHECK-LABEL: constrained_vector_fdiv_v2f64:
28 ; CHECK: # %bb.0: # %entry
29 ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]
30 ; CHECK-NEXT: divpd {{.*}}(%rip), %xmm0
31 ; CHECK-NEXT: retq
32 ;
33 ; AVX-LABEL: constrained_vector_fdiv_v2f64:
34 ; AVX: # %bb.0: # %entry
35 ; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]
36 ; AVX-NEXT: vdivpd {{.*}}(%rip), %xmm0, %xmm0
37 ; AVX-NEXT: retq
38 entry:
39 %div = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(
40 <2 x double> <double 1.000000e+00, double 2.000000e+00>,
41 <2 x double> <double 1.000000e+01, double 1.000000e+01>,
42 metadata !"round.dynamic",
43 metadata !"fpexcept.strict")
44 ret <2 x double> %div
45 }
47 define <3 x float> @constrained_vector_fdiv_v3f32() {
48 ; CHECK-LABEL: constrained_vector_fdiv_v3f32:
49 ; CHECK: # %bb.0: # %entry
50 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
51 ; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
52 ; CHECK-NEXT: divss %xmm1, %xmm2
53 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
54 ; CHECK-NEXT: divss %xmm1, %xmm0
55 ; CHECK-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
56 ; CHECK-NEXT: divss %xmm1, %xmm3
57 ; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
58 ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]
59 ; CHECK-NEXT: retq
60 ;
61 ; AVX-LABEL: constrained_vector_fdiv_v3f32:
62 ; AVX: # %bb.0: # %entry
63 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
64 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
65 ; AVX-NEXT: vdivss %xmm0, %xmm1, %xmm1
66 ; AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
67 ; AVX-NEXT: vdivss %xmm0, %xmm2, %xmm2
68 ; AVX-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
69 ; AVX-NEXT: vdivss %xmm0, %xmm3, %xmm0
70 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3]
71 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]
72 ; AVX-NEXT: retq
73 entry:
74 %div = call <3 x float> @llvm.experimental.constrained.fdiv.v3f32(
75 <3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>,
76 <3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>,
77 metadata !"round.dynamic",
78 metadata !"fpexcept.strict")
79 ret <3 x float> %div
80 }
82 define <3 x double> @constrained_vector_fdiv_v3f64() {
83 ; CHECK-LABEL: constrained_vector_fdiv_v3f64:
84 ; CHECK: # %bb.0: # %entry
85 ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]
86 ; CHECK-NEXT: divpd {{.*}}(%rip), %xmm0
87 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
88 ; CHECK-NEXT: divsd {{.*}}(%rip), %xmm1
89 ; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp)
90 ; CHECK-NEXT: movapd %xmm0, %xmm1
91 ; CHECK-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
92 ; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)
93 ; CHECK-NEXT: retq
94 ;
95 ; AVX-LABEL: constrained_vector_fdiv_v3f64:
96 ; AVX: # %bb.0: # %entry
97 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
98 ; AVX-NEXT: vdivsd {{.*}}(%rip), %xmm0, %xmm0
99 ; AVX-NEXT: vmovapd {{.*#+}} xmm1 = [1.0E+0,2.0E+0]
100 ; AVX-NEXT: vdivpd {{.*}}(%rip), %xmm1, %xmm1
101 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
102 ; AVX-NEXT: retq
103 entry:
104 %div = call <3 x double> @llvm.experimental.constrained.fdiv.v3f64(
105 <3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>,
106 <3 x double> <double 1.000000e+01, double 1.000000e+01, double 1.000000e+01>,
107 metadata !"round.dynamic",
108 metadata !"fpexcept.strict")
109 ret <3 x double> %div
110 }
112 define <4 x double> @constrained_vector_fdiv_v4f64() {
113 ; CHECK-LABEL: constrained_vector_fdiv_v4f64:
114 ; CHECK: # %bb.0: # %entry
115 ; CHECK-NEXT: movapd {{.*#+}} xmm2 = [1.0E+1,1.0E+1]
116 ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]
117 ; CHECK-NEXT: divpd %xmm2, %xmm0
118 ; CHECK-NEXT: movapd {{.*#+}} xmm1 = [3.0E+0,4.0E+0]
119 ; CHECK-NEXT: divpd %xmm2, %xmm1
120 ; CHECK-NEXT: retq
121 ;
122 ; AVX-LABEL: constrained_vector_fdiv_v4f64:
123 ; AVX: # %bb.0: # %entry
124 ; AVX-NEXT: vmovapd {{.*#+}} ymm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0]
125 ; AVX-NEXT: vdivpd {{.*}}(%rip), %ymm0, %ymm0
126 ; AVX-NEXT: retq
127 entry:
128 %div = call <4 x double> @llvm.experimental.constrained.fdiv.v4f64(
129 <4 x double> <double 1.000000e+00, double 2.000000e+00,
130 double 3.000000e+00, double 4.000000e+00>,
131 <4 x double> <double 1.000000e+01, double 1.000000e+01,
132 double 1.000000e+01, double 1.000000e+01>,
133 metadata !"round.dynamic",
134 metadata !"fpexcept.strict")
135 ret <4 x double> %div
136 }
138 define <1 x float> @constrained_vector_frem_v1f32() {
139 ; CHECK-LABEL: constrained_vector_frem_v1f32:
140 ; CHECK: # %bb.0: # %entry
141 ; CHECK-NEXT: pushq %rax
142 ; CHECK-NEXT: .cfi_def_cfa_offset 16
143 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
144 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
145 ; CHECK-NEXT: callq fmodf
146 ; CHECK-NEXT: popq %rax
147 ; CHECK-NEXT: .cfi_def_cfa_offset 8
148 ; CHECK-NEXT: retq
149 ;
150 ; AVX-LABEL: constrained_vector_frem_v1f32:
151 ; AVX: # %bb.0: # %entry
152 ; AVX-NEXT: pushq %rax
153 ; AVX-NEXT: .cfi_def_cfa_offset 16
154 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
155 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
156 ; AVX-NEXT: callq fmodf
157 ; AVX-NEXT: popq %rax
158 ; AVX-NEXT: .cfi_def_cfa_offset 8
159 ; AVX-NEXT: retq
160 entry:
161 %rem = call <1 x float> @llvm.experimental.constrained.frem.v1f32(
162 <1 x float> <float 1.000000e+00>,
163 <1 x float> <float 1.000000e+01>,
164 metadata !"round.dynamic",
165 metadata !"fpexcept.strict")
166 ret <1 x float> %rem
167 }
169 define <2 x double> @constrained_vector_frem_v2f64() {
170 ; CHECK-LABEL: constrained_vector_frem_v2f64:
171 ; CHECK: # %bb.0: # %entry
172 ; CHECK-NEXT: subq $24, %rsp
173 ; CHECK-NEXT: .cfi_def_cfa_offset 32
174 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
175 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
176 ; CHECK-NEXT: callq fmod
177 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
178 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
179 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
180 ; CHECK-NEXT: callq fmod
181 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
182 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
183 ; CHECK-NEXT: addq $24, %rsp
184 ; CHECK-NEXT: .cfi_def_cfa_offset 8
185 ; CHECK-NEXT: retq
186 ;
187 ; AVX-LABEL: constrained_vector_frem_v2f64:
188 ; AVX: # %bb.0: # %entry
189 ; AVX-NEXT: subq $24, %rsp
190 ; AVX-NEXT: .cfi_def_cfa_offset 32
191 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
192 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
193 ; AVX-NEXT: callq fmod
194 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
195 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
196 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
197 ; AVX-NEXT: callq fmod
198 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
199 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
200 ; AVX-NEXT: addq $24, %rsp
201 ; AVX-NEXT: .cfi_def_cfa_offset 8
202 ; AVX-NEXT: retq
203 entry:
204 %rem = call <2 x double> @llvm.experimental.constrained.frem.v2f64(
205 <2 x double> <double 1.000000e+00, double 2.000000e+00>,
206 <2 x double> <double 1.000000e+01, double 1.000000e+01>,
207 metadata !"round.dynamic",
208 metadata !"fpexcept.strict")
209 ret <2 x double> %rem
210 }
212 define <3 x float> @constrained_vector_frem_v3f32() {
213 ; CHECK-LABEL: constrained_vector_frem_v3f32:
214 ; CHECK: # %bb.0: # %entry
215 ; CHECK-NEXT: subq $40, %rsp
216 ; CHECK-NEXT: .cfi_def_cfa_offset 48
217 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
218 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
219 ; CHECK-NEXT: callq fmodf
220 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
221 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
222 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
223 ; CHECK-NEXT: callq fmodf
224 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
225 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
226 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
227 ; CHECK-NEXT: callq fmodf
228 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
229 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
230 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
231 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
232 ; CHECK-NEXT: movaps %xmm1, %xmm0
233 ; CHECK-NEXT: addq $40, %rsp
234 ; CHECK-NEXT: .cfi_def_cfa_offset 8
235 ; CHECK-NEXT: retq
236 ;
237 ; AVX-LABEL: constrained_vector_frem_v3f32:
238 ; AVX: # %bb.0: # %entry
239 ; AVX-NEXT: subq $40, %rsp
240 ; AVX-NEXT: .cfi_def_cfa_offset 48
241 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
242 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
243 ; AVX-NEXT: callq fmodf
244 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
245 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
246 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
247 ; AVX-NEXT: callq fmodf
248 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
249 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
250 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
251 ; AVX-NEXT: callq fmodf
252 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
253 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
254 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
255 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
256 ; AVX-NEXT: addq $40, %rsp
257 ; AVX-NEXT: .cfi_def_cfa_offset 8
258 ; AVX-NEXT: retq
259 entry:
260 %rem = call <3 x float> @llvm.experimental.constrained.frem.v3f32(
261 <3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>,
262 <3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>,
263 metadata !"round.dynamic",
264 metadata !"fpexcept.strict")
265 ret <3 x float> %rem
266 }
268 define <3 x double> @constrained_vector_frem_v3f64() {
269 ; CHECK-LABEL: constrained_vector_frem_v3f64:
270 ; CHECK: # %bb.0: # %entry
271 ; CHECK-NEXT: subq $24, %rsp
272 ; CHECK-NEXT: .cfi_def_cfa_offset 32
273 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
274 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
275 ; CHECK-NEXT: callq fmod
276 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
277 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
278 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
279 ; CHECK-NEXT: callq fmod
280 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
281 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
282 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
283 ; CHECK-NEXT: callq fmod
284 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
285 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
286 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
287 ; CHECK-NEXT: # xmm0 = mem[0],zero
288 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
289 ; CHECK-NEXT: # xmm1 = mem[0],zero
290 ; CHECK-NEXT: addq $24, %rsp
291 ; CHECK-NEXT: .cfi_def_cfa_offset 8
292 ; CHECK-NEXT: retq
293 ;
294 ; AVX-LABEL: constrained_vector_frem_v3f64:
295 ; AVX: # %bb.0: # %entry
296 ; AVX-NEXT: subq $56, %rsp
297 ; AVX-NEXT: .cfi_def_cfa_offset 64
298 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
299 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
300 ; AVX-NEXT: callq fmod
301 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
302 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
303 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
304 ; AVX-NEXT: callq fmod
305 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
306 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
307 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
308 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
309 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
310 ; AVX-NEXT: vzeroupper
311 ; AVX-NEXT: callq fmod
312 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
313 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
314 ; AVX-NEXT: addq $56, %rsp
315 ; AVX-NEXT: .cfi_def_cfa_offset 8
316 ; AVX-NEXT: retq
317 entry:
318 %rem = call <3 x double> @llvm.experimental.constrained.frem.v3f64(
319 <3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>,
320 <3 x double> <double 1.000000e+01, double 1.000000e+01, double 1.000000e+01>,
321 metadata !"round.dynamic",
322 metadata !"fpexcept.strict")
323 ret <3 x double> %rem
324 }
326 define <4 x double> @constrained_vector_frem_v4f64() {
327 ; CHECK-LABEL: constrained_vector_frem_v4f64:
328 ; CHECK: # %bb.0:
329 ; CHECK-NEXT: subq $40, %rsp
330 ; CHECK-NEXT: .cfi_def_cfa_offset 48
331 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
332 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
333 ; CHECK-NEXT: callq fmod
334 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
335 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
336 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
337 ; CHECK-NEXT: callq fmod
338 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
339 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
340 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
341 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
342 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
343 ; CHECK-NEXT: callq fmod
344 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
345 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
346 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
347 ; CHECK-NEXT: callq fmod
348 ; CHECK-NEXT: movaps %xmm0, %xmm1
349 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
350 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
351 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
352 ; CHECK-NEXT: addq $40, %rsp
353 ; CHECK-NEXT: .cfi_def_cfa_offset 8
354 ; CHECK-NEXT: retq
355 ;
356 ; AVX-LABEL: constrained_vector_frem_v4f64:
357 ; AVX: # %bb.0:
358 ; AVX-NEXT: subq $40, %rsp
359 ; AVX-NEXT: .cfi_def_cfa_offset 48
360 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
361 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
362 ; AVX-NEXT: callq fmod
363 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
364 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
365 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
366 ; AVX-NEXT: callq fmod
367 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
368 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
369 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
370 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
371 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
372 ; AVX-NEXT: callq fmod
373 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
374 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
375 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
376 ; AVX-NEXT: callq fmod
377 ; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
378 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
379 ; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload
380 ; AVX-NEXT: addq $40, %rsp
381 ; AVX-NEXT: .cfi_def_cfa_offset 8
382 ; AVX-NEXT: retq
383 %rem = call <4 x double> @llvm.experimental.constrained.frem.v4f64(
384 <4 x double> <double 1.000000e+00, double 2.000000e+00,
385 double 3.000000e+00, double 4.000000e+00>,
386 <4 x double> <double 1.000000e+01, double 1.000000e+01,
387 double 1.000000e+01, double 1.000000e+01>,
388 metadata !"round.dynamic",
389 metadata !"fpexcept.strict")
390 ret <4 x double> %rem
391 }
393 define <1 x float> @constrained_vector_fmul_v1f32() {
394 ; CHECK-LABEL: constrained_vector_fmul_v1f32:
395 ; CHECK: # %bb.0: # %entry
396 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
397 ; CHECK-NEXT: mulss {{.*}}(%rip), %xmm0
398 ; CHECK-NEXT: retq
399 ;
400 ; AVX-LABEL: constrained_vector_fmul_v1f32:
401 ; AVX: # %bb.0: # %entry
402 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
403 ; AVX-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0
404 ; AVX-NEXT: retq
405 entry:
406 %mul = call <1 x float> @llvm.experimental.constrained.fmul.v1f32(
407 <1 x float> <float 0x7FF0000000000000>,
408 <1 x float> <float 2.000000e+00>,
409 metadata !"round.dynamic",
410 metadata !"fpexcept.strict")
411 ret <1 x float> %mul
412 }
414 define <2 x double> @constrained_vector_fmul_v2f64() {
415 ; CHECK-LABEL: constrained_vector_fmul_v2f64:
416 ; CHECK: # %bb.0: # %entry
417 ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]
418 ; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm0
419 ; CHECK-NEXT: retq
420 ;
421 ; AVX-LABEL: constrained_vector_fmul_v2f64:
422 ; AVX: # %bb.0: # %entry
423 ; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]
424 ; AVX-NEXT: vmulpd {{.*}}(%rip), %xmm0, %xmm0
425 ; AVX-NEXT: retq
426 entry:
427 %mul = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(
428 <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
429 <2 x double> <double 2.000000e+00, double 3.000000e+00>,
430 metadata !"round.dynamic",
431 metadata !"fpexcept.strict")
432 ret <2 x double> %mul
433 }
435 define <3 x float> @constrained_vector_fmul_v3f32() {
436 ; CHECK-LABEL: constrained_vector_fmul_v3f32:
437 ; CHECK: # %bb.0: # %entry
438 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
439 ; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
440 ; CHECK-NEXT: mulss %xmm1, %xmm2
441 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
442 ; CHECK-NEXT: mulss %xmm1, %xmm0
443 ; CHECK-NEXT: mulss {{.*}}(%rip), %xmm1
444 ; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
445 ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]
446 ; CHECK-NEXT: retq
447 ;
448 ; AVX-LABEL: constrained_vector_fmul_v3f32:
449 ; AVX: # %bb.0: # %entry
450 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
451 ; AVX-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm1
452 ; AVX-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm2
453 ; AVX-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0
454 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3]
455 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]
456 ; AVX-NEXT: retq
457 entry:
458 %mul = call <3 x float> @llvm.experimental.constrained.fmul.v3f32(
459 <3 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000,
460 float 0x7FF0000000000000>,
461 <3 x float> <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02>,
462 metadata !"round.dynamic",
463 metadata !"fpexcept.strict")
464 ret <3 x float> %mul
465 }
467 define <3 x double> @constrained_vector_fmul_v3f64() {
468 ; CHECK-LABEL: constrained_vector_fmul_v3f64:
469 ; CHECK: # %bb.0: # %entry
470 ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]
471 ; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm0
472 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
473 ; CHECK-NEXT: mulsd {{.*}}(%rip), %xmm1
474 ; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp)
475 ; CHECK-NEXT: movapd %xmm0, %xmm1
476 ; CHECK-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
477 ; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)
478 ; CHECK-NEXT: retq
479 ;
480 ; AVX-LABEL: constrained_vector_fmul_v3f64:
481 ; AVX: # %bb.0: # %entry
482 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
483 ; AVX-NEXT: vmulsd {{.*}}(%rip), %xmm0, %xmm0
484 ; AVX-NEXT: vmovapd {{.*#+}} xmm1 = [1.7976931348623157E+308,1.7976931348623157E+308]
485 ; AVX-NEXT: vmulpd {{.*}}(%rip), %xmm1, %xmm1
486 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
487 ; AVX-NEXT: retq
488 entry:
489 %mul = call <3 x double> @llvm.experimental.constrained.fmul.v3f64(
490 <3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
491 double 0x7FEFFFFFFFFFFFFF>,
492 <3 x double> <double 1.000000e+00, double 1.000000e+01, double 1.000000e+02>,
493 metadata !"round.dynamic",
494 metadata !"fpexcept.strict")
495 ret <3 x double> %mul
496 }
498 define <4 x double> @constrained_vector_fmul_v4f64() {
499 ; CHECK-LABEL: constrained_vector_fmul_v4f64:
500 ; CHECK: # %bb.0: # %entry
501 ; CHECK-NEXT: movapd {{.*#+}} xmm1 = [1.7976931348623157E+308,1.7976931348623157E+308]
502 ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [2.0E+0,3.0E+0]
503 ; CHECK-NEXT: mulpd %xmm1, %xmm0
504 ; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm1
505 ; CHECK-NEXT: retq
506 ;
507 ; AVX-LABEL: constrained_vector_fmul_v4f64:
508 ; AVX: # %bb.0: # %entry
509 ; AVX-NEXT: vmovapd {{.*#+}} ymm0 = [1.7976931348623157E+308,1.7976931348623157E+308,1.7976931348623157E+308,1.7976931348623157E+308]
510 ; AVX-NEXT: vmulpd {{.*}}(%rip), %ymm0, %ymm0
511 ; AVX-NEXT: retq
512 entry:
513 %mul = call <4 x double> @llvm.experimental.constrained.fmul.v4f64(
514 <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
515 double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
516 <4 x double> <double 2.000000e+00, double 3.000000e+00,
517 double 4.000000e+00, double 5.000000e+00>,
518 metadata !"round.dynamic",
519 metadata !"fpexcept.strict")
520 ret <4 x double> %mul
521 }
523 define <1 x float> @constrained_vector_fadd_v1f32() {
524 ; CHECK-LABEL: constrained_vector_fadd_v1f32:
525 ; CHECK: # %bb.0: # %entry
526 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
527 ; CHECK-NEXT: addss {{.*}}(%rip), %xmm0
528 ; CHECK-NEXT: retq
529 ;
530 ; AVX-LABEL: constrained_vector_fadd_v1f32:
531 ; AVX: # %bb.0: # %entry
532 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
533 ; AVX-NEXT: vaddss {{.*}}(%rip), %xmm0, %xmm0
534 ; AVX-NEXT: retq
535 entry:
536 %add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32(
537 <1 x float> <float 0x7FF0000000000000>,
538 <1 x float> <float 1.0>,
539 metadata !"round.dynamic",
540 metadata !"fpexcept.strict")
541 ret <1 x float> %add
542 }
544 define <2 x double> @constrained_vector_fadd_v2f64() {
545 ; CHECK-LABEL: constrained_vector_fadd_v2f64:
546 ; CHECK: # %bb.0: # %entry
547 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
548 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
549 ; CHECK-NEXT: addsd %xmm0, %xmm1
550 ; CHECK-NEXT: addsd {{.*}}(%rip), %xmm0
551 ; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
552 ; CHECK-NEXT: retq
553 ;
554 ; AVX-LABEL: constrained_vector_fadd_v2f64:
555 ; AVX: # %bb.0: # %entry
556 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
557 ; AVX-NEXT: vaddsd {{.*}}(%rip), %xmm0, %xmm1
558 ; AVX-NEXT: vaddsd {{.*}}(%rip), %xmm0, %xmm0
559 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
560 ; AVX-NEXT: retq
561 entry:
562 %add = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(
563 <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
564 <2 x double> <double 1.000000e+00, double 1.000000e-01>,
565 metadata !"round.dynamic",
566 metadata !"fpexcept.strict")
567 ret <2 x double> %add
568 }
570 define <3 x float> @constrained_vector_fadd_v3f32() {
571 ; CHECK-LABEL: constrained_vector_fadd_v3f32:
572 ; CHECK: # %bb.0: # %entry
573 ; CHECK-NEXT: xorps %xmm1, %xmm1
574 ; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
575 ; CHECK-NEXT: addss %xmm2, %xmm1
576 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
577 ; CHECK-NEXT: addss %xmm2, %xmm0
578 ; CHECK-NEXT: addss {{.*}}(%rip), %xmm2
579 ; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
580 ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
581 ; CHECK-NEXT: retq
582 ;
583 ; AVX-LABEL: constrained_vector_fadd_v3f32:
584 ; AVX: # %bb.0: # %entry
585 ; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
586 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
587 ; AVX-NEXT: vaddss %xmm0, %xmm1, %xmm0
588 ; AVX-NEXT: vaddss {{.*}}(%rip), %xmm1, %xmm2
589 ; AVX-NEXT: vaddss {{.*}}(%rip), %xmm1, %xmm1
590 ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3]
591 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
592 ; AVX-NEXT: retq
593 entry:
594 %add = call <3 x float> @llvm.experimental.constrained.fadd.v3f32(
595 <3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000,
596 float 0xFFFFFFFFE0000000>,
597 <3 x float> <float 2.0, float 1.0, float 0.0>,
598 metadata !"round.dynamic",
599 metadata !"fpexcept.strict")
600 ret <3 x float> %add
601 }
603 define <3 x double> @constrained_vector_fadd_v3f64() {
604 ; CHECK-LABEL: constrained_vector_fadd_v3f64:
605 ; CHECK: # %bb.0: # %entry
606 ; CHECK-NEXT: xorpd %xmm2, %xmm2
607 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
608 ; CHECK-NEXT: addsd %xmm1, %xmm2
609 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
610 ; CHECK-NEXT: addsd %xmm1, %xmm0
611 ; CHECK-NEXT: addsd {{.*}}(%rip), %xmm1
612 ; CHECK-NEXT: movsd %xmm2, -{{[0-9]+}}(%rsp)
613 ; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)
614 ; CHECK-NEXT: retq
615 ;
616 ; AVX-LABEL: constrained_vector_fadd_v3f64:
617 ; AVX: # %bb.0: # %entry
618 ; AVX-NEXT: vxorpd %xmm0, %xmm0, %xmm0
619 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
620 ; AVX-NEXT: vaddsd %xmm0, %xmm1, %xmm0
621 ; AVX-NEXT: vaddsd {{.*}}(%rip), %xmm1, %xmm2
622 ; AVX-NEXT: vaddsd {{.*}}(%rip), %xmm1, %xmm1
623 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]
624 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
625 ; AVX-NEXT: retq
626 entry:
627 %add = call <3 x double> @llvm.experimental.constrained.fadd.v3f64(
628 <3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
629 double 0x7FEFFFFFFFFFFFFF>,
630 <3 x double> <double 2.0, double 1.0, double 0.0>,
631 metadata !"round.dynamic",
632 metadata !"fpexcept.strict")
633 ret <3 x double> %add
634 }
636 define <4 x double> @constrained_vector_fadd_v4f64() {
637 ; CHECK-LABEL: constrained_vector_fadd_v4f64:
638 ; CHECK: # %bb.0: # %entry
639 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
640 ; CHECK-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
641 ; CHECK-NEXT: addsd %xmm1, %xmm2
642 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
643 ; CHECK-NEXT: addsd %xmm1, %xmm0
644 ; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]
645 ; CHECK-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
646 ; CHECK-NEXT: addsd %xmm1, %xmm2
647 ; CHECK-NEXT: addsd {{.*}}(%rip), %xmm1
648 ; CHECK-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]
649 ; CHECK-NEXT: retq
650 ;
651 ; AVX-LABEL: constrained_vector_fadd_v4f64:
652 ; AVX: # %bb.0: # %entry
653 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
654 ; AVX-NEXT: vaddsd {{.*}}(%rip), %xmm0, %xmm1
655 ; AVX-NEXT: vaddsd {{.*}}(%rip), %xmm0, %xmm2
656 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm2[0],xmm1[0]
657 ; AVX-NEXT: vaddsd {{.*}}(%rip), %xmm0, %xmm2
658 ; AVX-NEXT: vaddsd {{.*}}(%rip), %xmm0, %xmm0
659 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]
660 ; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
661 ; AVX-NEXT: retq
662 entry:
663 %add = call <4 x double> @llvm.experimental.constrained.fadd.v4f64(
664 <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
665 double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
666 <4 x double> <double 1.000000e+00, double 1.000000e-01,
667 double 2.000000e+00, double 2.000000e-01>,
668 metadata !"round.dynamic",
669 metadata !"fpexcept.strict")
670 ret <4 x double> %add
671 }
673 define <1 x float> @constrained_vector_fsub_v1f32() {
674 ; CHECK-LABEL: constrained_vector_fsub_v1f32:
675 ; CHECK: # %bb.0: # %entry
676 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
677 ; CHECK-NEXT: subss {{.*}}(%rip), %xmm0
678 ; CHECK-NEXT: retq
679 ;
680 ; AVX-LABEL: constrained_vector_fsub_v1f32:
681 ; AVX: # %bb.0: # %entry
682 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
683 ; AVX-NEXT: vsubss {{.*}}(%rip), %xmm0, %xmm0
684 ; AVX-NEXT: retq
685 entry:
686 %sub = call <1 x float> @llvm.experimental.constrained.fsub.v1f32(
687 <1 x float> <float 0x7FF0000000000000>,
688 <1 x float> <float 1.000000e+00>,
689 metadata !"round.dynamic",
690 metadata !"fpexcept.strict")
691 ret <1 x float> %sub
692 }
694 define <2 x double> @constrained_vector_fsub_v2f64() {
695 ; CHECK-LABEL: constrained_vector_fsub_v2f64:
696 ; CHECK: # %bb.0: # %entry
697 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
698 ; CHECK-NEXT: movapd %xmm0, %xmm1
699 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm1
700 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm0
701 ; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
702 ; CHECK-NEXT: retq
703 ;
704 ; AVX-LABEL: constrained_vector_fsub_v2f64:
705 ; AVX: # %bb.0: # %entry
706 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
707 ; AVX-NEXT: vsubsd {{.*}}(%rip), %xmm0, %xmm1
708 ; AVX-NEXT: vsubsd {{.*}}(%rip), %xmm0, %xmm0
709 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
710 ; AVX-NEXT: retq
711 entry:
712 %sub = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(
713 <2 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,
714 <2 x double> <double 1.000000e+00, double 1.000000e-01>,
715 metadata !"round.dynamic",
716 metadata !"fpexcept.strict")
717 ret <2 x double> %sub
718 }
720 define <3 x float> @constrained_vector_fsub_v3f32() {
721 ; CHECK-LABEL: constrained_vector_fsub_v3f32:
722 ; CHECK: # %bb.0: # %entry
723 ; CHECK-NEXT: xorps %xmm0, %xmm0
724 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
725 ; CHECK-NEXT: movaps %xmm1, %xmm2
726 ; CHECK-NEXT: subss %xmm0, %xmm2
727 ; CHECK-NEXT: movaps %xmm1, %xmm0
728 ; CHECK-NEXT: subss {{.*}}(%rip), %xmm0
729 ; CHECK-NEXT: subss {{.*}}(%rip), %xmm1
730 ; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
731 ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]
732 ; CHECK-NEXT: retq
733 ;
734 ; AVX-LABEL: constrained_vector_fsub_v3f32:
735 ; AVX: # %bb.0: # %entry
736 ; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
737 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
738 ; AVX-NEXT: vsubss %xmm0, %xmm1, %xmm0
739 ; AVX-NEXT: vsubss {{.*}}(%rip), %xmm1, %xmm2
740 ; AVX-NEXT: vsubss {{.*}}(%rip), %xmm1, %xmm1
741 ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3]
742 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
743 ; AVX-NEXT: retq
744 entry:
745 %sub = call <3 x float> @llvm.experimental.constrained.fsub.v3f32(
746 <3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000,
747 float 0xFFFFFFFFE0000000>,
748 <3 x float> <float 2.0, float 1.0, float 0.0>,
749 metadata !"round.dynamic",
750 metadata !"fpexcept.strict")
751 ret <3 x float> %sub
752 }
754 define <3 x double> @constrained_vector_fsub_v3f64() {
755 ; CHECK-LABEL: constrained_vector_fsub_v3f64:
756 ; CHECK: # %bb.0: # %entry
757 ; CHECK-NEXT: xorpd %xmm0, %xmm0
758 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
759 ; CHECK-NEXT: movapd %xmm1, %xmm2
760 ; CHECK-NEXT: subsd %xmm0, %xmm2
761 ; CHECK-NEXT: movapd %xmm1, %xmm0
762 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm0
763 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm1
764 ; CHECK-NEXT: movsd %xmm2, -{{[0-9]+}}(%rsp)
765 ; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)
766 ; CHECK-NEXT: retq
767 ;
768 ; AVX-LABEL: constrained_vector_fsub_v3f64:
769 ; AVX: # %bb.0: # %entry
770 ; AVX-NEXT: vxorpd %xmm0, %xmm0, %xmm0
771 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
772 ; AVX-NEXT: vsubsd %xmm0, %xmm1, %xmm0
773 ; AVX-NEXT: vsubsd {{.*}}(%rip), %xmm1, %xmm2
774 ; AVX-NEXT: vsubsd {{.*}}(%rip), %xmm1, %xmm1
775 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]
776 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
777 ; AVX-NEXT: retq
778 entry:
779 %sub = call <3 x double> @llvm.experimental.constrained.fsub.v3f64(
780 <3 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF,
781 double 0xFFEFFFFFFFFFFFFF>,
782 <3 x double> <double 2.0, double 1.0, double 0.0>,
783 metadata !"round.dynamic",
784 metadata !"fpexcept.strict")
785 ret <3 x double> %sub
786 }
788 define <4 x double> @constrained_vector_fsub_v4f64() {
789 ; CHECK-LABEL: constrained_vector_fsub_v4f64:
790 ; CHECK: # %bb.0: # %entry
791 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
792 ; CHECK-NEXT: movapd %xmm1, %xmm2
793 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm2
794 ; CHECK-NEXT: movapd %xmm1, %xmm0
795 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm0
796 ; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]
797 ; CHECK-NEXT: movapd %xmm1, %xmm2
798 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm2
799 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm1
800 ; CHECK-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]
801 ; CHECK-NEXT: retq
802 ;
803 ; AVX-LABEL: constrained_vector_fsub_v4f64:
804 ; AVX: # %bb.0: # %entry
805 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
806 ; AVX-NEXT: vsubsd {{.*}}(%rip), %xmm0, %xmm1
807 ; AVX-NEXT: vsubsd {{.*}}(%rip), %xmm0, %xmm2
808 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm2[0],xmm1[0]
809 ; AVX-NEXT: vsubsd {{.*}}(%rip), %xmm0, %xmm2
810 ; AVX-NEXT: vsubsd {{.*}}(%rip), %xmm0, %xmm0
811 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]
812 ; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
813 ; AVX-NEXT: retq
814 entry:
815 %sub = call <4 x double> @llvm.experimental.constrained.fsub.v4f64(
816 <4 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF,
817 double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,
818 <4 x double> <double 1.000000e+00, double 1.000000e-01,
819 double 2.000000e+00, double 2.000000e-01>,
820 metadata !"round.dynamic",
821 metadata !"fpexcept.strict")
822 ret <4 x double> %sub
823 }
825 define <1 x float> @constrained_vector_sqrt_v1f32() {
826 ; CHECK-LABEL: constrained_vector_sqrt_v1f32:
827 ; CHECK: # %bb.0: # %entry
828 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
829 ; CHECK-NEXT: sqrtss %xmm0, %xmm0
830 ; CHECK-NEXT: retq
831 ;
832 ; AVX-LABEL: constrained_vector_sqrt_v1f32:
833 ; AVX: # %bb.0: # %entry
834 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
835 ; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
836 ; AVX-NEXT: retq
837 entry:
838 %sqrt = call <1 x float> @llvm.experimental.constrained.sqrt.v1f32(
839 <1 x float> <float 42.0>,
840 metadata !"round.dynamic",
841 metadata !"fpexcept.strict")
842 ret <1 x float> %sqrt
843 }
845 define <2 x double> @constrained_vector_sqrt_v2f64() {
846 ; CHECK-LABEL: constrained_vector_sqrt_v2f64:
847 ; CHECK: # %bb.0: # %entry
848 ; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm0
849 ; CHECK-NEXT: retq
850 ;
851 ; AVX-LABEL: constrained_vector_sqrt_v2f64:
852 ; AVX: # %bb.0: # %entry
853 ; AVX-NEXT: vsqrtpd {{.*}}(%rip), %xmm0
854 ; AVX-NEXT: retq
855 entry:
856 %sqrt = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64(
857 <2 x double> <double 42.0, double 42.1>,
858 metadata !"round.dynamic",
859 metadata !"fpexcept.strict")
860 ret <2 x double> %sqrt
861 }
863 define <3 x float> @constrained_vector_sqrt_v3f32() {
864 ; CHECK-LABEL: constrained_vector_sqrt_v3f32:
865 ; CHECK: # %bb.0: # %entry
866 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
867 ; CHECK-NEXT: sqrtss %xmm0, %xmm1
868 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
869 ; CHECK-NEXT: sqrtss %xmm0, %xmm0
870 ; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
871 ; CHECK-NEXT: sqrtss %xmm2, %xmm2
872 ; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
873 ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
874 ; CHECK-NEXT: retq
875 ;
876 ; AVX-LABEL: constrained_vector_sqrt_v3f32:
877 ; AVX: # %bb.0: # %entry
878 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
879 ; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
880 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
881 ; AVX-NEXT: vsqrtss %xmm1, %xmm1, %xmm1
882 ; AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
883 ; AVX-NEXT: vsqrtss %xmm2, %xmm2, %xmm2
884 ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
885 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
886 ; AVX-NEXT: retq
887 entry:
888 %sqrt = call <3 x float> @llvm.experimental.constrained.sqrt.v3f32(
889 <3 x float> <float 42.0, float 43.0, float 44.0>,
890 metadata !"round.dynamic",
891 metadata !"fpexcept.strict")
892 ret <3 x float> %sqrt
893 }
895 define <3 x double> @constrained_vector_sqrt_v3f64() {
896 ; CHECK-LABEL: constrained_vector_sqrt_v3f64:
897 ; CHECK: # %bb.0: # %entry
898 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
899 ; CHECK-NEXT: sqrtsd %xmm0, %xmm1
900 ; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm0
901 ; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp)
902 ; CHECK-NEXT: movapd %xmm0, %xmm1
903 ; CHECK-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
904 ; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)
905 ; CHECK-NEXT: retq
906 ;
907 ; AVX-LABEL: constrained_vector_sqrt_v3f64:
908 ; AVX: # %bb.0: # %entry
909 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
910 ; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0
911 ; AVX-NEXT: vsqrtpd {{.*}}(%rip), %xmm1
912 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
913 ; AVX-NEXT: retq
914 entry:
915 %sqrt = call <3 x double> @llvm.experimental.constrained.sqrt.v3f64(
916 <3 x double> <double 42.0, double 42.1, double 42.2>,
917 metadata !"round.dynamic",
918 metadata !"fpexcept.strict")
919 ret <3 x double> %sqrt
920 }
922 define <4 x double> @constrained_vector_sqrt_v4f64() {
923 ; CHECK-LABEL: constrained_vector_sqrt_v4f64:
924 ; CHECK: # %bb.0: # %entry
925 ; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm0
926 ; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm1
927 ; CHECK-NEXT: retq
928 ;
929 ; AVX-LABEL: constrained_vector_sqrt_v4f64:
930 ; AVX: # %bb.0: # %entry
931 ; AVX-NEXT: vsqrtpd {{.*}}(%rip), %ymm0
932 ; AVX-NEXT: retq
933 entry:
934 %sqrt = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64(
935 <4 x double> <double 42.0, double 42.1,
936 double 42.2, double 42.3>,
937 metadata !"round.dynamic",
938 metadata !"fpexcept.strict")
939 ret <4 x double> %sqrt
940 }
942 define <1 x float> @constrained_vector_pow_v1f32() {
943 ; CHECK-LABEL: constrained_vector_pow_v1f32:
944 ; CHECK: # %bb.0: # %entry
945 ; CHECK-NEXT: pushq %rax
946 ; CHECK-NEXT: .cfi_def_cfa_offset 16
947 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
948 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
949 ; CHECK-NEXT: callq powf
950 ; CHECK-NEXT: popq %rax
951 ; CHECK-NEXT: .cfi_def_cfa_offset 8
952 ; CHECK-NEXT: retq
953 ;
954 ; AVX-LABEL: constrained_vector_pow_v1f32:
955 ; AVX: # %bb.0: # %entry
956 ; AVX-NEXT: pushq %rax
957 ; AVX-NEXT: .cfi_def_cfa_offset 16
958 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
959 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
960 ; AVX-NEXT: callq powf
961 ; AVX-NEXT: popq %rax
962 ; AVX-NEXT: .cfi_def_cfa_offset 8
963 ; AVX-NEXT: retq
964 entry:
965 %pow = call <1 x float> @llvm.experimental.constrained.pow.v1f32(
966 <1 x float> <float 42.0>,
967 <1 x float> <float 3.0>,
968 metadata !"round.dynamic",
969 metadata !"fpexcept.strict")
970 ret <1 x float> %pow
971 }
973 define <2 x double> @constrained_vector_pow_v2f64() {
974 ; CHECK-LABEL: constrained_vector_pow_v2f64:
975 ; CHECK: # %bb.0: # %entry
976 ; CHECK-NEXT: subq $24, %rsp
977 ; CHECK-NEXT: .cfi_def_cfa_offset 32
978 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
979 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
980 ; CHECK-NEXT: callq pow
981 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
982 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
983 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
984 ; CHECK-NEXT: callq pow
985 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
986 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
987 ; CHECK-NEXT: addq $24, %rsp
988 ; CHECK-NEXT: .cfi_def_cfa_offset 8
989 ; CHECK-NEXT: retq
990 ;
991 ; AVX-LABEL: constrained_vector_pow_v2f64:
992 ; AVX: # %bb.0: # %entry
993 ; AVX-NEXT: subq $24, %rsp
994 ; AVX-NEXT: .cfi_def_cfa_offset 32
995 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
996 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
997 ; AVX-NEXT: callq pow
998 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
999 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1000 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
1001 ; AVX-NEXT: callq pow
1002 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1003 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1004 ; AVX-NEXT: addq $24, %rsp
1005 ; AVX-NEXT: .cfi_def_cfa_offset 8
1006 ; AVX-NEXT: retq
1007 entry:
1008 %pow = call <2 x double> @llvm.experimental.constrained.pow.v2f64(
1009 <2 x double> <double 42.1, double 42.2>,
1010 <2 x double> <double 3.0, double 3.0>,
1011 metadata !"round.dynamic",
1012 metadata !"fpexcept.strict")
1013 ret <2 x double> %pow
1014 }
1016 define <3 x float> @constrained_vector_pow_v3f32() {
1017 ; CHECK-LABEL: constrained_vector_pow_v3f32:
1018 ; CHECK: # %bb.0: # %entry
1019 ; CHECK-NEXT: subq $40, %rsp
1020 ; CHECK-NEXT: .cfi_def_cfa_offset 48
1021 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1022 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
1023 ; CHECK-NEXT: callq powf
1024 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1025 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1026 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
1027 ; CHECK-NEXT: callq powf
1028 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1029 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1030 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
1031 ; CHECK-NEXT: callq powf
1032 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
1033 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1034 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
1035 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
1036 ; CHECK-NEXT: movaps %xmm1, %xmm0
1037 ; CHECK-NEXT: addq $40, %rsp
1038 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1039 ; CHECK-NEXT: retq
1040 ;
1041 ; AVX-LABEL: constrained_vector_pow_v3f32:
1042 ; AVX: # %bb.0: # %entry
1043 ; AVX-NEXT: subq $40, %rsp
1044 ; AVX-NEXT: .cfi_def_cfa_offset 48
1045 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1046 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
1047 ; AVX-NEXT: callq powf
1048 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1049 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1050 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
1051 ; AVX-NEXT: callq powf
1052 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1053 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1054 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
1055 ; AVX-NEXT: callq powf
1056 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
1057 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
1058 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
1059 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
1060 ; AVX-NEXT: addq $40, %rsp
1061 ; AVX-NEXT: .cfi_def_cfa_offset 8
1062 ; AVX-NEXT: retq
1063 entry:
1064 %pow = call <3 x float> @llvm.experimental.constrained.pow.v3f32(
1065 <3 x float> <float 42.0, float 43.0, float 44.0>,
1066 <3 x float> <float 3.0, float 3.0, float 3.0>,
1067 metadata !"round.dynamic",
1068 metadata !"fpexcept.strict")
1069 ret <3 x float> %pow
1070 }
1072 define <3 x double> @constrained_vector_pow_v3f64() {
1073 ; CHECK-LABEL: constrained_vector_pow_v3f64:
1074 ; CHECK: # %bb.0: # %entry
1075 ; CHECK-NEXT: subq $24, %rsp
1076 ; CHECK-NEXT: .cfi_def_cfa_offset 32
1077 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1078 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
1079 ; CHECK-NEXT: callq pow
1080 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
1081 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1082 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
1083 ; CHECK-NEXT: callq pow
1084 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
1085 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1086 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
1087 ; CHECK-NEXT: callq pow
1088 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
1089 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
1090 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
1091 ; CHECK-NEXT: # xmm0 = mem[0],zero
1092 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
1093 ; CHECK-NEXT: # xmm1 = mem[0],zero
1094 ; CHECK-NEXT: addq $24, %rsp
1095 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1096 ; CHECK-NEXT: retq
1097 ;
1098 ; AVX-LABEL: constrained_vector_pow_v3f64:
1099 ; AVX: # %bb.0: # %entry
1100 ; AVX-NEXT: subq $56, %rsp
1101 ; AVX-NEXT: .cfi_def_cfa_offset 64
1102 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1103 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
1104 ; AVX-NEXT: callq pow
1105 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1106 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1107 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
1108 ; AVX-NEXT: callq pow
1109 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1110 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1111 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
1112 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1113 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
1114 ; AVX-NEXT: vzeroupper
1115 ; AVX-NEXT: callq pow
1116 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
1117 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1118 ; AVX-NEXT: addq $56, %rsp
1119 ; AVX-NEXT: .cfi_def_cfa_offset 8
1120 ; AVX-NEXT: retq
1121 entry:
1122 %pow = call <3 x double> @llvm.experimental.constrained.pow.v3f64(
1123 <3 x double> <double 42.0, double 42.1, double 42.2>,
1124 <3 x double> <double 3.0, double 3.0, double 3.0>,
1125 metadata !"round.dynamic",
1126 metadata !"fpexcept.strict")
1127 ret <3 x double> %pow
1128 }
1130 define <4 x double> @constrained_vector_pow_v4f64() {
1131 ; CHECK-LABEL: constrained_vector_pow_v4f64:
1132 ; CHECK: # %bb.0: # %entry
1133 ; CHECK-NEXT: subq $40, %rsp
1134 ; CHECK-NEXT: .cfi_def_cfa_offset 48
1135 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1136 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
1137 ; CHECK-NEXT: callq pow
1138 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1139 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1140 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
1141 ; CHECK-NEXT: callq pow
1142 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
1143 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
1144 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1145 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1146 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
1147 ; CHECK-NEXT: callq pow
1148 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1149 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1150 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
1151 ; CHECK-NEXT: callq pow
1152 ; CHECK-NEXT: movaps %xmm0, %xmm1
1153 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
1154 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
1155 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
1156 ; CHECK-NEXT: addq $40, %rsp
1157 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1158 ; CHECK-NEXT: retq
1159 ;
1160 ; AVX-LABEL: constrained_vector_pow_v4f64:
1161 ; AVX: # %bb.0: # %entry
1162 ; AVX-NEXT: subq $40, %rsp
1163 ; AVX-NEXT: .cfi_def_cfa_offset 48
1164 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1165 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
1166 ; AVX-NEXT: callq pow
1167 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1168 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1169 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
1170 ; AVX-NEXT: callq pow
1171 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1172 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1173 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1174 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1175 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
1176 ; AVX-NEXT: callq pow
1177 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1178 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1179 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
1180 ; AVX-NEXT: callq pow
1181 ; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
1182 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1183 ; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload
1184 ; AVX-NEXT: addq $40, %rsp
1185 ; AVX-NEXT: .cfi_def_cfa_offset 8
1186 ; AVX-NEXT: retq
1187 entry:
1188 %pow = call <4 x double> @llvm.experimental.constrained.pow.v4f64(
1189 <4 x double> <double 42.1, double 42.2,
1190 double 42.3, double 42.4>,
1191 <4 x double> <double 3.0, double 3.0,
1192 double 3.0, double 3.0>,
1193 metadata !"round.dynamic",
1194 metadata !"fpexcept.strict")
1195 ret <4 x double> %pow
1196 }
1198 define <1 x float> @constrained_vector_powi_v1f32() {
1199 ; CHECK-LABEL: constrained_vector_powi_v1f32:
1200 ; CHECK: # %bb.0: # %entry
1201 ; CHECK-NEXT: pushq %rax
1202 ; CHECK-NEXT: .cfi_def_cfa_offset 16
1203 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1204 ; CHECK-NEXT: movl $3, %edi
1205 ; CHECK-NEXT: callq __powisf2
1206 ; CHECK-NEXT: popq %rax
1207 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1208 ; CHECK-NEXT: retq
1209 ;
1210 ; AVX-LABEL: constrained_vector_powi_v1f32:
1211 ; AVX: # %bb.0: # %entry
1212 ; AVX-NEXT: pushq %rax
1213 ; AVX-NEXT: .cfi_def_cfa_offset 16
1214 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1215 ; AVX-NEXT: movl $3, %edi
1216 ; AVX-NEXT: callq __powisf2
1217 ; AVX-NEXT: popq %rax
1218 ; AVX-NEXT: .cfi_def_cfa_offset 8
1219 ; AVX-NEXT: retq
1220 entry:
1221 %powi = call <1 x float> @llvm.experimental.constrained.powi.v1f32(
1222 <1 x float> <float 42.0>,
1223 i32 3,
1224 metadata !"round.dynamic",
1225 metadata !"fpexcept.strict")
1226 ret <1 x float> %powi
1227 }
1229 define <2 x double> @constrained_vector_powi_v2f64() {
1230 ; CHECK-LABEL: constrained_vector_powi_v2f64:
1231 ; CHECK: # %bb.0: # %entry
1232 ; CHECK-NEXT: subq $24, %rsp
1233 ; CHECK-NEXT: .cfi_def_cfa_offset 32
1234 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1235 ; CHECK-NEXT: movl $3, %edi
1236 ; CHECK-NEXT: callq __powidf2
1237 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1238 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1239 ; CHECK-NEXT: movl $3, %edi
1240 ; CHECK-NEXT: callq __powidf2
1241 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
1242 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
1243 ; CHECK-NEXT: addq $24, %rsp
1244 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1245 ; CHECK-NEXT: retq
1246 ;
1247 ; AVX-LABEL: constrained_vector_powi_v2f64:
1248 ; AVX: # %bb.0: # %entry
1249 ; AVX-NEXT: subq $24, %rsp
1250 ; AVX-NEXT: .cfi_def_cfa_offset 32
1251 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1252 ; AVX-NEXT: movl $3, %edi
1253 ; AVX-NEXT: callq __powidf2
1254 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1255 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1256 ; AVX-NEXT: movl $3, %edi
1257 ; AVX-NEXT: callq __powidf2
1258 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1259 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1260 ; AVX-NEXT: addq $24, %rsp
1261 ; AVX-NEXT: .cfi_def_cfa_offset 8
1262 ; AVX-NEXT: retq
1263 entry:
1264 %powi = call <2 x double> @llvm.experimental.constrained.powi.v2f64(
1265 <2 x double> <double 42.1, double 42.2>,
1266 i32 3,
1267 metadata !"round.dynamic",
1268 metadata !"fpexcept.strict")
1269 ret <2 x double> %powi
1270 }
1272 define <3 x float> @constrained_vector_powi_v3f32() {
1273 ; CHECK-LABEL: constrained_vector_powi_v3f32:
1274 ; CHECK: # %bb.0: # %entry
1275 ; CHECK-NEXT: subq $40, %rsp
1276 ; CHECK-NEXT: .cfi_def_cfa_offset 48
1277 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1278 ; CHECK-NEXT: movl $3, %edi
1279 ; CHECK-NEXT: callq __powisf2
1280 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1281 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1282 ; CHECK-NEXT: movl $3, %edi
1283 ; CHECK-NEXT: callq __powisf2
1284 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1285 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1286 ; CHECK-NEXT: movl $3, %edi
1287 ; CHECK-NEXT: callq __powisf2
1288 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
1289 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1290 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
1291 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
1292 ; CHECK-NEXT: movaps %xmm1, %xmm0
1293 ; CHECK-NEXT: addq $40, %rsp
1294 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1295 ; CHECK-NEXT: retq
1296 ;
1297 ; AVX-LABEL: constrained_vector_powi_v3f32:
1298 ; AVX: # %bb.0: # %entry
1299 ; AVX-NEXT: subq $40, %rsp
1300 ; AVX-NEXT: .cfi_def_cfa_offset 48
1301 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1302 ; AVX-NEXT: movl $3, %edi
1303 ; AVX-NEXT: callq __powisf2
1304 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1305 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1306 ; AVX-NEXT: movl $3, %edi
1307 ; AVX-NEXT: callq __powisf2
1308 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1309 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1310 ; AVX-NEXT: movl $3, %edi
1311 ; AVX-NEXT: callq __powisf2
1312 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
1313 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
1314 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
1315 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
1316 ; AVX-NEXT: addq $40, %rsp
1317 ; AVX-NEXT: .cfi_def_cfa_offset 8
1318 ; AVX-NEXT: retq
1319 entry:
1320 %powi = call <3 x float> @llvm.experimental.constrained.powi.v3f32(
1321 <3 x float> <float 42.0, float 43.0, float 44.0>,
1322 i32 3,
1323 metadata !"round.dynamic",
1324 metadata !"fpexcept.strict")
1325 ret <3 x float> %powi
1326 }
1328 define <3 x double> @constrained_vector_powi_v3f64() {
1329 ; CHECK-LABEL: constrained_vector_powi_v3f64:
1330 ; CHECK: # %bb.0: # %entry
1331 ; CHECK-NEXT: subq $24, %rsp
1332 ; CHECK-NEXT: .cfi_def_cfa_offset 32
1333 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1334 ; CHECK-NEXT: movl $3, %edi
1335 ; CHECK-NEXT: callq __powidf2
1336 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
1337 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1338 ; CHECK-NEXT: movl $3, %edi
1339 ; CHECK-NEXT: callq __powidf2
1340 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
1341 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1342 ; CHECK-NEXT: movl $3, %edi
1343 ; CHECK-NEXT: callq __powidf2
1344 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
1345 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
1346 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
1347 ; CHECK-NEXT: # xmm0 = mem[0],zero
1348 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
1349 ; CHECK-NEXT: # xmm1 = mem[0],zero
1350 ; CHECK-NEXT: addq $24, %rsp
1351 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1352 ; CHECK-NEXT: retq
1353 ;
1354 ; AVX-LABEL: constrained_vector_powi_v3f64:
1355 ; AVX: # %bb.0: # %entry
1356 ; AVX-NEXT: subq $56, %rsp
1357 ; AVX-NEXT: .cfi_def_cfa_offset 64
1358 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1359 ; AVX-NEXT: movl $3, %edi
1360 ; AVX-NEXT: callq __powidf2
1361 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1362 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1363 ; AVX-NEXT: movl $3, %edi
1364 ; AVX-NEXT: callq __powidf2
1365 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1366 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1367 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
1368 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1369 ; AVX-NEXT: movl $3, %edi
1370 ; AVX-NEXT: vzeroupper
1371 ; AVX-NEXT: callq __powidf2
1372 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
1373 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1374 ; AVX-NEXT: addq $56, %rsp
1375 ; AVX-NEXT: .cfi_def_cfa_offset 8
1376 ; AVX-NEXT: retq
1377 entry:
1378 %powi = call <3 x double> @llvm.experimental.constrained.powi.v3f64(
1379 <3 x double> <double 42.0, double 42.1, double 42.2>,
1380 i32 3,
1381 metadata !"round.dynamic",
1382 metadata !"fpexcept.strict")
1383 ret <3 x double> %powi
1384 }
1386 define <4 x double> @constrained_vector_powi_v4f64() {
1387 ; CHECK-LABEL: constrained_vector_powi_v4f64:
1388 ; CHECK: # %bb.0: # %entry
1389 ; CHECK-NEXT: subq $40, %rsp
1390 ; CHECK-NEXT: .cfi_def_cfa_offset 48
1391 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1392 ; CHECK-NEXT: movl $3, %edi
1393 ; CHECK-NEXT: callq __powidf2
1394 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1395 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1396 ; CHECK-NEXT: movl $3, %edi
1397 ; CHECK-NEXT: callq __powidf2
1398 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
1399 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
1400 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1401 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1402 ; CHECK-NEXT: movl $3, %edi
1403 ; CHECK-NEXT: callq __powidf2
1404 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1405 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1406 ; CHECK-NEXT: movl $3, %edi
1407 ; CHECK-NEXT: callq __powidf2
1408 ; CHECK-NEXT: movaps %xmm0, %xmm1
1409 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
1410 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
1411 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
1412 ; CHECK-NEXT: addq $40, %rsp
1413 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1414 ; CHECK-NEXT: retq
1415 ;
1416 ; AVX-LABEL: constrained_vector_powi_v4f64:
1417 ; AVX: # %bb.0: # %entry
1418 ; AVX-NEXT: subq $40, %rsp
1419 ; AVX-NEXT: .cfi_def_cfa_offset 48
1420 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1421 ; AVX-NEXT: movl $3, %edi
1422 ; AVX-NEXT: callq __powidf2
1423 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1424 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1425 ; AVX-NEXT: movl $3, %edi
1426 ; AVX-NEXT: callq __powidf2
1427 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1428 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1429 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1430 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1431 ; AVX-NEXT: movl $3, %edi
1432 ; AVX-NEXT: callq __powidf2
1433 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1434 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1435 ; AVX-NEXT: movl $3, %edi
1436 ; AVX-NEXT: callq __powidf2
1437 ; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
1438 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1439 ; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload
1440 ; AVX-NEXT: addq $40, %rsp
1441 ; AVX-NEXT: .cfi_def_cfa_offset 8
1442 ; AVX-NEXT: retq
1443 entry:
1444 %powi = call <4 x double> @llvm.experimental.constrained.powi.v4f64(
1445 <4 x double> <double 42.1, double 42.2,
1446 double 42.3, double 42.4>,
1447 i32 3,
1448 metadata !"round.dynamic",
1449 metadata !"fpexcept.strict")
1450 ret <4 x double> %powi
1451 }
1453 define <1 x float> @constrained_vector_sin_v1f32() {
1454 ; CHECK-LABEL: constrained_vector_sin_v1f32:
1455 ; CHECK: # %bb.0: # %entry
1456 ; CHECK-NEXT: pushq %rax
1457 ; CHECK-NEXT: .cfi_def_cfa_offset 16
1458 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1459 ; CHECK-NEXT: callq sinf
1460 ; CHECK-NEXT: popq %rax
1461 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1462 ; CHECK-NEXT: retq
1463 ;
1464 ; AVX-LABEL: constrained_vector_sin_v1f32:
1465 ; AVX: # %bb.0: # %entry
1466 ; AVX-NEXT: pushq %rax
1467 ; AVX-NEXT: .cfi_def_cfa_offset 16
1468 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1469 ; AVX-NEXT: callq sinf
1470 ; AVX-NEXT: popq %rax
1471 ; AVX-NEXT: .cfi_def_cfa_offset 8
1472 ; AVX-NEXT: retq
1473 entry:
1474 %sin = call <1 x float> @llvm.experimental.constrained.sin.v1f32(
1475 <1 x float> <float 42.0>,
1476 metadata !"round.dynamic",
1477 metadata !"fpexcept.strict")
1478 ret <1 x float> %sin
1479 }
1481 define <2 x double> @constrained_vector_sin_v2f64() {
1482 ; CHECK-LABEL: constrained_vector_sin_v2f64:
1483 ; CHECK: # %bb.0: # %entry
1484 ; CHECK-NEXT: subq $24, %rsp
1485 ; CHECK-NEXT: .cfi_def_cfa_offset 32
1486 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1487 ; CHECK-NEXT: callq sin
1488 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1489 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1490 ; CHECK-NEXT: callq sin
1491 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
1492 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
1493 ; CHECK-NEXT: addq $24, %rsp
1494 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1495 ; CHECK-NEXT: retq
1496 ;
1497 ; AVX-LABEL: constrained_vector_sin_v2f64:
1498 ; AVX: # %bb.0: # %entry
1499 ; AVX-NEXT: subq $24, %rsp
1500 ; AVX-NEXT: .cfi_def_cfa_offset 32
1501 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1502 ; AVX-NEXT: callq sin
1503 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1504 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1505 ; AVX-NEXT: callq sin
1506 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1507 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1508 ; AVX-NEXT: addq $24, %rsp
1509 ; AVX-NEXT: .cfi_def_cfa_offset 8
1510 ; AVX-NEXT: retq
1511 entry:
1512 %sin = call <2 x double> @llvm.experimental.constrained.sin.v2f64(
1513 <2 x double> <double 42.0, double 42.1>,
1514 metadata !"round.dynamic",
1515 metadata !"fpexcept.strict")
1516 ret <2 x double> %sin
1517 }
1519 define <3 x float> @constrained_vector_sin_v3f32() {
1520 ; CHECK-LABEL: constrained_vector_sin_v3f32:
1521 ; CHECK: # %bb.0: # %entry
1522 ; CHECK-NEXT: subq $40, %rsp
1523 ; CHECK-NEXT: .cfi_def_cfa_offset 48
1524 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1525 ; CHECK-NEXT: callq sinf
1526 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1527 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1528 ; CHECK-NEXT: callq sinf
1529 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1530 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1531 ; CHECK-NEXT: callq sinf
1532 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
1533 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1534 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
1535 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
1536 ; CHECK-NEXT: movaps %xmm1, %xmm0
1537 ; CHECK-NEXT: addq $40, %rsp
1538 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1539 ; CHECK-NEXT: retq
1540 ;
1541 ; AVX-LABEL: constrained_vector_sin_v3f32:
1542 ; AVX: # %bb.0: # %entry
1543 ; AVX-NEXT: subq $40, %rsp
1544 ; AVX-NEXT: .cfi_def_cfa_offset 48
1545 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1546 ; AVX-NEXT: callq sinf
1547 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1548 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1549 ; AVX-NEXT: callq sinf
1550 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1551 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1552 ; AVX-NEXT: callq sinf
1553 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
1554 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
1555 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
1556 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
1557 ; AVX-NEXT: addq $40, %rsp
1558 ; AVX-NEXT: .cfi_def_cfa_offset 8
1559 ; AVX-NEXT: retq
1560 entry:
1561 %sin = call <3 x float> @llvm.experimental.constrained.sin.v3f32(
1562 <3 x float> <float 42.0, float 43.0, float 44.0>,
1563 metadata !"round.dynamic",
1564 metadata !"fpexcept.strict")
1565 ret <3 x float> %sin
1566 }
1568 define <3 x double> @constrained_vector_sin_v3f64() {
1569 ; CHECK-LABEL: constrained_vector_sin_v3f64:
1570 ; CHECK: # %bb.0: # %entry
1571 ; CHECK-NEXT: subq $24, %rsp
1572 ; CHECK-NEXT: .cfi_def_cfa_offset 32
1573 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1574 ; CHECK-NEXT: callq sin
1575 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
1576 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1577 ; CHECK-NEXT: callq sin
1578 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
1579 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1580 ; CHECK-NEXT: callq sin
1581 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
1582 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
1583 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
1584 ; CHECK-NEXT: # xmm0 = mem[0],zero
1585 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
1586 ; CHECK-NEXT: # xmm1 = mem[0],zero
1587 ; CHECK-NEXT: addq $24, %rsp
1588 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1589 ; CHECK-NEXT: retq
1590 ;
1591 ; AVX-LABEL: constrained_vector_sin_v3f64:
1592 ; AVX: # %bb.0: # %entry
1593 ; AVX-NEXT: subq $56, %rsp
1594 ; AVX-NEXT: .cfi_def_cfa_offset 64
1595 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1596 ; AVX-NEXT: callq sin
1597 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1598 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1599 ; AVX-NEXT: callq sin
1600 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1601 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1602 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
1603 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1604 ; AVX-NEXT: vzeroupper
1605 ; AVX-NEXT: callq sin
1606 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
1607 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1608 ; AVX-NEXT: addq $56, %rsp
1609 ; AVX-NEXT: .cfi_def_cfa_offset 8
1610 ; AVX-NEXT: retq
1611 entry:
1612 %sin = call <3 x double> @llvm.experimental.constrained.sin.v3f64(
1613 <3 x double> <double 42.0, double 42.1, double 42.2>,
1614 metadata !"round.dynamic",
1615 metadata !"fpexcept.strict")
1616 ret <3 x double> %sin
1617 }
1619 define <4 x double> @constrained_vector_sin_v4f64() {
1620 ; CHECK-LABEL: constrained_vector_sin_v4f64:
1621 ; CHECK: # %bb.0: # %entry
1622 ; CHECK-NEXT: subq $40, %rsp
1623 ; CHECK-NEXT: .cfi_def_cfa_offset 48
1624 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1625 ; CHECK-NEXT: callq sin
1626 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1627 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1628 ; CHECK-NEXT: callq sin
1629 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
1630 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
1631 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1632 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1633 ; CHECK-NEXT: callq sin
1634 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1635 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1636 ; CHECK-NEXT: callq sin
1637 ; CHECK-NEXT: movaps %xmm0, %xmm1
1638 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
1639 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
1640 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
1641 ; CHECK-NEXT: addq $40, %rsp
1642 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1643 ; CHECK-NEXT: retq
1644 ;
1645 ; AVX-LABEL: constrained_vector_sin_v4f64:
1646 ; AVX: # %bb.0: # %entry
1647 ; AVX-NEXT: subq $40, %rsp
1648 ; AVX-NEXT: .cfi_def_cfa_offset 48
1649 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1650 ; AVX-NEXT: callq sin
1651 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1652 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1653 ; AVX-NEXT: callq sin
1654 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1655 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1656 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1657 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1658 ; AVX-NEXT: callq sin
1659 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1660 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1661 ; AVX-NEXT: callq sin
1662 ; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
1663 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1664 ; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload
1665 ; AVX-NEXT: addq $40, %rsp
1666 ; AVX-NEXT: .cfi_def_cfa_offset 8
1667 ; AVX-NEXT: retq
1668 entry:
1669 %sin = call <4 x double> @llvm.experimental.constrained.sin.v4f64(
1670 <4 x double> <double 42.0, double 42.1,
1671 double 42.2, double 42.3>,
1672 metadata !"round.dynamic",
1673 metadata !"fpexcept.strict")
1674 ret <4 x double> %sin
1675 }
1677 define <1 x float> @constrained_vector_cos_v1f32() {
1678 ; CHECK-LABEL: constrained_vector_cos_v1f32:
1679 ; CHECK: # %bb.0: # %entry
1680 ; CHECK-NEXT: pushq %rax
1681 ; CHECK-NEXT: .cfi_def_cfa_offset 16
1682 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1683 ; CHECK-NEXT: callq cosf
1684 ; CHECK-NEXT: popq %rax
1685 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1686 ; CHECK-NEXT: retq
1687 ;
1688 ; AVX-LABEL: constrained_vector_cos_v1f32:
1689 ; AVX: # %bb.0: # %entry
1690 ; AVX-NEXT: pushq %rax
1691 ; AVX-NEXT: .cfi_def_cfa_offset 16
1692 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1693 ; AVX-NEXT: callq cosf
1694 ; AVX-NEXT: popq %rax
1695 ; AVX-NEXT: .cfi_def_cfa_offset 8
1696 ; AVX-NEXT: retq
1697 entry:
1698 %cos = call <1 x float> @llvm.experimental.constrained.cos.v1f32(
1699 <1 x float> <float 42.0>,
1700 metadata !"round.dynamic",
1701 metadata !"fpexcept.strict")
1702 ret <1 x float> %cos
1703 }
1705 define <2 x double> @constrained_vector_cos_v2f64() {
1706 ; CHECK-LABEL: constrained_vector_cos_v2f64:
1707 ; CHECK: # %bb.0: # %entry
1708 ; CHECK-NEXT: subq $24, %rsp
1709 ; CHECK-NEXT: .cfi_def_cfa_offset 32
1710 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1711 ; CHECK-NEXT: callq cos
1712 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1713 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1714 ; CHECK-NEXT: callq cos
1715 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
1716 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
1717 ; CHECK-NEXT: addq $24, %rsp
1718 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1719 ; CHECK-NEXT: retq
1720 ;
1721 ; AVX-LABEL: constrained_vector_cos_v2f64:
1722 ; AVX: # %bb.0: # %entry
1723 ; AVX-NEXT: subq $24, %rsp
1724 ; AVX-NEXT: .cfi_def_cfa_offset 32
1725 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1726 ; AVX-NEXT: callq cos
1727 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1728 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1729 ; AVX-NEXT: callq cos
1730 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1731 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1732 ; AVX-NEXT: addq $24, %rsp
1733 ; AVX-NEXT: .cfi_def_cfa_offset 8
1734 ; AVX-NEXT: retq
1735 entry:
1736 %cos = call <2 x double> @llvm.experimental.constrained.cos.v2f64(
1737 <2 x double> <double 42.0, double 42.1>,
1738 metadata !"round.dynamic",
1739 metadata !"fpexcept.strict")
1740 ret <2 x double> %cos
1741 }
1743 define <3 x float> @constrained_vector_cos_v3f32() {
1744 ; CHECK-LABEL: constrained_vector_cos_v3f32:
1745 ; CHECK: # %bb.0: # %entry
1746 ; CHECK-NEXT: subq $40, %rsp
1747 ; CHECK-NEXT: .cfi_def_cfa_offset 48
1748 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1749 ; CHECK-NEXT: callq cosf
1750 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1751 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1752 ; CHECK-NEXT: callq cosf
1753 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1754 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1755 ; CHECK-NEXT: callq cosf
1756 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
1757 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1758 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
1759 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
1760 ; CHECK-NEXT: movaps %xmm1, %xmm0
1761 ; CHECK-NEXT: addq $40, %rsp
1762 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1763 ; CHECK-NEXT: retq
1764 ;
1765 ; AVX-LABEL: constrained_vector_cos_v3f32:
1766 ; AVX: # %bb.0: # %entry
1767 ; AVX-NEXT: subq $40, %rsp
1768 ; AVX-NEXT: .cfi_def_cfa_offset 48
1769 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1770 ; AVX-NEXT: callq cosf
1771 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1772 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1773 ; AVX-NEXT: callq cosf
1774 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1775 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1776 ; AVX-NEXT: callq cosf
1777 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
1778 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
1779 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
1780 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
1781 ; AVX-NEXT: addq $40, %rsp
1782 ; AVX-NEXT: .cfi_def_cfa_offset 8
1783 ; AVX-NEXT: retq
1784 entry:
1785 %cos = call <3 x float> @llvm.experimental.constrained.cos.v3f32(
1786 <3 x float> <float 42.0, float 43.0, float 44.0>,
1787 metadata !"round.dynamic",
1788 metadata !"fpexcept.strict")
1789 ret <3 x float> %cos
1790 }
1792 define <3 x double> @constrained_vector_cos_v3f64() {
1793 ; CHECK-LABEL: constrained_vector_cos_v3f64:
1794 ; CHECK: # %bb.0: # %entry
1795 ; CHECK-NEXT: subq $24, %rsp
1796 ; CHECK-NEXT: .cfi_def_cfa_offset 32
1797 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1798 ; CHECK-NEXT: callq cos
1799 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
1800 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1801 ; CHECK-NEXT: callq cos
1802 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
1803 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1804 ; CHECK-NEXT: callq cos
1805 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
1806 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
1807 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
1808 ; CHECK-NEXT: # xmm0 = mem[0],zero
1809 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
1810 ; CHECK-NEXT: # xmm1 = mem[0],zero
1811 ; CHECK-NEXT: addq $24, %rsp
1812 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1813 ; CHECK-NEXT: retq
1814 ;
1815 ; AVX-LABEL: constrained_vector_cos_v3f64:
1816 ; AVX: # %bb.0: # %entry
1817 ; AVX-NEXT: subq $56, %rsp
1818 ; AVX-NEXT: .cfi_def_cfa_offset 64
1819 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1820 ; AVX-NEXT: callq cos
1821 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1822 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1823 ; AVX-NEXT: callq cos
1824 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1825 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1826 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
1827 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1828 ; AVX-NEXT: vzeroupper
1829 ; AVX-NEXT: callq cos
1830 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
1831 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
1832 ; AVX-NEXT: addq $56, %rsp
1833 ; AVX-NEXT: .cfi_def_cfa_offset 8
1834 ; AVX-NEXT: retq
1835 entry:
1836 %cos = call <3 x double> @llvm.experimental.constrained.cos.v3f64(
1837 <3 x double> <double 42.0, double 42.1, double 42.2>,
1838 metadata !"round.dynamic",
1839 metadata !"fpexcept.strict")
1840 ret <3 x double> %cos
1841 }
1843 define <4 x double> @constrained_vector_cos_v4f64() {
1844 ; CHECK-LABEL: constrained_vector_cos_v4f64:
1845 ; CHECK: # %bb.0: # %entry
1846 ; CHECK-NEXT: subq $40, %rsp
1847 ; CHECK-NEXT: .cfi_def_cfa_offset 48
1848 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1849 ; CHECK-NEXT: callq cos
1850 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1851 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1852 ; CHECK-NEXT: callq cos
1853 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
1854 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
1855 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1856 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1857 ; CHECK-NEXT: callq cos
1858 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1859 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1860 ; CHECK-NEXT: callq cos
1861 ; CHECK-NEXT: movaps %xmm0, %xmm1
1862 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
1863 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
1864 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
1865 ; CHECK-NEXT: addq $40, %rsp
1866 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1867 ; CHECK-NEXT: retq
1868 ;
1869 ; AVX-LABEL: constrained_vector_cos_v4f64:
1870 ; AVX: # %bb.0: # %entry
1871 ; AVX-NEXT: subq $40, %rsp
1872 ; AVX-NEXT: .cfi_def_cfa_offset 48
1873 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1874 ; AVX-NEXT: callq cos
1875 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1876 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1877 ; AVX-NEXT: callq cos
1878 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1879 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1880 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1881 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1882 ; AVX-NEXT: callq cos
1883 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1884 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1885 ; AVX-NEXT: callq cos
1886 ; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
1887 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1888 ; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload
1889 ; AVX-NEXT: addq $40, %rsp
1890 ; AVX-NEXT: .cfi_def_cfa_offset 8
1891 ; AVX-NEXT: retq
1892 entry:
1893 %cos = call <4 x double> @llvm.experimental.constrained.cos.v4f64(
1894 <4 x double> <double 42.0, double 42.1,
1895 double 42.2, double 42.3>,
1896 metadata !"round.dynamic",
1897 metadata !"fpexcept.strict")
1898 ret <4 x double> %cos
1899 }
1901 define <1 x float> @constrained_vector_exp_v1f32() {
1902 ; CHECK-LABEL: constrained_vector_exp_v1f32:
1903 ; CHECK: # %bb.0: # %entry
1904 ; CHECK-NEXT: pushq %rax
1905 ; CHECK-NEXT: .cfi_def_cfa_offset 16
1906 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1907 ; CHECK-NEXT: callq expf
1908 ; CHECK-NEXT: popq %rax
1909 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1910 ; CHECK-NEXT: retq
1911 ;
1912 ; AVX-LABEL: constrained_vector_exp_v1f32:
1913 ; AVX: # %bb.0: # %entry
1914 ; AVX-NEXT: pushq %rax
1915 ; AVX-NEXT: .cfi_def_cfa_offset 16
1916 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1917 ; AVX-NEXT: callq expf
1918 ; AVX-NEXT: popq %rax
1919 ; AVX-NEXT: .cfi_def_cfa_offset 8
1920 ; AVX-NEXT: retq
1921 entry:
1922 %exp = call <1 x float> @llvm.experimental.constrained.exp.v1f32(
1923 <1 x float> <float 42.0>,
1924 metadata !"round.dynamic",
1925 metadata !"fpexcept.strict")
1926 ret <1 x float> %exp
1927 }
1929 define <2 x double> @constrained_vector_exp_v2f64() {
1930 ; CHECK-LABEL: constrained_vector_exp_v2f64:
1931 ; CHECK: # %bb.0: # %entry
1932 ; CHECK-NEXT: subq $24, %rsp
1933 ; CHECK-NEXT: .cfi_def_cfa_offset 32
1934 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1935 ; CHECK-NEXT: callq exp
1936 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1937 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1938 ; CHECK-NEXT: callq exp
1939 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
1940 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
1941 ; CHECK-NEXT: addq $24, %rsp
1942 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1943 ; CHECK-NEXT: retq
1944 ;
1945 ; AVX-LABEL: constrained_vector_exp_v2f64:
1946 ; AVX: # %bb.0: # %entry
1947 ; AVX-NEXT: subq $24, %rsp
1948 ; AVX-NEXT: .cfi_def_cfa_offset 32
1949 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1950 ; AVX-NEXT: callq exp
1951 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1952 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1953 ; AVX-NEXT: callq exp
1954 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
1955 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
1956 ; AVX-NEXT: addq $24, %rsp
1957 ; AVX-NEXT: .cfi_def_cfa_offset 8
1958 ; AVX-NEXT: retq
1959 entry:
1960 %exp = call <2 x double> @llvm.experimental.constrained.exp.v2f64(
1961 <2 x double> <double 42.0, double 42.1>,
1962 metadata !"round.dynamic",
1963 metadata !"fpexcept.strict")
1964 ret <2 x double> %exp
1965 }
1967 define <3 x float> @constrained_vector_exp_v3f32() {
1968 ; CHECK-LABEL: constrained_vector_exp_v3f32:
1969 ; CHECK: # %bb.0: # %entry
1970 ; CHECK-NEXT: subq $40, %rsp
1971 ; CHECK-NEXT: .cfi_def_cfa_offset 48
1972 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1973 ; CHECK-NEXT: callq expf
1974 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1975 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1976 ; CHECK-NEXT: callq expf
1977 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1978 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1979 ; CHECK-NEXT: callq expf
1980 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
1981 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1982 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
1983 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
1984 ; CHECK-NEXT: movaps %xmm1, %xmm0
1985 ; CHECK-NEXT: addq $40, %rsp
1986 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1987 ; CHECK-NEXT: retq
1988 ;
1989 ; AVX-LABEL: constrained_vector_exp_v3f32:
1990 ; AVX: # %bb.0: # %entry
1991 ; AVX-NEXT: subq $40, %rsp
1992 ; AVX-NEXT: .cfi_def_cfa_offset 48
1993 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1994 ; AVX-NEXT: callq expf
1995 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1996 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1997 ; AVX-NEXT: callq expf
1998 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
1999 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2000 ; AVX-NEXT: callq expf
2001 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
2002 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
2003 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
2004 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
2005 ; AVX-NEXT: addq $40, %rsp
2006 ; AVX-NEXT: .cfi_def_cfa_offset 8
2007 ; AVX-NEXT: retq
2008 entry:
2009 %exp = call <3 x float> @llvm.experimental.constrained.exp.v3f32(
2010 <3 x float> <float 42.0, float 43.0, float 44.0>,
2011 metadata !"round.dynamic",
2012 metadata !"fpexcept.strict")
2013 ret <3 x float> %exp
2014 }
2016 define <3 x double> @constrained_vector_exp_v3f64() {
2017 ; CHECK-LABEL: constrained_vector_exp_v3f64:
2018 ; CHECK: # %bb.0: # %entry
2019 ; CHECK-NEXT: subq $24, %rsp
2020 ; CHECK-NEXT: .cfi_def_cfa_offset 32
2021 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2022 ; CHECK-NEXT: callq exp
2023 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
2024 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2025 ; CHECK-NEXT: callq exp
2026 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
2027 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2028 ; CHECK-NEXT: callq exp
2029 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
2030 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
2031 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
2032 ; CHECK-NEXT: # xmm0 = mem[0],zero
2033 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
2034 ; CHECK-NEXT: # xmm1 = mem[0],zero
2035 ; CHECK-NEXT: addq $24, %rsp
2036 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2037 ; CHECK-NEXT: retq
2038 ;
2039 ; AVX-LABEL: constrained_vector_exp_v3f64:
2040 ; AVX: # %bb.0: # %entry
2041 ; AVX-NEXT: subq $56, %rsp
2042 ; AVX-NEXT: .cfi_def_cfa_offset 64
2043 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2044 ; AVX-NEXT: callq exp
2045 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2046 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2047 ; AVX-NEXT: callq exp
2048 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2049 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2050 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
2051 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2052 ; AVX-NEXT: vzeroupper
2053 ; AVX-NEXT: callq exp
2054 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
2055 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
2056 ; AVX-NEXT: addq $56, %rsp
2057 ; AVX-NEXT: .cfi_def_cfa_offset 8
2058 ; AVX-NEXT: retq
2059 entry:
2060 %exp = call <3 x double> @llvm.experimental.constrained.exp.v3f64(
2061 <3 x double> <double 42.0, double 42.1, double 42.2>,
2062 metadata !"round.dynamic",
2063 metadata !"fpexcept.strict")
2064 ret <3 x double> %exp
2065 }
2067 define <4 x double> @constrained_vector_exp_v4f64() {
2068 ; CHECK-LABEL: constrained_vector_exp_v4f64:
2069 ; CHECK: # %bb.0: # %entry
2070 ; CHECK-NEXT: subq $40, %rsp
2071 ; CHECK-NEXT: .cfi_def_cfa_offset 48
2072 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2073 ; CHECK-NEXT: callq exp
2074 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2075 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2076 ; CHECK-NEXT: callq exp
2077 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
2078 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
2079 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2080 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2081 ; CHECK-NEXT: callq exp
2082 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2083 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2084 ; CHECK-NEXT: callq exp
2085 ; CHECK-NEXT: movaps %xmm0, %xmm1
2086 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
2087 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
2088 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
2089 ; CHECK-NEXT: addq $40, %rsp
2090 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2091 ; CHECK-NEXT: retq
2092 ;
2093 ; AVX-LABEL: constrained_vector_exp_v4f64:
2094 ; AVX: # %bb.0: # %entry
2095 ; AVX-NEXT: subq $40, %rsp
2096 ; AVX-NEXT: .cfi_def_cfa_offset 48
2097 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2098 ; AVX-NEXT: callq exp
2099 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2100 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2101 ; AVX-NEXT: callq exp
2102 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2103 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2104 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2105 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2106 ; AVX-NEXT: callq exp
2107 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2108 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2109 ; AVX-NEXT: callq exp
2110 ; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
2111 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2112 ; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload
2113 ; AVX-NEXT: addq $40, %rsp
2114 ; AVX-NEXT: .cfi_def_cfa_offset 8
2115 ; AVX-NEXT: retq
2116 entry:
2117 %exp = call <4 x double> @llvm.experimental.constrained.exp.v4f64(
2118 <4 x double> <double 42.0, double 42.1,
2119 double 42.2, double 42.3>,
2120 metadata !"round.dynamic",
2121 metadata !"fpexcept.strict")
2122 ret <4 x double> %exp
2123 }
2125 define <1 x float> @constrained_vector_exp2_v1f32() {
2126 ; CHECK-LABEL: constrained_vector_exp2_v1f32:
2127 ; CHECK: # %bb.0: # %entry
2128 ; CHECK-NEXT: pushq %rax
2129 ; CHECK-NEXT: .cfi_def_cfa_offset 16
2130 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2131 ; CHECK-NEXT: callq exp2f
2132 ; CHECK-NEXT: popq %rax
2133 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2134 ; CHECK-NEXT: retq
2135 ;
2136 ; AVX-LABEL: constrained_vector_exp2_v1f32:
2137 ; AVX: # %bb.0: # %entry
2138 ; AVX-NEXT: pushq %rax
2139 ; AVX-NEXT: .cfi_def_cfa_offset 16
2140 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2141 ; AVX-NEXT: callq exp2f
2142 ; AVX-NEXT: popq %rax
2143 ; AVX-NEXT: .cfi_def_cfa_offset 8
2144 ; AVX-NEXT: retq
2145 entry:
2146 %exp2 = call <1 x float> @llvm.experimental.constrained.exp2.v1f32(
2147 <1 x float> <float 42.0>,
2148 metadata !"round.dynamic",
2149 metadata !"fpexcept.strict")
2150 ret <1 x float> %exp2
2151 }
2153 define <2 x double> @constrained_vector_exp2_v2f64() {
2154 ; CHECK-LABEL: constrained_vector_exp2_v2f64:
2155 ; CHECK: # %bb.0: # %entry
2156 ; CHECK-NEXT: subq $24, %rsp
2157 ; CHECK-NEXT: .cfi_def_cfa_offset 32
2158 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2159 ; CHECK-NEXT: callq exp2
2160 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2161 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2162 ; CHECK-NEXT: callq exp2
2163 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
2164 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
2165 ; CHECK-NEXT: addq $24, %rsp
2166 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2167 ; CHECK-NEXT: retq
2168 ;
2169 ; AVX-LABEL: constrained_vector_exp2_v2f64:
2170 ; AVX: # %bb.0: # %entry
2171 ; AVX-NEXT: subq $24, %rsp
2172 ; AVX-NEXT: .cfi_def_cfa_offset 32
2173 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2174 ; AVX-NEXT: callq exp2
2175 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2176 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2177 ; AVX-NEXT: callq exp2
2178 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2179 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2180 ; AVX-NEXT: addq $24, %rsp
2181 ; AVX-NEXT: .cfi_def_cfa_offset 8
2182 ; AVX-NEXT: retq
2183 entry:
2184 %exp2 = call <2 x double> @llvm.experimental.constrained.exp2.v2f64(
2185 <2 x double> <double 42.1, double 42.0>,
2186 metadata !"round.dynamic",
2187 metadata !"fpexcept.strict")
2188 ret <2 x double> %exp2
2189 }
2191 define <3 x float> @constrained_vector_exp2_v3f32() {
2192 ; CHECK-LABEL: constrained_vector_exp2_v3f32:
2193 ; CHECK: # %bb.0: # %entry
2194 ; CHECK-NEXT: subq $40, %rsp
2195 ; CHECK-NEXT: .cfi_def_cfa_offset 48
2196 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2197 ; CHECK-NEXT: callq exp2f
2198 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2199 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2200 ; CHECK-NEXT: callq exp2f
2201 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2202 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2203 ; CHECK-NEXT: callq exp2f
2204 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
2205 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
2206 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
2207 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
2208 ; CHECK-NEXT: movaps %xmm1, %xmm0
2209 ; CHECK-NEXT: addq $40, %rsp
2210 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2211 ; CHECK-NEXT: retq
2212 ;
2213 ; AVX-LABEL: constrained_vector_exp2_v3f32:
2214 ; AVX: # %bb.0: # %entry
2215 ; AVX-NEXT: subq $40, %rsp
2216 ; AVX-NEXT: .cfi_def_cfa_offset 48
2217 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2218 ; AVX-NEXT: callq exp2f
2219 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2220 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2221 ; AVX-NEXT: callq exp2f
2222 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2223 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2224 ; AVX-NEXT: callq exp2f
2225 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
2226 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
2227 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
2228 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
2229 ; AVX-NEXT: addq $40, %rsp
2230 ; AVX-NEXT: .cfi_def_cfa_offset 8
2231 ; AVX-NEXT: retq
2232 entry:
2233 %exp2 = call <3 x float> @llvm.experimental.constrained.exp2.v3f32(
2234 <3 x float> <float 42.0, float 43.0, float 44.0>,
2235 metadata !"round.dynamic",
2236 metadata !"fpexcept.strict")
2237 ret <3 x float> %exp2
2238 }
2240 define <3 x double> @constrained_vector_exp2_v3f64() {
2241 ; CHECK-LABEL: constrained_vector_exp2_v3f64:
2242 ; CHECK: # %bb.0: # %entry
2243 ; CHECK-NEXT: subq $24, %rsp
2244 ; CHECK-NEXT: .cfi_def_cfa_offset 32
2245 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2246 ; CHECK-NEXT: callq exp2
2247 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
2248 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2249 ; CHECK-NEXT: callq exp2
2250 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
2251 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2252 ; CHECK-NEXT: callq exp2
2253 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
2254 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
2255 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
2256 ; CHECK-NEXT: # xmm0 = mem[0],zero
2257 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
2258 ; CHECK-NEXT: # xmm1 = mem[0],zero
2259 ; CHECK-NEXT: addq $24, %rsp
2260 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2261 ; CHECK-NEXT: retq
2262 ;
2263 ; AVX-LABEL: constrained_vector_exp2_v3f64:
2264 ; AVX: # %bb.0: # %entry
2265 ; AVX-NEXT: subq $56, %rsp
2266 ; AVX-NEXT: .cfi_def_cfa_offset 64
2267 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2268 ; AVX-NEXT: callq exp2
2269 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2270 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2271 ; AVX-NEXT: callq exp2
2272 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2273 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2274 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
2275 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2276 ; AVX-NEXT: vzeroupper
2277 ; AVX-NEXT: callq exp2
2278 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
2279 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
2280 ; AVX-NEXT: addq $56, %rsp
2281 ; AVX-NEXT: .cfi_def_cfa_offset 8
2282 ; AVX-NEXT: retq
2283 entry:
2284 %exp2 = call <3 x double> @llvm.experimental.constrained.exp2.v3f64(
2285 <3 x double> <double 42.0, double 42.1, double 42.2>,
2286 metadata !"round.dynamic",
2287 metadata !"fpexcept.strict")
2288 ret <3 x double> %exp2
2289 }
2291 define <4 x double> @constrained_vector_exp2_v4f64() {
2292 ; CHECK-LABEL: constrained_vector_exp2_v4f64:
2293 ; CHECK: # %bb.0: # %entry
2294 ; CHECK-NEXT: subq $40, %rsp
2295 ; CHECK-NEXT: .cfi_def_cfa_offset 48
2296 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2297 ; CHECK-NEXT: callq exp2
2298 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2299 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2300 ; CHECK-NEXT: callq exp2
2301 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
2302 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
2303 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2304 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2305 ; CHECK-NEXT: callq exp2
2306 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2307 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2308 ; CHECK-NEXT: callq exp2
2309 ; CHECK-NEXT: movaps %xmm0, %xmm1
2310 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
2311 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
2312 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
2313 ; CHECK-NEXT: addq $40, %rsp
2314 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2315 ; CHECK-NEXT: retq
2316 ;
2317 ; AVX-LABEL: constrained_vector_exp2_v4f64:
2318 ; AVX: # %bb.0: # %entry
2319 ; AVX-NEXT: subq $40, %rsp
2320 ; AVX-NEXT: .cfi_def_cfa_offset 48
2321 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2322 ; AVX-NEXT: callq exp2
2323 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2324 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2325 ; AVX-NEXT: callq exp2
2326 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2327 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2328 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2329 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2330 ; AVX-NEXT: callq exp2
2331 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2332 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2333 ; AVX-NEXT: callq exp2
2334 ; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
2335 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2336 ; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload
2337 ; AVX-NEXT: addq $40, %rsp
2338 ; AVX-NEXT: .cfi_def_cfa_offset 8
2339 ; AVX-NEXT: retq
2340 entry:
2341 %exp2 = call <4 x double> @llvm.experimental.constrained.exp2.v4f64(
2342 <4 x double> <double 42.1, double 42.2,
2343 double 42.3, double 42.4>,
2344 metadata !"round.dynamic",
2345 metadata !"fpexcept.strict")
2346 ret <4 x double> %exp2
2347 }
2349 define <1 x float> @constrained_vector_log_v1f32() {
2350 ; CHECK-LABEL: constrained_vector_log_v1f32:
2351 ; CHECK: # %bb.0: # %entry
2352 ; CHECK-NEXT: pushq %rax
2353 ; CHECK-NEXT: .cfi_def_cfa_offset 16
2354 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2355 ; CHECK-NEXT: callq logf
2356 ; CHECK-NEXT: popq %rax
2357 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2358 ; CHECK-NEXT: retq
2359 ;
2360 ; AVX-LABEL: constrained_vector_log_v1f32:
2361 ; AVX: # %bb.0: # %entry
2362 ; AVX-NEXT: pushq %rax
2363 ; AVX-NEXT: .cfi_def_cfa_offset 16
2364 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2365 ; AVX-NEXT: callq logf
2366 ; AVX-NEXT: popq %rax
2367 ; AVX-NEXT: .cfi_def_cfa_offset 8
2368 ; AVX-NEXT: retq
2369 entry:
2370 %log = call <1 x float> @llvm.experimental.constrained.log.v1f32(
2371 <1 x float> <float 42.0>,
2372 metadata !"round.dynamic",
2373 metadata !"fpexcept.strict")
2374 ret <1 x float> %log
2375 }
2377 define <2 x double> @constrained_vector_log_v2f64() {
2378 ; CHECK-LABEL: constrained_vector_log_v2f64:
2379 ; CHECK: # %bb.0: # %entry
2380 ; CHECK-NEXT: subq $24, %rsp
2381 ; CHECK-NEXT: .cfi_def_cfa_offset 32
2382 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2383 ; CHECK-NEXT: callq log
2384 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2385 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2386 ; CHECK-NEXT: callq log
2387 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
2388 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
2389 ; CHECK-NEXT: addq $24, %rsp
2390 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2391 ; CHECK-NEXT: retq
2392 ;
2393 ; AVX-LABEL: constrained_vector_log_v2f64:
2394 ; AVX: # %bb.0: # %entry
2395 ; AVX-NEXT: subq $24, %rsp
2396 ; AVX-NEXT: .cfi_def_cfa_offset 32
2397 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2398 ; AVX-NEXT: callq log
2399 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2400 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2401 ; AVX-NEXT: callq log
2402 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2403 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2404 ; AVX-NEXT: addq $24, %rsp
2405 ; AVX-NEXT: .cfi_def_cfa_offset 8
2406 ; AVX-NEXT: retq
2407 entry:
2408 %log = call <2 x double> @llvm.experimental.constrained.log.v2f64(
2409 <2 x double> <double 42.0, double 42.1>,
2410 metadata !"round.dynamic",
2411 metadata !"fpexcept.strict")
2412 ret <2 x double> %log
2413 }
2415 define <3 x float> @constrained_vector_log_v3f32() {
2416 ; CHECK-LABEL: constrained_vector_log_v3f32:
2417 ; CHECK: # %bb.0: # %entry
2418 ; CHECK-NEXT: subq $40, %rsp
2419 ; CHECK-NEXT: .cfi_def_cfa_offset 48
2420 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2421 ; CHECK-NEXT: callq logf
2422 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2423 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2424 ; CHECK-NEXT: callq logf
2425 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2426 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2427 ; CHECK-NEXT: callq logf
2428 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
2429 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
2430 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
2431 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
2432 ; CHECK-NEXT: movaps %xmm1, %xmm0
2433 ; CHECK-NEXT: addq $40, %rsp
2434 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2435 ; CHECK-NEXT: retq
2436 ;
2437 ; AVX-LABEL: constrained_vector_log_v3f32:
2438 ; AVX: # %bb.0: # %entry
2439 ; AVX-NEXT: subq $40, %rsp
2440 ; AVX-NEXT: .cfi_def_cfa_offset 48
2441 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2442 ; AVX-NEXT: callq logf
2443 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2444 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2445 ; AVX-NEXT: callq logf
2446 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2447 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2448 ; AVX-NEXT: callq logf
2449 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
2450 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
2451 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
2452 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
2453 ; AVX-NEXT: addq $40, %rsp
2454 ; AVX-NEXT: .cfi_def_cfa_offset 8
2455 ; AVX-NEXT: retq
2456 entry:
2457 %log = call <3 x float> @llvm.experimental.constrained.log.v3f32(
2458 <3 x float> <float 42.0, float 43.0, float 44.0>,
2459 metadata !"round.dynamic",
2460 metadata !"fpexcept.strict")
2461 ret <3 x float> %log
2462 }
2464 define <3 x double> @constrained_vector_log_v3f64() {
2465 ; CHECK-LABEL: constrained_vector_log_v3f64:
2466 ; CHECK: # %bb.0: # %entry
2467 ; CHECK-NEXT: subq $24, %rsp
2468 ; CHECK-NEXT: .cfi_def_cfa_offset 32
2469 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2470 ; CHECK-NEXT: callq log
2471 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
2472 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2473 ; CHECK-NEXT: callq log
2474 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
2475 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2476 ; CHECK-NEXT: callq log
2477 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
2478 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
2479 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
2480 ; CHECK-NEXT: # xmm0 = mem[0],zero
2481 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
2482 ; CHECK-NEXT: # xmm1 = mem[0],zero
2483 ; CHECK-NEXT: addq $24, %rsp
2484 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2485 ; CHECK-NEXT: retq
2486 ;
2487 ; AVX-LABEL: constrained_vector_log_v3f64:
2488 ; AVX: # %bb.0: # %entry
2489 ; AVX-NEXT: subq $56, %rsp
2490 ; AVX-NEXT: .cfi_def_cfa_offset 64
2491 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2492 ; AVX-NEXT: callq log
2493 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2494 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2495 ; AVX-NEXT: callq log
2496 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2497 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2498 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
2499 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2500 ; AVX-NEXT: vzeroupper
2501 ; AVX-NEXT: callq log
2502 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
2503 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
2504 ; AVX-NEXT: addq $56, %rsp
2505 ; AVX-NEXT: .cfi_def_cfa_offset 8
2506 ; AVX-NEXT: retq
2507 entry:
2508 %log = call <3 x double> @llvm.experimental.constrained.log.v3f64(
2509 <3 x double> <double 42.0, double 42.1, double 42.2>,
2510 metadata !"round.dynamic",
2511 metadata !"fpexcept.strict")
2512 ret <3 x double> %log
2513 }
2515 define <4 x double> @constrained_vector_log_v4f64() {
2516 ; CHECK-LABEL: constrained_vector_log_v4f64:
2517 ; CHECK: # %bb.0: # %entry
2518 ; CHECK-NEXT: subq $40, %rsp
2519 ; CHECK-NEXT: .cfi_def_cfa_offset 48
2520 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2521 ; CHECK-NEXT: callq log
2522 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2523 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2524 ; CHECK-NEXT: callq log
2525 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
2526 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
2527 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2528 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2529 ; CHECK-NEXT: callq log
2530 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2531 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2532 ; CHECK-NEXT: callq log
2533 ; CHECK-NEXT: movaps %xmm0, %xmm1
2534 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
2535 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
2536 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
2537 ; CHECK-NEXT: addq $40, %rsp
2538 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2539 ; CHECK-NEXT: retq
2540 ;
2541 ; AVX-LABEL: constrained_vector_log_v4f64:
2542 ; AVX: # %bb.0: # %entry
2543 ; AVX-NEXT: subq $40, %rsp
2544 ; AVX-NEXT: .cfi_def_cfa_offset 48
2545 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2546 ; AVX-NEXT: callq log
2547 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2548 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2549 ; AVX-NEXT: callq log
2550 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2551 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2552 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2553 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2554 ; AVX-NEXT: callq log
2555 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2556 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2557 ; AVX-NEXT: callq log
2558 ; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
2559 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2560 ; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload
2561 ; AVX-NEXT: addq $40, %rsp
2562 ; AVX-NEXT: .cfi_def_cfa_offset 8
2563 ; AVX-NEXT: retq
2564 entry:
2565 %log = call <4 x double> @llvm.experimental.constrained.log.v4f64(
2566 <4 x double> <double 42.0, double 42.1,
2567 double 42.2, double 42.3>,
2568 metadata !"round.dynamic",
2569 metadata !"fpexcept.strict")
2570 ret <4 x double> %log
2571 }
2573 define <1 x float> @constrained_vector_log10_v1f32() {
2574 ; CHECK-LABEL: constrained_vector_log10_v1f32:
2575 ; CHECK: # %bb.0: # %entry
2576 ; CHECK-NEXT: pushq %rax
2577 ; CHECK-NEXT: .cfi_def_cfa_offset 16
2578 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2579 ; CHECK-NEXT: callq log10f
2580 ; CHECK-NEXT: popq %rax
2581 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2582 ; CHECK-NEXT: retq
2583 ;
2584 ; AVX-LABEL: constrained_vector_log10_v1f32:
2585 ; AVX: # %bb.0: # %entry
2586 ; AVX-NEXT: pushq %rax
2587 ; AVX-NEXT: .cfi_def_cfa_offset 16
2588 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2589 ; AVX-NEXT: callq log10f
2590 ; AVX-NEXT: popq %rax
2591 ; AVX-NEXT: .cfi_def_cfa_offset 8
2592 ; AVX-NEXT: retq
2593 entry:
2594 %log10 = call <1 x float> @llvm.experimental.constrained.log10.v1f32(
2595 <1 x float> <float 42.0>,
2596 metadata !"round.dynamic",
2597 metadata !"fpexcept.strict")
2598 ret <1 x float> %log10
2599 }
2601 define <2 x double> @constrained_vector_log10_v2f64() {
2602 ; CHECK-LABEL: constrained_vector_log10_v2f64:
2603 ; CHECK: # %bb.0: # %entry
2604 ; CHECK-NEXT: subq $24, %rsp
2605 ; CHECK-NEXT: .cfi_def_cfa_offset 32
2606 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2607 ; CHECK-NEXT: callq log10
2608 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2609 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2610 ; CHECK-NEXT: callq log10
2611 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
2612 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
2613 ; CHECK-NEXT: addq $24, %rsp
2614 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2615 ; CHECK-NEXT: retq
2616 ;
2617 ; AVX-LABEL: constrained_vector_log10_v2f64:
2618 ; AVX: # %bb.0: # %entry
2619 ; AVX-NEXT: subq $24, %rsp
2620 ; AVX-NEXT: .cfi_def_cfa_offset 32
2621 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2622 ; AVX-NEXT: callq log10
2623 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2624 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2625 ; AVX-NEXT: callq log10
2626 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2627 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2628 ; AVX-NEXT: addq $24, %rsp
2629 ; AVX-NEXT: .cfi_def_cfa_offset 8
2630 ; AVX-NEXT: retq
2631 entry:
2632 %log10 = call <2 x double> @llvm.experimental.constrained.log10.v2f64(
2633 <2 x double> <double 42.0, double 42.1>,
2634 metadata !"round.dynamic",
2635 metadata !"fpexcept.strict")
2636 ret <2 x double> %log10
2637 }
2639 define <3 x float> @constrained_vector_log10_v3f32() {
2640 ; CHECK-LABEL: constrained_vector_log10_v3f32:
2641 ; CHECK: # %bb.0: # %entry
2642 ; CHECK-NEXT: subq $40, %rsp
2643 ; CHECK-NEXT: .cfi_def_cfa_offset 48
2644 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2645 ; CHECK-NEXT: callq log10f
2646 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2647 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2648 ; CHECK-NEXT: callq log10f
2649 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2650 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2651 ; CHECK-NEXT: callq log10f
2652 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
2653 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
2654 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
2655 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
2656 ; CHECK-NEXT: movaps %xmm1, %xmm0
2657 ; CHECK-NEXT: addq $40, %rsp
2658 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2659 ; CHECK-NEXT: retq
2660 ;
2661 ; AVX-LABEL: constrained_vector_log10_v3f32:
2662 ; AVX: # %bb.0: # %entry
2663 ; AVX-NEXT: subq $40, %rsp
2664 ; AVX-NEXT: .cfi_def_cfa_offset 48
2665 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2666 ; AVX-NEXT: callq log10f
2667 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2668 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2669 ; AVX-NEXT: callq log10f
2670 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2671 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2672 ; AVX-NEXT: callq log10f
2673 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
2674 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
2675 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
2676 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
2677 ; AVX-NEXT: addq $40, %rsp
2678 ; AVX-NEXT: .cfi_def_cfa_offset 8
2679 ; AVX-NEXT: retq
2680 entry:
2681 %log10 = call <3 x float> @llvm.experimental.constrained.log10.v3f32(
2682 <3 x float> <float 42.0, float 43.0, float 44.0>,
2683 metadata !"round.dynamic",
2684 metadata !"fpexcept.strict")
2685 ret <3 x float> %log10
2686 }
2688 define <3 x double> @constrained_vector_log10_v3f64() {
2689 ; CHECK-LABEL: constrained_vector_log10_v3f64:
2690 ; CHECK: # %bb.0: # %entry
2691 ; CHECK-NEXT: subq $24, %rsp
2692 ; CHECK-NEXT: .cfi_def_cfa_offset 32
2693 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2694 ; CHECK-NEXT: callq log10
2695 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
2696 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2697 ; CHECK-NEXT: callq log10
2698 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
2699 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2700 ; CHECK-NEXT: callq log10
2701 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
2702 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
2703 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
2704 ; CHECK-NEXT: # xmm0 = mem[0],zero
2705 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
2706 ; CHECK-NEXT: # xmm1 = mem[0],zero
2707 ; CHECK-NEXT: addq $24, %rsp
2708 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2709 ; CHECK-NEXT: retq
2710 ;
2711 ; AVX-LABEL: constrained_vector_log10_v3f64:
2712 ; AVX: # %bb.0: # %entry
2713 ; AVX-NEXT: subq $56, %rsp
2714 ; AVX-NEXT: .cfi_def_cfa_offset 64
2715 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2716 ; AVX-NEXT: callq log10
2717 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2718 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2719 ; AVX-NEXT: callq log10
2720 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2721 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2722 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
2723 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2724 ; AVX-NEXT: vzeroupper
2725 ; AVX-NEXT: callq log10
2726 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
2727 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
2728 ; AVX-NEXT: addq $56, %rsp
2729 ; AVX-NEXT: .cfi_def_cfa_offset 8
2730 ; AVX-NEXT: retq
2731 entry:
2732 %log10 = call <3 x double> @llvm.experimental.constrained.log10.v3f64(
2733 <3 x double> <double 42.0, double 42.1, double 42.2>,
2734 metadata !"round.dynamic",
2735 metadata !"fpexcept.strict")
2736 ret <3 x double> %log10
2737 }
2739 define <4 x double> @constrained_vector_log10_v4f64() {
2740 ; CHECK-LABEL: constrained_vector_log10_v4f64:
2741 ; CHECK: # %bb.0: # %entry
2742 ; CHECK-NEXT: subq $40, %rsp
2743 ; CHECK-NEXT: .cfi_def_cfa_offset 48
2744 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2745 ; CHECK-NEXT: callq log10
2746 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2747 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2748 ; CHECK-NEXT: callq log10
2749 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
2750 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
2751 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2752 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2753 ; CHECK-NEXT: callq log10
2754 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2755 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2756 ; CHECK-NEXT: callq log10
2757 ; CHECK-NEXT: movaps %xmm0, %xmm1
2758 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
2759 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
2760 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
2761 ; CHECK-NEXT: addq $40, %rsp
2762 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2763 ; CHECK-NEXT: retq
2764 ;
2765 ; AVX-LABEL: constrained_vector_log10_v4f64:
2766 ; AVX: # %bb.0: # %entry
2767 ; AVX-NEXT: subq $40, %rsp
2768 ; AVX-NEXT: .cfi_def_cfa_offset 48
2769 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2770 ; AVX-NEXT: callq log10
2771 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2772 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2773 ; AVX-NEXT: callq log10
2774 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2775 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2776 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2777 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2778 ; AVX-NEXT: callq log10
2779 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2780 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2781 ; AVX-NEXT: callq log10
2782 ; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
2783 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2784 ; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload
2785 ; AVX-NEXT: addq $40, %rsp
2786 ; AVX-NEXT: .cfi_def_cfa_offset 8
2787 ; AVX-NEXT: retq
2788 entry:
2789 %log10 = call <4 x double> @llvm.experimental.constrained.log10.v4f64(
2790 <4 x double> <double 42.0, double 42.1,
2791 double 42.2, double 42.3>,
2792 metadata !"round.dynamic",
2793 metadata !"fpexcept.strict")
2794 ret <4 x double> %log10
2795 }
2797 define <1 x float> @constrained_vector_log2_v1f32() {
2798 ; CHECK-LABEL: constrained_vector_log2_v1f32:
2799 ; CHECK: # %bb.0: # %entry
2800 ; CHECK-NEXT: pushq %rax
2801 ; CHECK-NEXT: .cfi_def_cfa_offset 16
2802 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2803 ; CHECK-NEXT: callq log2f
2804 ; CHECK-NEXT: popq %rax
2805 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2806 ; CHECK-NEXT: retq
2807 ;
2808 ; AVX-LABEL: constrained_vector_log2_v1f32:
2809 ; AVX: # %bb.0: # %entry
2810 ; AVX-NEXT: pushq %rax
2811 ; AVX-NEXT: .cfi_def_cfa_offset 16
2812 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2813 ; AVX-NEXT: callq log2f
2814 ; AVX-NEXT: popq %rax
2815 ; AVX-NEXT: .cfi_def_cfa_offset 8
2816 ; AVX-NEXT: retq
2817 entry:
2818 %log2 = call <1 x float> @llvm.experimental.constrained.log2.v1f32(
2819 <1 x float> <float 42.0>,
2820 metadata !"round.dynamic",
2821 metadata !"fpexcept.strict")
2822 ret <1 x float> %log2
2823 }
2825 define <2 x double> @constrained_vector_log2_v2f64() {
2826 ; CHECK-LABEL: constrained_vector_log2_v2f64:
2827 ; CHECK: # %bb.0: # %entry
2828 ; CHECK-NEXT: subq $24, %rsp
2829 ; CHECK-NEXT: .cfi_def_cfa_offset 32
2830 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2831 ; CHECK-NEXT: callq log2
2832 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2833 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2834 ; CHECK-NEXT: callq log2
2835 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
2836 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
2837 ; CHECK-NEXT: addq $24, %rsp
2838 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2839 ; CHECK-NEXT: retq
2840 ;
2841 ; AVX-LABEL: constrained_vector_log2_v2f64:
2842 ; AVX: # %bb.0: # %entry
2843 ; AVX-NEXT: subq $24, %rsp
2844 ; AVX-NEXT: .cfi_def_cfa_offset 32
2845 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2846 ; AVX-NEXT: callq log2
2847 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2848 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2849 ; AVX-NEXT: callq log2
2850 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2851 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2852 ; AVX-NEXT: addq $24, %rsp
2853 ; AVX-NEXT: .cfi_def_cfa_offset 8
2854 ; AVX-NEXT: retq
2855 entry:
2856 %log2 = call <2 x double> @llvm.experimental.constrained.log2.v2f64(
2857 <2 x double> <double 42.0, double 42.1>,
2858 metadata !"round.dynamic",
2859 metadata !"fpexcept.strict")
2860 ret <2 x double> %log2
2861 }
2863 define <3 x float> @constrained_vector_log2_v3f32() {
2864 ; CHECK-LABEL: constrained_vector_log2_v3f32:
2865 ; CHECK: # %bb.0: # %entry
2866 ; CHECK-NEXT: subq $40, %rsp
2867 ; CHECK-NEXT: .cfi_def_cfa_offset 48
2868 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2869 ; CHECK-NEXT: callq log2f
2870 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2871 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2872 ; CHECK-NEXT: callq log2f
2873 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2874 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2875 ; CHECK-NEXT: callq log2f
2876 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
2877 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
2878 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
2879 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
2880 ; CHECK-NEXT: movaps %xmm1, %xmm0
2881 ; CHECK-NEXT: addq $40, %rsp
2882 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2883 ; CHECK-NEXT: retq
2884 ;
2885 ; AVX-LABEL: constrained_vector_log2_v3f32:
2886 ; AVX: # %bb.0: # %entry
2887 ; AVX-NEXT: subq $40, %rsp
2888 ; AVX-NEXT: .cfi_def_cfa_offset 48
2889 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2890 ; AVX-NEXT: callq log2f
2891 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2892 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2893 ; AVX-NEXT: callq log2f
2894 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2895 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2896 ; AVX-NEXT: callq log2f
2897 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
2898 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
2899 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
2900 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
2901 ; AVX-NEXT: addq $40, %rsp
2902 ; AVX-NEXT: .cfi_def_cfa_offset 8
2903 ; AVX-NEXT: retq
2904 entry:
2905 %log2 = call <3 x float> @llvm.experimental.constrained.log2.v3f32(
2906 <3 x float> <float 42.0, float 43.0, float 44.0>,
2907 metadata !"round.dynamic",
2908 metadata !"fpexcept.strict")
2909 ret <3 x float> %log2
2910 }
2912 define <3 x double> @constrained_vector_log2_v3f64() {
2913 ; CHECK-LABEL: constrained_vector_log2_v3f64:
2914 ; CHECK: # %bb.0: # %entry
2915 ; CHECK-NEXT: subq $24, %rsp
2916 ; CHECK-NEXT: .cfi_def_cfa_offset 32
2917 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2918 ; CHECK-NEXT: callq log2
2919 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
2920 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2921 ; CHECK-NEXT: callq log2
2922 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
2923 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2924 ; CHECK-NEXT: callq log2
2925 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
2926 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
2927 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
2928 ; CHECK-NEXT: # xmm0 = mem[0],zero
2929 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
2930 ; CHECK-NEXT: # xmm1 = mem[0],zero
2931 ; CHECK-NEXT: addq $24, %rsp
2932 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2933 ; CHECK-NEXT: retq
2934 ;
2935 ; AVX-LABEL: constrained_vector_log2_v3f64:
2936 ; AVX: # %bb.0: # %entry
2937 ; AVX-NEXT: subq $56, %rsp
2938 ; AVX-NEXT: .cfi_def_cfa_offset 64
2939 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2940 ; AVX-NEXT: callq log2
2941 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2942 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2943 ; AVX-NEXT: callq log2
2944 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2945 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
2946 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
2947 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2948 ; AVX-NEXT: vzeroupper
2949 ; AVX-NEXT: callq log2
2950 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
2951 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
2952 ; AVX-NEXT: addq $56, %rsp
2953 ; AVX-NEXT: .cfi_def_cfa_offset 8
2954 ; AVX-NEXT: retq
2955 entry:
2956 %log2 = call <3 x double> @llvm.experimental.constrained.log2.v3f64(
2957 <3 x double> <double 42.0, double 42.1, double 42.2>,
2958 metadata !"round.dynamic",
2959 metadata !"fpexcept.strict")
2960 ret <3 x double> %log2
2961 }
2963 define <4 x double> @constrained_vector_log2_v4f64() {
2964 ; CHECK-LABEL: constrained_vector_log2_v4f64:
2965 ; CHECK: # %bb.0: # %entry
2966 ; CHECK-NEXT: subq $40, %rsp
2967 ; CHECK-NEXT: .cfi_def_cfa_offset 48
2968 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2969 ; CHECK-NEXT: callq log2
2970 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2971 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2972 ; CHECK-NEXT: callq log2
2973 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
2974 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
2975 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
2976 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2977 ; CHECK-NEXT: callq log2
2978 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
2979 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2980 ; CHECK-NEXT: callq log2
2981 ; CHECK-NEXT: movaps %xmm0, %xmm1
2982 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
2983 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
2984 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
2985 ; CHECK-NEXT: addq $40, %rsp
2986 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2987 ; CHECK-NEXT: retq
2988 ;
2989 ; AVX-LABEL: constrained_vector_log2_v4f64:
2990 ; AVX: # %bb.0: # %entry
2991 ; AVX-NEXT: subq $40, %rsp
2992 ; AVX-NEXT: .cfi_def_cfa_offset 48
2993 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2994 ; AVX-NEXT: callq log2
2995 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
2996 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2997 ; AVX-NEXT: callq log2
2998 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
2999 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
3000 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
3001 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3002 ; AVX-NEXT: callq log2
3003 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3004 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3005 ; AVX-NEXT: callq log2
3006 ; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
3007 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
3008 ; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload
3009 ; AVX-NEXT: addq $40, %rsp
3010 ; AVX-NEXT: .cfi_def_cfa_offset 8
3011 ; AVX-NEXT: retq
3012 entry:
3013 %log2 = call <4 x double> @llvm.experimental.constrained.log2.v4f64(
3014 <4 x double> <double 42.0, double 42.1,
3015 double 42.2, double 42.3>,
3016 metadata !"round.dynamic",
3017 metadata !"fpexcept.strict")
3018 ret <4 x double> %log2
3019 }
3021 define <1 x float> @constrained_vector_rint_v1f32() {
3022 ; CHECK-LABEL: constrained_vector_rint_v1f32:
3023 ; CHECK: # %bb.0: # %entry
3024 ; CHECK-NEXT: pushq %rax
3025 ; CHECK-NEXT: .cfi_def_cfa_offset 16
3026 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3027 ; CHECK-NEXT: callq rintf
3028 ; CHECK-NEXT: popq %rax
3029 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3030 ; CHECK-NEXT: retq
3031 ;
3032 ; AVX-LABEL: constrained_vector_rint_v1f32:
3033 ; AVX: # %bb.0: # %entry
3034 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3035 ; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0
3036 ; AVX-NEXT: retq
3037 entry:
3038 %rint = call <1 x float> @llvm.experimental.constrained.rint.v1f32(
3039 <1 x float> <float 42.0>,
3040 metadata !"round.dynamic",
3041 metadata !"fpexcept.strict")
3042 ret <1 x float> %rint
3043 }
3045 define <2 x double> @constrained_vector_rint_v2f64() {
3046 ; CHECK-LABEL: constrained_vector_rint_v2f64:
3047 ; CHECK: # %bb.0: # %entry
3048 ; CHECK-NEXT: subq $24, %rsp
3049 ; CHECK-NEXT: .cfi_def_cfa_offset 32
3050 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3051 ; CHECK-NEXT: callq rint
3052 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3053 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3054 ; CHECK-NEXT: callq rint
3055 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
3056 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
3057 ; CHECK-NEXT: addq $24, %rsp
3058 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3059 ; CHECK-NEXT: retq
3060 ;
3061 ; AVX-LABEL: constrained_vector_rint_v2f64:
3062 ; AVX: # %bb.0: # %entry
3063 ; AVX-NEXT: vroundpd $4, {{.*}}(%rip), %xmm0
3064 ; AVX-NEXT: retq
3065 entry:
3066 %rint = call <2 x double> @llvm.experimental.constrained.rint.v2f64(
3067 <2 x double> <double 42.1, double 42.0>,
3068 metadata !"round.dynamic",
3069 metadata !"fpexcept.strict")
3070 ret <2 x double> %rint
3071 }
3073 define <3 x float> @constrained_vector_rint_v3f32() {
3074 ; CHECK-LABEL: constrained_vector_rint_v3f32:
3075 ; CHECK: # %bb.0: # %entry
3076 ; CHECK-NEXT: subq $40, %rsp
3077 ; CHECK-NEXT: .cfi_def_cfa_offset 48
3078 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3079 ; CHECK-NEXT: callq rintf
3080 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3081 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3082 ; CHECK-NEXT: callq rintf
3083 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3084 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3085 ; CHECK-NEXT: callq rintf
3086 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
3087 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
3088 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
3089 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
3090 ; CHECK-NEXT: movaps %xmm1, %xmm0
3091 ; CHECK-NEXT: addq $40, %rsp
3092 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3093 ; CHECK-NEXT: retq
3094 ;
3095 ; AVX-LABEL: constrained_vector_rint_v3f32:
3096 ; AVX: # %bb.0: # %entry
3097 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3098 ; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0
3099 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3100 ; AVX-NEXT: vroundss $4, %xmm1, %xmm1, %xmm1
3101 ; AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
3102 ; AVX-NEXT: vroundss $4, %xmm2, %xmm2, %xmm2
3103 ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
3104 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
3105 ; AVX-NEXT: retq
3106 entry:
3107 %rint = call <3 x float> @llvm.experimental.constrained.rint.v3f32(
3108 <3 x float> <float 42.0, float 43.0, float 44.0>,
3109 metadata !"round.dynamic",
3110 metadata !"fpexcept.strict")
3111 ret <3 x float> %rint
3112 }
3114 define <3 x double> @constrained_vector_rint_v3f64() {
3115 ; CHECK-LABEL: constrained_vector_rint_v3f64:
3116 ; CHECK: # %bb.0: # %entry
3117 ; CHECK-NEXT: subq $24, %rsp
3118 ; CHECK-NEXT: .cfi_def_cfa_offset 32
3119 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3120 ; CHECK-NEXT: callq rint
3121 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
3122 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3123 ; CHECK-NEXT: callq rint
3124 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
3125 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3126 ; CHECK-NEXT: callq rint
3127 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
3128 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
3129 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
3130 ; CHECK-NEXT: # xmm0 = mem[0],zero
3131 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
3132 ; CHECK-NEXT: # xmm1 = mem[0],zero
3133 ; CHECK-NEXT: addq $24, %rsp
3134 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3135 ; CHECK-NEXT: retq
3136 ;
3137 ; AVX-LABEL: constrained_vector_rint_v3f64:
3138 ; AVX: # %bb.0: # %entry
3139 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3140 ; AVX-NEXT: vroundsd $4, %xmm0, %xmm0, %xmm0
3141 ; AVX-NEXT: vroundpd $4, {{.*}}(%rip), %xmm1
3142 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
3143 ; AVX-NEXT: retq
3144 entry:
3145 %rint = call <3 x double> @llvm.experimental.constrained.rint.v3f64(
3146 <3 x double> <double 42.0, double 42.1, double 42.2>,
3147 metadata !"round.dynamic",
3148 metadata !"fpexcept.strict")
3149 ret <3 x double> %rint
3150 }
3152 define <4 x double> @constrained_vector_rint_v4f64() {
3153 ; CHECK-LABEL: constrained_vector_rint_v4f64:
3154 ; CHECK: # %bb.0: # %entry
3155 ; CHECK-NEXT: subq $40, %rsp
3156 ; CHECK-NEXT: .cfi_def_cfa_offset 48
3157 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3158 ; CHECK-NEXT: callq rint
3159 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3160 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3161 ; CHECK-NEXT: callq rint
3162 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
3163 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
3164 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3165 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3166 ; CHECK-NEXT: callq rint
3167 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3168 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3169 ; CHECK-NEXT: callq rint
3170 ; CHECK-NEXT: movaps %xmm0, %xmm1
3171 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
3172 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
3173 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
3174 ; CHECK-NEXT: addq $40, %rsp
3175 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3176 ; CHECK-NEXT: retq
3177 ;
3178 ; AVX-LABEL: constrained_vector_rint_v4f64:
3179 ; AVX: # %bb.0: # %entry
3180 ; AVX-NEXT: vroundpd $4, {{.*}}(%rip), %ymm0
3181 ; AVX-NEXT: retq
3182 entry:
3183 %rint = call <4 x double> @llvm.experimental.constrained.rint.v4f64(
3184 <4 x double> <double 42.1, double 42.2,
3185 double 42.3, double 42.4>,
3186 metadata !"round.dynamic",
3187 metadata !"fpexcept.strict")
3188 ret <4 x double> %rint
3189 }
3191 define <1 x float> @constrained_vector_nearbyint_v1f32() {
3192 ; CHECK-LABEL: constrained_vector_nearbyint_v1f32:
3193 ; CHECK: # %bb.0: # %entry
3194 ; CHECK-NEXT: pushq %rax
3195 ; CHECK-NEXT: .cfi_def_cfa_offset 16
3196 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3197 ; CHECK-NEXT: callq nearbyintf
3198 ; CHECK-NEXT: popq %rax
3199 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3200 ; CHECK-NEXT: retq
3201 ;
3202 ; AVX-LABEL: constrained_vector_nearbyint_v1f32:
3203 ; AVX: # %bb.0: # %entry
3204 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3205 ; AVX-NEXT: vroundss $12, %xmm0, %xmm0, %xmm0
3206 ; AVX-NEXT: retq
3207 entry:
3208 %nearby = call <1 x float> @llvm.experimental.constrained.nearbyint.v1f32(
3209 <1 x float> <float 42.0>,
3210 metadata !"round.dynamic",
3211 metadata !"fpexcept.strict")
3212 ret <1 x float> %nearby
3213 }
3215 define <2 x double> @constrained_vector_nearbyint_v2f64() {
3216 ; CHECK-LABEL: constrained_vector_nearbyint_v2f64:
3217 ; CHECK: # %bb.0: # %entry
3218 ; CHECK-NEXT: subq $24, %rsp
3219 ; CHECK-NEXT: .cfi_def_cfa_offset 32
3220 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3221 ; CHECK-NEXT: callq nearbyint
3222 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3223 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3224 ; CHECK-NEXT: callq nearbyint
3225 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
3226 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
3227 ; CHECK-NEXT: addq $24, %rsp
3228 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3229 ; CHECK-NEXT: retq
3230 ;
3231 ; AVX-LABEL: constrained_vector_nearbyint_v2f64:
3232 ; AVX: # %bb.0: # %entry
3233 ; AVX-NEXT: vroundpd $12, {{.*}}(%rip), %xmm0
3234 ; AVX-NEXT: retq
3235 entry:
3236 %nearby = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(
3237 <2 x double> <double 42.1, double 42.0>,
3238 metadata !"round.dynamic",
3239 metadata !"fpexcept.strict")
3240 ret <2 x double> %nearby
3241 }
3243 define <3 x float> @constrained_vector_nearbyint_v3f32() {
3244 ; CHECK-LABEL: constrained_vector_nearbyint_v3f32:
3245 ; CHECK: # %bb.0: # %entry
3246 ; CHECK-NEXT: subq $40, %rsp
3247 ; CHECK-NEXT: .cfi_def_cfa_offset 48
3248 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3249 ; CHECK-NEXT: callq nearbyintf
3250 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3251 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3252 ; CHECK-NEXT: callq nearbyintf
3253 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3254 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3255 ; CHECK-NEXT: callq nearbyintf
3256 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
3257 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
3258 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
3259 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
3260 ; CHECK-NEXT: movaps %xmm1, %xmm0
3261 ; CHECK-NEXT: addq $40, %rsp
3262 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3263 ; CHECK-NEXT: retq
3264 ;
3265 ; AVX-LABEL: constrained_vector_nearbyint_v3f32:
3266 ; AVX: # %bb.0: # %entry
3267 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3268 ; AVX-NEXT: vroundss $12, %xmm0, %xmm0, %xmm0
3269 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3270 ; AVX-NEXT: vroundss $12, %xmm1, %xmm1, %xmm1
3271 ; AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
3272 ; AVX-NEXT: vroundss $12, %xmm2, %xmm2, %xmm2
3273 ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
3274 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
3275 ; AVX-NEXT: retq
3276 entry:
3277 %nearby = call <3 x float> @llvm.experimental.constrained.nearbyint.v3f32(
3278 <3 x float> <float 42.0, float 43.0, float 44.0>,
3279 metadata !"round.dynamic",
3280 metadata !"fpexcept.strict")
3281 ret <3 x float> %nearby
3282 }
3284 define <3 x double> @constrained_vector_nearby_v3f64() {
3285 ; CHECK-LABEL: constrained_vector_nearby_v3f64:
3286 ; CHECK: # %bb.0: # %entry
3287 ; CHECK-NEXT: subq $24, %rsp
3288 ; CHECK-NEXT: .cfi_def_cfa_offset 32
3289 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3290 ; CHECK-NEXT: callq nearbyint
3291 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
3292 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3293 ; CHECK-NEXT: callq nearbyint
3294 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
3295 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3296 ; CHECK-NEXT: callq nearbyint
3297 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
3298 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
3299 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
3300 ; CHECK-NEXT: # xmm0 = mem[0],zero
3301 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
3302 ; CHECK-NEXT: # xmm1 = mem[0],zero
3303 ; CHECK-NEXT: addq $24, %rsp
3304 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3305 ; CHECK-NEXT: retq
3306 ;
3307 ; AVX-LABEL: constrained_vector_nearby_v3f64:
3308 ; AVX: # %bb.0: # %entry
3309 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3310 ; AVX-NEXT: vroundsd $12, %xmm0, %xmm0, %xmm0
3311 ; AVX-NEXT: vroundpd $12, {{.*}}(%rip), %xmm1
3312 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
3313 ; AVX-NEXT: retq
3314 entry:
3315 %nearby = call <3 x double> @llvm.experimental.constrained.nearbyint.v3f64(
3316 <3 x double> <double 42.0, double 42.1, double 42.2>,
3317 metadata !"round.dynamic",
3318 metadata !"fpexcept.strict")
3319 ret <3 x double> %nearby
3320 }
3322 define <4 x double> @constrained_vector_nearbyint_v4f64() {
3323 ; CHECK-LABEL: constrained_vector_nearbyint_v4f64:
3324 ; CHECK: # %bb.0: # %entry
3325 ; CHECK-NEXT: subq $40, %rsp
3326 ; CHECK-NEXT: .cfi_def_cfa_offset 48
3327 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3328 ; CHECK-NEXT: callq nearbyint
3329 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3330 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3331 ; CHECK-NEXT: callq nearbyint
3332 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
3333 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
3334 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3335 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3336 ; CHECK-NEXT: callq nearbyint
3337 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3338 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3339 ; CHECK-NEXT: callq nearbyint
3340 ; CHECK-NEXT: movaps %xmm0, %xmm1
3341 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
3342 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
3343 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
3344 ; CHECK-NEXT: addq $40, %rsp
3345 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3346 ; CHECK-NEXT: retq
3347 ;
3348 ; AVX-LABEL: constrained_vector_nearbyint_v4f64:
3349 ; AVX: # %bb.0: # %entry
3350 ; AVX-NEXT: vroundpd $12, {{.*}}(%rip), %ymm0
3351 ; AVX-NEXT: retq
3352 entry:
3353 %nearby = call <4 x double> @llvm.experimental.constrained.nearbyint.v4f64(
3354 <4 x double> <double 42.1, double 42.2,
3355 double 42.3, double 42.4>,
3356 metadata !"round.dynamic",
3357 metadata !"fpexcept.strict")
3358 ret <4 x double> %nearby
3359 }
3361 define <1 x float> @constrained_vector_maxnum_v1f32() {
3362 ; CHECK-LABEL: constrained_vector_maxnum_v1f32:
3363 ; CHECK: # %bb.0: # %entry
3364 ; CHECK-NEXT: pushq %rax
3365 ; CHECK-NEXT: .cfi_def_cfa_offset 16
3366 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3367 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3368 ; CHECK-NEXT: callq fmaxf
3369 ; CHECK-NEXT: popq %rax
3370 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3371 ; CHECK-NEXT: retq
3372 ;
3373 ; AVX-LABEL: constrained_vector_maxnum_v1f32:
3374 ; AVX: # %bb.0: # %entry
3375 ; AVX-NEXT: pushq %rax
3376 ; AVX-NEXT: .cfi_def_cfa_offset 16
3377 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3378 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3379 ; AVX-NEXT: callq fmaxf
3380 ; AVX-NEXT: popq %rax
3381 ; AVX-NEXT: .cfi_def_cfa_offset 8
3382 ; AVX-NEXT: retq
3383 entry:
3384 %max = call <1 x float> @llvm.experimental.constrained.maxnum.v1f32(
3385 <1 x float> <float 42.0>, <1 x float> <float 41.0>,
3386 metadata !"round.dynamic",
3387 metadata !"fpexcept.strict")
3388 ret <1 x float> %max
3389 }
3391 define <2 x double> @constrained_vector_maxnum_v2f64() {
3392 ; CHECK-LABEL: constrained_vector_maxnum_v2f64:
3393 ; CHECK: # %bb.0: # %entry
3394 ; CHECK-NEXT: subq $24, %rsp
3395 ; CHECK-NEXT: .cfi_def_cfa_offset 32
3396 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3397 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3398 ; CHECK-NEXT: callq fmax
3399 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3400 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3401 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3402 ; CHECK-NEXT: callq fmax
3403 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
3404 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
3405 ; CHECK-NEXT: addq $24, %rsp
3406 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3407 ; CHECK-NEXT: retq
3408 ;
3409 ; AVX-LABEL: constrained_vector_maxnum_v2f64:
3410 ; AVX: # %bb.0: # %entry
3411 ; AVX-NEXT: subq $24, %rsp
3412 ; AVX-NEXT: .cfi_def_cfa_offset 32
3413 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3414 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3415 ; AVX-NEXT: callq fmax
3416 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
3417 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3418 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3419 ; AVX-NEXT: callq fmax
3420 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
3421 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
3422 ; AVX-NEXT: addq $24, %rsp
3423 ; AVX-NEXT: .cfi_def_cfa_offset 8
3424 ; AVX-NEXT: retq
3425 entry:
3426 %max = call <2 x double> @llvm.experimental.constrained.maxnum.v2f64(
3427 <2 x double> <double 43.0, double 42.0>,
3428 <2 x double> <double 41.0, double 40.0>,
3429 metadata !"round.dynamic",
3430 metadata !"fpexcept.strict")
3431 ret <2 x double> %max
3432 }
3434 define <3 x float> @constrained_vector_maxnum_v3f32() {
3435 ; CHECK-LABEL: constrained_vector_maxnum_v3f32:
3436 ; CHECK: # %bb.0: # %entry
3437 ; CHECK-NEXT: subq $40, %rsp
3438 ; CHECK-NEXT: .cfi_def_cfa_offset 48
3439 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3440 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3441 ; CHECK-NEXT: callq fmaxf
3442 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3443 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3444 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3445 ; CHECK-NEXT: callq fmaxf
3446 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3447 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3448 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3449 ; CHECK-NEXT: callq fmaxf
3450 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
3451 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
3452 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
3453 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
3454 ; CHECK-NEXT: movaps %xmm1, %xmm0
3455 ; CHECK-NEXT: addq $40, %rsp
3456 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3457 ; CHECK-NEXT: retq
3458 ;
3459 ; AVX-LABEL: constrained_vector_maxnum_v3f32:
3460 ; AVX: # %bb.0: # %entry
3461 ; AVX-NEXT: subq $40, %rsp
3462 ; AVX-NEXT: .cfi_def_cfa_offset 48
3463 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3464 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3465 ; AVX-NEXT: callq fmaxf
3466 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3467 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3468 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3469 ; AVX-NEXT: callq fmaxf
3470 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
3471 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3472 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3473 ; AVX-NEXT: callq fmaxf
3474 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
3475 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
3476 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
3477 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
3478 ; AVX-NEXT: addq $40, %rsp
3479 ; AVX-NEXT: .cfi_def_cfa_offset 8
3480 ; AVX-NEXT: retq
3481 entry:
3482 %max = call <3 x float> @llvm.experimental.constrained.maxnum.v3f32(
3483 <3 x float> <float 43.0, float 44.0, float 45.0>,
3484 <3 x float> <float 41.0, float 42.0, float 43.0>,
3485 metadata !"round.dynamic",
3486 metadata !"fpexcept.strict")
3487 ret <3 x float> %max
3488 }
3490 define <3 x double> @constrained_vector_max_v3f64() {
3491 ; CHECK-LABEL: constrained_vector_max_v3f64:
3492 ; CHECK: # %bb.0: # %entry
3493 ; CHECK-NEXT: subq $24, %rsp
3494 ; CHECK-NEXT: .cfi_def_cfa_offset 32
3495 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3496 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3497 ; CHECK-NEXT: callq fmax
3498 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
3499 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3500 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3501 ; CHECK-NEXT: callq fmax
3502 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
3503 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3504 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3505 ; CHECK-NEXT: callq fmax
3506 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
3507 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
3508 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
3509 ; CHECK-NEXT: # xmm0 = mem[0],zero
3510 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
3511 ; CHECK-NEXT: # xmm1 = mem[0],zero
3512 ; CHECK-NEXT: addq $24, %rsp
3513 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3514 ; CHECK-NEXT: retq
3515 ;
3516 ; AVX-LABEL: constrained_vector_max_v3f64:
3517 ; AVX: # %bb.0: # %entry
3518 ; AVX-NEXT: subq $56, %rsp
3519 ; AVX-NEXT: .cfi_def_cfa_offset 64
3520 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3521 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3522 ; AVX-NEXT: callq fmax
3523 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
3524 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3525 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3526 ; AVX-NEXT: callq fmax
3527 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
3528 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
3529 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
3530 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3531 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3532 ; AVX-NEXT: vzeroupper
3533 ; AVX-NEXT: callq fmax
3534 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
3535 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
3536 ; AVX-NEXT: addq $56, %rsp
3537 ; AVX-NEXT: .cfi_def_cfa_offset 8
3538 ; AVX-NEXT: retq
3539 entry:
3540 %max = call <3 x double> @llvm.experimental.constrained.maxnum.v3f64(
3541 <3 x double> <double 43.0, double 44.0, double 45.0>,
3542 <3 x double> <double 40.0, double 41.0, double 42.0>,
3543 metadata !"round.dynamic",
3544 metadata !"fpexcept.strict")
3545 ret <3 x double> %max
3546 }
3548 define <4 x double> @constrained_vector_maxnum_v4f64() {
3549 ; CHECK-LABEL: constrained_vector_maxnum_v4f64:
3550 ; CHECK: # %bb.0: # %entry
3551 ; CHECK-NEXT: subq $40, %rsp
3552 ; CHECK-NEXT: .cfi_def_cfa_offset 48
3553 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3554 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3555 ; CHECK-NEXT: callq fmax
3556 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3557 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3558 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3559 ; CHECK-NEXT: callq fmax
3560 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
3561 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
3562 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3563 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3564 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3565 ; CHECK-NEXT: callq fmax
3566 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3567 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3568 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3569 ; CHECK-NEXT: callq fmax
3570 ; CHECK-NEXT: movaps %xmm0, %xmm1
3571 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
3572 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
3573 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
3574 ; CHECK-NEXT: addq $40, %rsp
3575 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3576 ; CHECK-NEXT: retq
3577 ;
3578 ; AVX-LABEL: constrained_vector_maxnum_v4f64:
3579 ; AVX: # %bb.0: # %entry
3580 ; AVX-NEXT: subq $40, %rsp
3581 ; AVX-NEXT: .cfi_def_cfa_offset 48
3582 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3583 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3584 ; AVX-NEXT: callq fmax
3585 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
3586 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3587 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3588 ; AVX-NEXT: callq fmax
3589 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
3590 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
3591 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
3592 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3593 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3594 ; AVX-NEXT: callq fmax
3595 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3596 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3597 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3598 ; AVX-NEXT: callq fmax
3599 ; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
3600 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
3601 ; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload
3602 ; AVX-NEXT: addq $40, %rsp
3603 ; AVX-NEXT: .cfi_def_cfa_offset 8
3604 ; AVX-NEXT: retq
3605 entry:
3606 %max = call <4 x double> @llvm.experimental.constrained.maxnum.v4f64(
3607 <4 x double> <double 44.0, double 45.0,
3608 double 46.0, double 47.0>,
3609 <4 x double> <double 40.0, double 41.0,
3610 double 42.0, double 43.0>,
3611 metadata !"round.dynamic",
3612 metadata !"fpexcept.strict")
3613 ret <4 x double> %max
3614 }
3616 define <1 x float> @constrained_vector_minnum_v1f32() {
3617 ; CHECK-LABEL: constrained_vector_minnum_v1f32:
3618 ; CHECK: # %bb.0: # %entry
3619 ; CHECK-NEXT: pushq %rax
3620 ; CHECK-NEXT: .cfi_def_cfa_offset 16
3621 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3622 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3623 ; CHECK-NEXT: callq fminf
3624 ; CHECK-NEXT: popq %rax
3625 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3626 ; CHECK-NEXT: retq
3627 ;
3628 ; AVX-LABEL: constrained_vector_minnum_v1f32:
3629 ; AVX: # %bb.0: # %entry
3630 ; AVX-NEXT: pushq %rax
3631 ; AVX-NEXT: .cfi_def_cfa_offset 16
3632 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3633 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3634 ; AVX-NEXT: callq fminf
3635 ; AVX-NEXT: popq %rax
3636 ; AVX-NEXT: .cfi_def_cfa_offset 8
3637 ; AVX-NEXT: retq
3638 entry:
3639 %min = call <1 x float> @llvm.experimental.constrained.minnum.v1f32(
3640 <1 x float> <float 42.0>, <1 x float> <float 41.0>,
3641 metadata !"round.dynamic",
3642 metadata !"fpexcept.strict")
3643 ret <1 x float> %min
3644 }
3646 define <2 x double> @constrained_vector_minnum_v2f64() {
3647 ; CHECK-LABEL: constrained_vector_minnum_v2f64:
3648 ; CHECK: # %bb.0: # %entry
3649 ; CHECK-NEXT: subq $24, %rsp
3650 ; CHECK-NEXT: .cfi_def_cfa_offset 32
3651 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3652 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3653 ; CHECK-NEXT: callq fmin
3654 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3655 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3656 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3657 ; CHECK-NEXT: callq fmin
3658 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
3659 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
3660 ; CHECK-NEXT: addq $24, %rsp
3661 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3662 ; CHECK-NEXT: retq
3663 ;
3664 ; AVX-LABEL: constrained_vector_minnum_v2f64:
3665 ; AVX: # %bb.0: # %entry
3666 ; AVX-NEXT: subq $24, %rsp
3667 ; AVX-NEXT: .cfi_def_cfa_offset 32
3668 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3669 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3670 ; AVX-NEXT: callq fmin
3671 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
3672 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3673 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3674 ; AVX-NEXT: callq fmin
3675 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
3676 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
3677 ; AVX-NEXT: addq $24, %rsp
3678 ; AVX-NEXT: .cfi_def_cfa_offset 8
3679 ; AVX-NEXT: retq
3680 entry:
3681 %min = call <2 x double> @llvm.experimental.constrained.minnum.v2f64(
3682 <2 x double> <double 43.0, double 42.0>,
3683 <2 x double> <double 41.0, double 40.0>,
3684 metadata !"round.dynamic",
3685 metadata !"fpexcept.strict")
3686 ret <2 x double> %min
3687 }
3689 define <3 x float> @constrained_vector_minnum_v3f32() {
3690 ; CHECK-LABEL: constrained_vector_minnum_v3f32:
3691 ; CHECK: # %bb.0: # %entry
3692 ; CHECK-NEXT: subq $40, %rsp
3693 ; CHECK-NEXT: .cfi_def_cfa_offset 48
3694 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3695 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3696 ; CHECK-NEXT: callq fminf
3697 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3698 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3699 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3700 ; CHECK-NEXT: callq fminf
3701 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3702 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3703 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3704 ; CHECK-NEXT: callq fminf
3705 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
3706 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
3707 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
3708 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
3709 ; CHECK-NEXT: movaps %xmm1, %xmm0
3710 ; CHECK-NEXT: addq $40, %rsp
3711 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3712 ; CHECK-NEXT: retq
3713 ;
3714 ; AVX-LABEL: constrained_vector_minnum_v3f32:
3715 ; AVX: # %bb.0: # %entry
3716 ; AVX-NEXT: subq $40, %rsp
3717 ; AVX-NEXT: .cfi_def_cfa_offset 48
3718 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3719 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3720 ; AVX-NEXT: callq fminf
3721 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3722 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3723 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3724 ; AVX-NEXT: callq fminf
3725 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
3726 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
3727 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
3728 ; AVX-NEXT: callq fminf
3729 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
3730 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
3731 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
3732 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
3733 ; AVX-NEXT: addq $40, %rsp
3734 ; AVX-NEXT: .cfi_def_cfa_offset 8
3735 ; AVX-NEXT: retq
3736 entry:
3737 %min = call <3 x float> @llvm.experimental.constrained.minnum.v3f32(
3738 <3 x float> <float 43.0, float 44.0, float 45.0>,
3739 <3 x float> <float 41.0, float 42.0, float 43.0>,
3740 metadata !"round.dynamic",
3741 metadata !"fpexcept.strict")
3742 ret <3 x float> %min
3743 }
3745 define <3 x double> @constrained_vector_min_v3f64() {
3746 ; CHECK-LABEL: constrained_vector_min_v3f64:
3747 ; CHECK: # %bb.0: # %entry
3748 ; CHECK-NEXT: subq $24, %rsp
3749 ; CHECK-NEXT: .cfi_def_cfa_offset 32
3750 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3751 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3752 ; CHECK-NEXT: callq fmin
3753 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
3754 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3755 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3756 ; CHECK-NEXT: callq fmin
3757 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
3758 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3759 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3760 ; CHECK-NEXT: callq fmin
3761 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
3762 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
3763 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
3764 ; CHECK-NEXT: # xmm0 = mem[0],zero
3765 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
3766 ; CHECK-NEXT: # xmm1 = mem[0],zero
3767 ; CHECK-NEXT: addq $24, %rsp
3768 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3769 ; CHECK-NEXT: retq
3770 ;
3771 ; AVX-LABEL: constrained_vector_min_v3f64:
3772 ; AVX: # %bb.0: # %entry
3773 ; AVX-NEXT: subq $56, %rsp
3774 ; AVX-NEXT: .cfi_def_cfa_offset 64
3775 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3776 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3777 ; AVX-NEXT: callq fmin
3778 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
3779 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3780 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3781 ; AVX-NEXT: callq fmin
3782 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
3783 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
3784 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
3785 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3786 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3787 ; AVX-NEXT: vzeroupper
3788 ; AVX-NEXT: callq fmin
3789 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
3790 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
3791 ; AVX-NEXT: addq $56, %rsp
3792 ; AVX-NEXT: .cfi_def_cfa_offset 8
3793 ; AVX-NEXT: retq
3794 entry:
3795 %min = call <3 x double> @llvm.experimental.constrained.minnum.v3f64(
3796 <3 x double> <double 43.0, double 44.0, double 45.0>,
3797 <3 x double> <double 40.0, double 41.0, double 42.0>,
3798 metadata !"round.dynamic",
3799 metadata !"fpexcept.strict")
3800 ret <3 x double> %min
3801 }
3803 define <4 x double> @constrained_vector_minnum_v4f64() {
3804 ; CHECK-LABEL: constrained_vector_minnum_v4f64:
3805 ; CHECK: # %bb.0: # %entry
3806 ; CHECK-NEXT: subq $40, %rsp
3807 ; CHECK-NEXT: .cfi_def_cfa_offset 48
3808 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3809 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3810 ; CHECK-NEXT: callq fmin
3811 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3812 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3813 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3814 ; CHECK-NEXT: callq fmin
3815 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
3816 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
3817 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
3818 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3819 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3820 ; CHECK-NEXT: callq fmin
3821 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3822 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
3823 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
3824 ; CHECK-NEXT: callq fmin
3825 ; CHECK-NEXT: movaps %xmm0, %xmm1
3826 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
3827 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
3828 ; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
3829 ; CHECK-NEXT: addq $40, %rsp
3830 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3831 ; CHECK-NEXT: retq
3832 ;
3833 ; AVX-LABEL: constrained_vector_minnum_v4f64:
3834 ; AVX: # %bb.0: # %entry
3835 ; AVX-NEXT: subq $40, %rsp
3836 ; AVX-NEXT: .cfi_def_cfa_offset 48
3837 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3838 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3839 ; AVX-NEXT: callq fmin
3840 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
3841 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3842 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3843 ; AVX-NEXT: callq fmin
3844 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
3845 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
3846 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
3847 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3848 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3849 ; AVX-NEXT: callq fmin
3850 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
3851 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
3852 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
3853 ; AVX-NEXT: callq fmin
3854 ; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
3855 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
3856 ; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload
3857 ; AVX-NEXT: addq $40, %rsp
3858 ; AVX-NEXT: .cfi_def_cfa_offset 8
3859 ; AVX-NEXT: retq
3860 entry:
3861 %min = call <4 x double> @llvm.experimental.constrained.minnum.v4f64(
3862 <4 x double> <double 44.0, double 45.0,
3863 double 46.0, double 47.0>,
3864 <4 x double> <double 40.0, double 41.0,
3865 double 42.0, double 43.0>,
3866 metadata !"round.dynamic",
3867 metadata !"fpexcept.strict")
3868 ret <4 x double> %min
3869 }
3871 define <1 x i32> @constrained_vector_fptosi_v1i32_v1f32() {
3872 ; CHECK-LABEL: constrained_vector_fptosi_v1i32_v1f32:
3873 ; CHECK: # %bb.0: # %entry
3874 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
3875 ; CHECK-NEXT: retq
3876 ;
3877 ; AVX-LABEL: constrained_vector_fptosi_v1i32_v1f32:
3878 ; AVX: # %bb.0: # %entry
3879 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
3880 ; AVX-NEXT: retq
3881 entry:
3882 %result = call <1 x i32> @llvm.experimental.constrained.fptosi.v1i32.v1f32(
3883 <1 x float><float 42.0>,
3884 metadata !"fpexcept.strict")
3885 ret <1 x i32> %result
3886 }
3888 define <2 x i32> @constrained_vector_fptosi_v2i32_v2f32() {
3889 ; CHECK-LABEL: constrained_vector_fptosi_v2i32_v2f32:
3890 ; CHECK: # %bb.0: # %entry
3891 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
3892 ; CHECK-NEXT: movd %eax, %xmm1
3893 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
3894 ; CHECK-NEXT: movd %eax, %xmm0
3895 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
3896 ; CHECK-NEXT: retq
3897 ;
3898 ; AVX-LABEL: constrained_vector_fptosi_v2i32_v2f32:
3899 ; AVX: # %bb.0: # %entry
3900 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
3901 ; AVX-NEXT: vmovd %eax, %xmm0
3902 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
3903 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
3904 ; AVX-NEXT: retq
3905 entry:
3906 %result = call <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f32(
3907 <2 x float><float 42.0, float 43.0>,
3908 metadata !"fpexcept.strict")
3909 ret <2 x i32> %result
3910 }
3912 define <3 x i32> @constrained_vector_fptosi_v3i32_v3f32() {
3913 ; CHECK-LABEL: constrained_vector_fptosi_v3i32_v3f32:
3914 ; CHECK: # %bb.0: # %entry
3915 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
3916 ; CHECK-NEXT: movd %eax, %xmm1
3917 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
3918 ; CHECK-NEXT: movd %eax, %xmm0
3919 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
3920 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
3921 ; CHECK-NEXT: movd %eax, %xmm1
3922 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
3923 ; CHECK-NEXT: retq
3924 ;
3925 ; AVX-LABEL: constrained_vector_fptosi_v3i32_v3f32:
3926 ; AVX: # %bb.0: # %entry
3927 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
3928 ; AVX-NEXT: vmovd %eax, %xmm0
3929 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
3930 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
3931 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
3932 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
3933 ; AVX-NEXT: retq
3934 entry:
3935 %result = call <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f32(
3936 <3 x float><float 42.0, float 43.0,
3937 float 44.0>,
3938 metadata !"fpexcept.strict")
3939 ret <3 x i32> %result
3940 }
3942 define <4 x i32> @constrained_vector_fptosi_v4i32_v4f32() {
3943 ; CHECK-LABEL: constrained_vector_fptosi_v4i32_v4f32:
3944 ; CHECK: # %bb.0: # %entry
3945 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
3946 ; CHECK-NEXT: movd %eax, %xmm0
3947 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
3948 ; CHECK-NEXT: movd %eax, %xmm1
3949 ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
3950 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
3951 ; CHECK-NEXT: movd %eax, %xmm2
3952 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
3953 ; CHECK-NEXT: movd %eax, %xmm0
3954 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
3955 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
3956 ; CHECK-NEXT: retq
3957 ;
3958 ; AVX-LABEL: constrained_vector_fptosi_v4i32_v4f32:
3959 ; AVX: # %bb.0: # %entry
3960 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
3961 ; AVX-NEXT: vmovd %eax, %xmm0
3962 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
3963 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
3964 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
3965 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
3966 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
3967 ; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
3968 ; AVX-NEXT: retq
3969 entry:
3970 %result = call <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f32(
3971 <4 x float><float 42.0, float 43.0,
3972 float 44.0, float 45.0>,
3973 metadata !"fpexcept.strict")
3974 ret <4 x i32> %result
3975 }
3977 define <1 x i64> @constrained_vector_fptosi_v1i64_v1f32() {
3978 ; CHECK-LABEL: constrained_vector_fptosi_v1i64_v1f32:
3979 ; CHECK: # %bb.0: # %entry
3980 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
3981 ; CHECK-NEXT: retq
3982 ;
3983 ; AVX-LABEL: constrained_vector_fptosi_v1i64_v1f32:
3984 ; AVX: # %bb.0: # %entry
3985 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
3986 ; AVX-NEXT: retq
3987 entry:
3988 %result = call <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f32(
3989 <1 x float><float 42.0>,
3990 metadata !"fpexcept.strict")
3991 ret <1 x i64> %result
3992 }
3994 define <2 x i64> @constrained_vector_fptosi_v2i64_v2f32() {
3995 ; CHECK-LABEL: constrained_vector_fptosi_v2i64_v2f32:
3996 ; CHECK: # %bb.0: # %entry
3997 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
3998 ; CHECK-NEXT: movq %rax, %xmm1
3999 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4000 ; CHECK-NEXT: movq %rax, %xmm0
4001 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4002 ; CHECK-NEXT: retq
4003 ;
4004 ; AVX-LABEL: constrained_vector_fptosi_v2i64_v2f32:
4005 ; AVX: # %bb.0: # %entry
4006 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4007 ; AVX-NEXT: vmovq %rax, %xmm0
4008 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4009 ; AVX-NEXT: vmovq %rax, %xmm1
4010 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4011 ; AVX-NEXT: retq
4012 entry:
4013 %result = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f32(
4014 <2 x float><float 42.0, float 43.0>,
4015 metadata !"fpexcept.strict")
4016 ret <2 x i64> %result
4017 }
4019 define <3 x i64> @constrained_vector_fptosi_v3i64_v3f32() {
4020 ; CHECK-LABEL: constrained_vector_fptosi_v3i64_v3f32:
4021 ; CHECK: # %bb.0: # %entry
4022 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4023 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rdx
4024 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rcx
4025 ; CHECK-NEXT: retq
4026 ;
4027 ; AVX-LABEL: constrained_vector_fptosi_v3i64_v3f32:
4028 ; AVX: # %bb.0: # %entry
4029 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4030 ; AVX-NEXT: vmovq %rax, %xmm0
4031 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4032 ; AVX-NEXT: vmovq %rax, %xmm1
4033 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4034 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4035 ; AVX-NEXT: vmovq %rax, %xmm1
4036 ; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
4037 ; AVX-NEXT: retq
4038 entry:
4039 %result = call <3 x i64> @llvm.experimental.constrained.fptosi.v3i64.v3f32(
4040 <3 x float><float 42.0, float 43.0,
4041 float 44.0>,
4042 metadata !"fpexcept.strict")
4043 ret <3 x i64> %result
4044 }
4046 define <4 x i64> @constrained_vector_fptosi_v4i64_v4f32() {
4047 ; CHECK-LABEL: constrained_vector_fptosi_v4i64_v4f32:
4048 ; CHECK: # %bb.0: # %entry
4049 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4050 ; CHECK-NEXT: movq %rax, %xmm1
4051 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4052 ; CHECK-NEXT: movq %rax, %xmm0
4053 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4054 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4055 ; CHECK-NEXT: movq %rax, %xmm2
4056 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4057 ; CHECK-NEXT: movq %rax, %xmm1
4058 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
4059 ; CHECK-NEXT: retq
4060 ;
4061 ; AVX-LABEL: constrained_vector_fptosi_v4i64_v4f32:
4062 ; AVX: # %bb.0: # %entry
4063 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4064 ; AVX-NEXT: vmovq %rax, %xmm0
4065 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4066 ; AVX-NEXT: vmovq %rax, %xmm1
4067 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4068 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4069 ; AVX-NEXT: vmovq %rax, %xmm1
4070 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4071 ; AVX-NEXT: vmovq %rax, %xmm2
4072 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
4073 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
4074 ; AVX-NEXT: retq
4075 entry:
4076 %result = call <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f32(
4077 <4 x float><float 42.0, float 43.0,
4078 float 44.0, float 45.0>,
4079 metadata !"fpexcept.strict")
4080 ret <4 x i64> %result
4081 }
4083 define <1 x i32> @constrained_vector_fptosi_v1i32_v1f64() {
4084 ; CHECK-LABEL: constrained_vector_fptosi_v1i32_v1f64:
4085 ; CHECK: # %bb.0: # %entry
4086 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4087 ; CHECK-NEXT: retq
4088 ;
4089 ; AVX-LABEL: constrained_vector_fptosi_v1i32_v1f64:
4090 ; AVX: # %bb.0: # %entry
4091 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4092 ; AVX-NEXT: retq
4093 entry:
4094 %result = call <1 x i32> @llvm.experimental.constrained.fptosi.v1i32.v1f64(
4095 <1 x double><double 42.1>,
4096 metadata !"fpexcept.strict")
4097 ret <1 x i32> %result
4098 }
4101 define <2 x i32> @constrained_vector_fptosi_v2i32_v2f64() {
4102 ; CHECK-LABEL: constrained_vector_fptosi_v2i32_v2f64:
4103 ; CHECK: # %bb.0: # %entry
4104 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4105 ; CHECK-NEXT: movd %eax, %xmm1
4106 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4107 ; CHECK-NEXT: movd %eax, %xmm0
4108 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
4109 ; CHECK-NEXT: retq
4110 ;
4111 ; AVX-LABEL: constrained_vector_fptosi_v2i32_v2f64:
4112 ; AVX: # %bb.0: # %entry
4113 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4114 ; AVX-NEXT: vmovd %eax, %xmm0
4115 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4116 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
4117 ; AVX-NEXT: retq
4118 entry:
4119 %result = call <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f64(
4120 <2 x double><double 42.1, double 42.2>,
4121 metadata !"fpexcept.strict")
4122 ret <2 x i32> %result
4123 }
4125 define <3 x i32> @constrained_vector_fptosi_v3i32_v3f64() {
4126 ; CHECK-LABEL: constrained_vector_fptosi_v3i32_v3f64:
4127 ; CHECK: # %bb.0: # %entry
4128 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4129 ; CHECK-NEXT: movd %eax, %xmm1
4130 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4131 ; CHECK-NEXT: movd %eax, %xmm0
4132 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
4133 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4134 ; CHECK-NEXT: movd %eax, %xmm1
4135 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4136 ; CHECK-NEXT: retq
4137 ;
4138 ; AVX-LABEL: constrained_vector_fptosi_v3i32_v3f64:
4139 ; AVX: # %bb.0: # %entry
4140 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4141 ; AVX-NEXT: vmovd %eax, %xmm0
4142 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4143 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
4144 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4145 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
4146 ; AVX-NEXT: retq
4147 entry:
4148 %result = call <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f64(
4149 <3 x double><double 42.1, double 42.2,
4150 double 42.3>,
4151 metadata !"fpexcept.strict")
4152 ret <3 x i32> %result
4153 }
4155 define <4 x i32> @constrained_vector_fptosi_v4i32_v4f64() {
4156 ; CHECK-LABEL: constrained_vector_fptosi_v4i32_v4f64:
4157 ; CHECK: # %bb.0: # %entry
4158 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4159 ; CHECK-NEXT: movd %eax, %xmm0
4160 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4161 ; CHECK-NEXT: movd %eax, %xmm1
4162 ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
4163 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4164 ; CHECK-NEXT: movd %eax, %xmm2
4165 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4166 ; CHECK-NEXT: movd %eax, %xmm0
4167 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
4168 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4169 ; CHECK-NEXT: retq
4170 ;
4171 ; AVX-LABEL: constrained_vector_fptosi_v4i32_v4f64:
4172 ; AVX: # %bb.0: # %entry
4173 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4174 ; AVX-NEXT: vmovd %eax, %xmm0
4175 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4176 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
4177 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4178 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
4179 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4180 ; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
4181 ; AVX-NEXT: retq
4182 entry:
4183 %result = call <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f64(
4184 <4 x double><double 42.1, double 42.2,
4185 double 42.3, double 42.4>,
4186 metadata !"fpexcept.strict")
4187 ret <4 x i32> %result
4188 }
4190 define <1 x i64> @constrained_vector_fptosi_v1i64_v1f64() {
4191 ; CHECK-LABEL: constrained_vector_fptosi_v1i64_v1f64:
4192 ; CHECK: # %bb.0: # %entry
4193 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4194 ; CHECK-NEXT: retq
4195 ;
4196 ; AVX-LABEL: constrained_vector_fptosi_v1i64_v1f64:
4197 ; AVX: # %bb.0: # %entry
4198 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4199 ; AVX-NEXT: retq
4200 entry:
4201 %result = call <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f64(
4202 <1 x double><double 42.1>,
4203 metadata !"fpexcept.strict")
4204 ret <1 x i64> %result
4205 }
4207 define <2 x i64> @constrained_vector_fptosi_v2i64_v2f64() {
4208 ; CHECK-LABEL: constrained_vector_fptosi_v2i64_v2f64:
4209 ; CHECK: # %bb.0: # %entry
4210 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4211 ; CHECK-NEXT: movq %rax, %xmm1
4212 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4213 ; CHECK-NEXT: movq %rax, %xmm0
4214 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4215 ; CHECK-NEXT: retq
4216 ;
4217 ; AVX-LABEL: constrained_vector_fptosi_v2i64_v2f64:
4218 ; AVX: # %bb.0: # %entry
4219 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4220 ; AVX-NEXT: vmovq %rax, %xmm0
4221 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4222 ; AVX-NEXT: vmovq %rax, %xmm1
4223 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4224 ; AVX-NEXT: retq
4225 entry:
4226 %result = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f64(
4227 <2 x double><double 42.1, double 42.2>,
4228 metadata !"fpexcept.strict")
4229 ret <2 x i64> %result
4230 }
4232 define <3 x i64> @constrained_vector_fptosi_v3i64_v3f64() {
4233 ; CHECK-LABEL: constrained_vector_fptosi_v3i64_v3f64:
4234 ; CHECK: # %bb.0: # %entry
4235 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4236 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rdx
4237 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rcx
4238 ; CHECK-NEXT: retq
4239 ;
4240 ; AVX-LABEL: constrained_vector_fptosi_v3i64_v3f64:
4241 ; AVX: # %bb.0: # %entry
4242 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4243 ; AVX-NEXT: vmovq %rax, %xmm0
4244 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4245 ; AVX-NEXT: vmovq %rax, %xmm1
4246 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4247 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4248 ; AVX-NEXT: vmovq %rax, %xmm1
4249 ; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
4250 ; AVX-NEXT: retq
4251 entry:
4252 %result = call <3 x i64> @llvm.experimental.constrained.fptosi.v3i64.v3f64(
4253 <3 x double><double 42.1, double 42.2,
4254 double 42.3>,
4255 metadata !"fpexcept.strict")
4256 ret <3 x i64> %result
4257 }
4259 define <4 x i64> @constrained_vector_fptosi_v4i64_v4f64() {
4260 ; CHECK-LABEL: constrained_vector_fptosi_v4i64_v4f64:
4261 ; CHECK: # %bb.0: # %entry
4262 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4263 ; CHECK-NEXT: movq %rax, %xmm1
4264 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4265 ; CHECK-NEXT: movq %rax, %xmm0
4266 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4267 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4268 ; CHECK-NEXT: movq %rax, %xmm2
4269 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4270 ; CHECK-NEXT: movq %rax, %xmm1
4271 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
4272 ; CHECK-NEXT: retq
4273 ;
4274 ; AVX-LABEL: constrained_vector_fptosi_v4i64_v4f64:
4275 ; AVX: # %bb.0: # %entry
4276 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4277 ; AVX-NEXT: vmovq %rax, %xmm0
4278 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4279 ; AVX-NEXT: vmovq %rax, %xmm1
4280 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4281 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4282 ; AVX-NEXT: vmovq %rax, %xmm1
4283 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4284 ; AVX-NEXT: vmovq %rax, %xmm2
4285 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
4286 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
4287 ; AVX-NEXT: retq
4288 entry:
4289 %result = call <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f64(
4290 <4 x double><double 42.1, double 42.2,
4291 double 42.3, double 42.4>,
4292 metadata !"fpexcept.strict")
4293 ret <4 x i64> %result
4294 }
4296 define <1 x i32> @constrained_vector_fptoui_v1i32_v1f32() {
4297 ; CHECK-LABEL: constrained_vector_fptoui_v1i32_v1f32:
4298 ; CHECK: # %bb.0: # %entry
4299 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
4300 ; CHECK-NEXT: retq
4301 ;
4302 ; AVX-LABEL: constrained_vector_fptoui_v1i32_v1f32:
4303 ; AVX: # %bb.0: # %entry
4304 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
4305 ; AVX-NEXT: retq
4306 entry:
4307 %result = call <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f32(
4308 <1 x float><float 42.0>,
4309 metadata !"fpexcept.strict")
4310 ret <1 x i32> %result
4311 }
4313 define <2 x i32> @constrained_vector_fptoui_v2i32_v2f32() {
4314 ; CHECK-LABEL: constrained_vector_fptoui_v2i32_v2f32:
4315 ; CHECK: # %bb.0: # %entry
4316 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
4317 ; CHECK-NEXT: movd %eax, %xmm1
4318 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
4319 ; CHECK-NEXT: movd %eax, %xmm0
4320 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
4321 ; CHECK-NEXT: retq
4322 ;
4323 ; AVX-LABEL: constrained_vector_fptoui_v2i32_v2f32:
4324 ; AVX: # %bb.0: # %entry
4325 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
4326 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %ecx
4327 ; AVX-NEXT: vmovd %ecx, %xmm0
4328 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
4329 ; AVX-NEXT: retq
4330 entry:
4331 %result = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f32(
4332 <2 x float><float 42.0, float 43.0>,
4333 metadata !"fpexcept.strict")
4334 ret <2 x i32> %result
4335 }
4337 define <3 x i32> @constrained_vector_fptoui_v3i32_v3f32() {
4338 ; CHECK-LABEL: constrained_vector_fptoui_v3i32_v3f32:
4339 ; CHECK: # %bb.0: # %entry
4340 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
4341 ; CHECK-NEXT: movd %eax, %xmm1
4342 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
4343 ; CHECK-NEXT: movd %eax, %xmm0
4344 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
4345 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
4346 ; CHECK-NEXT: movd %eax, %xmm1
4347 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4348 ; CHECK-NEXT: retq
4349 ;
4350 ; AVX-LABEL: constrained_vector_fptoui_v3i32_v3f32:
4351 ; AVX: # %bb.0: # %entry
4352 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
4353 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %ecx
4354 ; AVX-NEXT: vmovd %ecx, %xmm0
4355 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
4356 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
4357 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
4358 ; AVX-NEXT: retq
4359 entry:
4360 %result = call <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f32(
4361 <3 x float><float 42.0, float 43.0,
4362 float 44.0>,
4363 metadata !"fpexcept.strict")
4364 ret <3 x i32> %result
4365 }
4367 define <4 x i32> @constrained_vector_fptoui_v4i32_v4f32() {
4368 ; CHECK-LABEL: constrained_vector_fptoui_v4i32_v4f32:
4369 ; CHECK: # %bb.0: # %entry
4370 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
4371 ; CHECK-NEXT: movd %eax, %xmm0
4372 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
4373 ; CHECK-NEXT: movd %eax, %xmm1
4374 ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
4375 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
4376 ; CHECK-NEXT: movd %eax, %xmm2
4377 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
4378 ; CHECK-NEXT: movd %eax, %xmm0
4379 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
4380 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4381 ; CHECK-NEXT: retq
4382 ;
4383 ; AVX-LABEL: constrained_vector_fptoui_v4i32_v4f32:
4384 ; AVX: # %bb.0: # %entry
4385 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
4386 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %ecx
4387 ; AVX-NEXT: vmovd %ecx, %xmm0
4388 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
4389 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
4390 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
4391 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
4392 ; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
4393 ; AVX-NEXT: retq
4394 entry:
4395 %result = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f32(
4396 <4 x float><float 42.0, float 43.0,
4397 float 44.0, float 45.0>,
4398 metadata !"fpexcept.strict")
4399 ret <4 x i32> %result
4400 }
4402 define <1 x i64> @constrained_vector_fptoui_v1i64_v1f32() {
4403 ; CHECK-LABEL: constrained_vector_fptoui_v1i64_v1f32:
4404 ; CHECK: # %bb.0: # %entry
4405 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4406 ; CHECK-NEXT: retq
4407 ;
4408 ; AVX-LABEL: constrained_vector_fptoui_v1i64_v1f32:
4409 ; AVX: # %bb.0: # %entry
4410 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4411 ; AVX-NEXT: retq
4412 entry:
4413 %result = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f32(
4414 <1 x float><float 42.0>,
4415 metadata !"fpexcept.strict")
4416 ret <1 x i64> %result
4417 }
4419 define <2 x i64> @constrained_vector_fptoui_v2i64_v2f32() {
4420 ; CHECK-LABEL: constrained_vector_fptoui_v2i64_v2f32:
4421 ; CHECK: # %bb.0: # %entry
4422 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4423 ; CHECK-NEXT: movq %rax, %xmm1
4424 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4425 ; CHECK-NEXT: movq %rax, %xmm0
4426 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4427 ; CHECK-NEXT: retq
4428 ;
4429 ; AVX-LABEL: constrained_vector_fptoui_v2i64_v2f32:
4430 ; AVX: # %bb.0: # %entry
4431 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4432 ; AVX-NEXT: vmovq %rax, %xmm0
4433 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4434 ; AVX-NEXT: vmovq %rax, %xmm1
4435 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4436 ; AVX-NEXT: retq
4437 entry:
4438 %result = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f32(
4439 <2 x float><float 42.0, float 43.0>,
4440 metadata !"fpexcept.strict")
4441 ret <2 x i64> %result
4442 }
4444 define <3 x i64> @constrained_vector_fptoui_v3i64_v3f32() {
4445 ; CHECK-LABEL: constrained_vector_fptoui_v3i64_v3f32:
4446 ; CHECK: # %bb.0: # %entry
4447 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4448 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rdx
4449 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rcx
4450 ; CHECK-NEXT: retq
4451 ;
4452 ; AVX-LABEL: constrained_vector_fptoui_v3i64_v3f32:
4453 ; AVX: # %bb.0: # %entry
4454 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4455 ; AVX-NEXT: vmovq %rax, %xmm0
4456 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4457 ; AVX-NEXT: vmovq %rax, %xmm1
4458 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4459 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4460 ; AVX-NEXT: vmovq %rax, %xmm1
4461 ; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
4462 ; AVX-NEXT: retq
4463 entry:
4464 %result = call <3 x i64> @llvm.experimental.constrained.fptoui.v3i64.v3f32(
4465 <3 x float><float 42.0, float 43.0,
4466 float 44.0>,
4467 metadata !"fpexcept.strict")
4468 ret <3 x i64> %result
4469 }
4471 define <4 x i64> @constrained_vector_fptoui_v4i64_v4f32() {
4472 ; CHECK-LABEL: constrained_vector_fptoui_v4i64_v4f32:
4473 ; CHECK: # %bb.0: # %entry
4474 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4475 ; CHECK-NEXT: movq %rax, %xmm1
4476 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4477 ; CHECK-NEXT: movq %rax, %xmm0
4478 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4479 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4480 ; CHECK-NEXT: movq %rax, %xmm2
4481 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
4482 ; CHECK-NEXT: movq %rax, %xmm1
4483 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
4484 ; CHECK-NEXT: retq
4485 ;
4486 ; AVX-LABEL: constrained_vector_fptoui_v4i64_v4f32:
4487 ; AVX: # %bb.0: # %entry
4488 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4489 ; AVX-NEXT: vmovq %rax, %xmm0
4490 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4491 ; AVX-NEXT: vmovq %rax, %xmm1
4492 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4493 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4494 ; AVX-NEXT: vmovq %rax, %xmm1
4495 ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
4496 ; AVX-NEXT: vmovq %rax, %xmm2
4497 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
4498 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
4499 ; AVX-NEXT: retq
4500 entry:
4501 %result = call <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f32(
4502 <4 x float><float 42.0, float 43.0,
4503 float 44.0, float 45.0>,
4504 metadata !"fpexcept.strict")
4505 ret <4 x i64> %result
4506 }
4508 define <1 x i32> @constrained_vector_fptoui_v1i32_v1f64() {
4509 ; CHECK-LABEL: constrained_vector_fptoui_v1i32_v1f64:
4510 ; CHECK: # %bb.0: # %entry
4511 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4512 ; CHECK-NEXT: retq
4513 ;
4514 ; AVX-LABEL: constrained_vector_fptoui_v1i32_v1f64:
4515 ; AVX: # %bb.0: # %entry
4516 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4517 ; AVX-NEXT: retq
4518 entry:
4519 %result = call <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f64(
4520 <1 x double><double 42.1>,
4521 metadata !"fpexcept.strict")
4522 ret <1 x i32> %result
4523 }
4525 define <2 x i32> @constrained_vector_fptoui_v2i32_v2f64() {
4526 ; CHECK-LABEL: constrained_vector_fptoui_v2i32_v2f64:
4527 ; CHECK: # %bb.0: # %entry
4528 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4529 ; CHECK-NEXT: movd %eax, %xmm1
4530 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4531 ; CHECK-NEXT: movd %eax, %xmm0
4532 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
4533 ; CHECK-NEXT: retq
4534 ;
4535 ; AVX-LABEL: constrained_vector_fptoui_v2i32_v2f64:
4536 ; AVX: # %bb.0: # %entry
4537 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4538 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %ecx
4539 ; AVX-NEXT: vmovd %ecx, %xmm0
4540 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
4541 ; AVX-NEXT: retq
4542 entry:
4543 %result = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f64(
4544 <2 x double><double 42.1, double 42.2>,
4545 metadata !"fpexcept.strict")
4546 ret <2 x i32> %result
4547 }
4549 define <3 x i32> @constrained_vector_fptoui_v3i32_v3f64() {
4550 ; CHECK-LABEL: constrained_vector_fptoui_v3i32_v3f64:
4551 ; CHECK: # %bb.0: # %entry
4552 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4553 ; CHECK-NEXT: movd %eax, %xmm1
4554 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4555 ; CHECK-NEXT: movd %eax, %xmm0
4556 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
4557 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4558 ; CHECK-NEXT: movd %eax, %xmm1
4559 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4560 ; CHECK-NEXT: retq
4561 ;
4562 ; AVX-LABEL: constrained_vector_fptoui_v3i32_v3f64:
4563 ; AVX: # %bb.0: # %entry
4564 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4565 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %ecx
4566 ; AVX-NEXT: vmovd %ecx, %xmm0
4567 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
4568 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4569 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
4570 ; AVX-NEXT: retq
4571 entry:
4572 %result = call <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f64(
4573 <3 x double><double 42.1, double 42.2,
4574 double 42.3>,
4575 metadata !"fpexcept.strict")
4576 ret <3 x i32> %result
4577 }
4579 define <4 x i32> @constrained_vector_fptoui_v4i32_v4f64() {
4580 ; CHECK-LABEL: constrained_vector_fptoui_v4i32_v4f64:
4581 ; CHECK: # %bb.0: # %entry
4582 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4583 ; CHECK-NEXT: movd %eax, %xmm0
4584 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4585 ; CHECK-NEXT: movd %eax, %xmm1
4586 ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
4587 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4588 ; CHECK-NEXT: movd %eax, %xmm2
4589 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
4590 ; CHECK-NEXT: movd %eax, %xmm0
4591 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
4592 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4593 ; CHECK-NEXT: retq
4594 ;
4595 ; AVX-LABEL: constrained_vector_fptoui_v4i32_v4f64:
4596 ; AVX: # %bb.0: # %entry
4597 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4598 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %ecx
4599 ; AVX-NEXT: vmovd %ecx, %xmm0
4600 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
4601 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4602 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
4603 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
4604 ; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
4605 ; AVX-NEXT: retq
4606 entry:
4607 %result = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f64(
4608 <4 x double><double 42.1, double 42.2,
4609 double 42.3, double 42.4>,
4610 metadata !"fpexcept.strict")
4611 ret <4 x i32> %result
4612 }
4614 define <1 x i64> @constrained_vector_fptoui_v1i64_v1f64() {
4615 ; CHECK-LABEL: constrained_vector_fptoui_v1i64_v1f64:
4616 ; CHECK: # %bb.0: # %entry
4617 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4618 ; CHECK-NEXT: retq
4619 ;
4620 ; AVX-LABEL: constrained_vector_fptoui_v1i64_v1f64:
4621 ; AVX: # %bb.0: # %entry
4622 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4623 ; AVX-NEXT: retq
4624 entry:
4625 %result = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f64(
4626 <1 x double><double 42.1>,
4627 metadata !"fpexcept.strict")
4628 ret <1 x i64> %result
4629 }
4631 define <2 x i64> @constrained_vector_fptoui_v2i64_v2f64() {
4632 ; CHECK-LABEL: constrained_vector_fptoui_v2i64_v2f64:
4633 ; CHECK: # %bb.0: # %entry
4634 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4635 ; CHECK-NEXT: movq %rax, %xmm1
4636 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4637 ; CHECK-NEXT: movq %rax, %xmm0
4638 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4639 ; CHECK-NEXT: retq
4640 ;
4641 ; AVX-LABEL: constrained_vector_fptoui_v2i64_v2f64:
4642 ; AVX: # %bb.0: # %entry
4643 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4644 ; AVX-NEXT: vmovq %rax, %xmm0
4645 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4646 ; AVX-NEXT: vmovq %rax, %xmm1
4647 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4648 ; AVX-NEXT: retq
4649 entry:
4650 %result = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64(
4651 <2 x double><double 42.1, double 42.2>,
4652 metadata !"fpexcept.strict")
4653 ret <2 x i64> %result
4654 }
4656 define <3 x i64> @constrained_vector_fptoui_v3i64_v3f64() {
4657 ; CHECK-LABEL: constrained_vector_fptoui_v3i64_v3f64:
4658 ; CHECK: # %bb.0: # %entry
4659 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4660 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rdx
4661 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rcx
4662 ; CHECK-NEXT: retq
4663 ;
4664 ; AVX-LABEL: constrained_vector_fptoui_v3i64_v3f64:
4665 ; AVX: # %bb.0: # %entry
4666 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4667 ; AVX-NEXT: vmovq %rax, %xmm0
4668 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4669 ; AVX-NEXT: vmovq %rax, %xmm1
4670 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4671 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4672 ; AVX-NEXT: vmovq %rax, %xmm1
4673 ; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
4674 ; AVX-NEXT: retq
4675 entry:
4676 %result = call <3 x i64> @llvm.experimental.constrained.fptoui.v3i64.v3f64(
4677 <3 x double><double 42.1, double 42.2,
4678 double 42.3>,
4679 metadata !"fpexcept.strict")
4680 ret <3 x i64> %result
4681 }
4683 define <4 x i64> @constrained_vector_fptoui_v4i64_v4f64() {
4684 ; CHECK-LABEL: constrained_vector_fptoui_v4i64_v4f64:
4685 ; CHECK: # %bb.0: # %entry
4686 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4687 ; CHECK-NEXT: movq %rax, %xmm1
4688 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4689 ; CHECK-NEXT: movq %rax, %xmm0
4690 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4691 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4692 ; CHECK-NEXT: movq %rax, %xmm2
4693 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
4694 ; CHECK-NEXT: movq %rax, %xmm1
4695 ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
4696 ; CHECK-NEXT: retq
4697 ;
4698 ; AVX-LABEL: constrained_vector_fptoui_v4i64_v4f64:
4699 ; AVX: # %bb.0: # %entry
4700 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4701 ; AVX-NEXT: vmovq %rax, %xmm0
4702 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4703 ; AVX-NEXT: vmovq %rax, %xmm1
4704 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4705 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4706 ; AVX-NEXT: vmovq %rax, %xmm1
4707 ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
4708 ; AVX-NEXT: vmovq %rax, %xmm2
4709 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
4710 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
4711 ; AVX-NEXT: retq
4712 entry:
4713 %result = call <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f64(
4714 <4 x double><double 42.1, double 42.2,
4715 double 42.3, double 42.4>,
4716 metadata !"fpexcept.strict")
4717 ret <4 x i64> %result
4718 }
4721 define <1 x float> @constrained_vector_fptrunc_v1f64() {
4722 ; CHECK-LABEL: constrained_vector_fptrunc_v1f64:
4723 ; CHECK: # %bb.0: # %entry
4724 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
4725 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
4726 ; CHECK-NEXT: retq
4727 ;
4728 ; AVX-LABEL: constrained_vector_fptrunc_v1f64:
4729 ; AVX: # %bb.0: # %entry
4730 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
4731 ; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
4732 ; AVX-NEXT: retq
4733 entry:
4734 %result = call <1 x float> @llvm.experimental.constrained.fptrunc.v1f32.v1f64(
4735 <1 x double><double 42.1>,
4736 metadata !"round.dynamic",
4737 metadata !"fpexcept.strict")
4738 ret <1 x float> %result
4739 }
4741 define <2 x float> @constrained_vector_fptrunc_v2f64() {
4742 ; CHECK-LABEL: constrained_vector_fptrunc_v2f64:
4743 ; CHECK: # %bb.0: # %entry
4744 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
4745 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm1
4746 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
4747 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
4748 ; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
4749 ; CHECK-NEXT: retq
4750 ;
4751 ; AVX-LABEL: constrained_vector_fptrunc_v2f64:
4752 ; AVX: # %bb.0: # %entry
4753 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
4754 ; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
4755 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
4756 ; AVX-NEXT: vcvtsd2ss %xmm1, %xmm1, %xmm1
4757 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
4758 ; AVX-NEXT: retq
4759 entry:
4760 %result = call <2 x float> @llvm.experimental.constrained.fptrunc.v2f32.v2f64(
4761 <2 x double><double 42.1, double 42.2>,
4762 metadata !"round.dynamic",
4763 metadata !"fpexcept.strict")
4764 ret <2 x float> %result
4765 }
4767 define <3 x float> @constrained_vector_fptrunc_v3f64() {
4768 ; CHECK-LABEL: constrained_vector_fptrunc_v3f64:
4769 ; CHECK: # %bb.0: # %entry
4770 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
4771 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm1
4772 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
4773 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
4774 ; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
4775 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
4776 ; CHECK-NEXT: cvtsd2ss %xmm1, %xmm1
4777 ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4778 ; CHECK-NEXT: retq
4779 ;
4780 ; AVX-LABEL: constrained_vector_fptrunc_v3f64:
4781 ; AVX: # %bb.0: # %entry
4782 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
4783 ; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
4784 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
4785 ; AVX-NEXT: vcvtsd2ss %xmm1, %xmm1, %xmm1
4786 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
4787 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
4788 ; AVX-NEXT: vcvtsd2ss %xmm1, %xmm1, %xmm1
4789 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]
4790 ; AVX-NEXT: retq
4791 entry:
4792 %result = call <3 x float> @llvm.experimental.constrained.fptrunc.v3f32.v3f64(
4793 <3 x double><double 42.1, double 42.2,
4794 double 42.3>,
4795 metadata !"round.dynamic",
4796 metadata !"fpexcept.strict")
4797 ret <3 x float> %result
4798 }
4800 define <4 x float> @constrained_vector_fptrunc_v4f64() {
4801 ; CHECK-LABEL: constrained_vector_fptrunc_v4f64:
4802 ; CHECK: # %bb.0: # %entry
4803 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
4804 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
4805 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
4806 ; CHECK-NEXT: cvtsd2ss %xmm1, %xmm1
4807 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
4808 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
4809 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm2
4810 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
4811 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
4812 ; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
4813 ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4814 ; CHECK-NEXT: retq
4815 ;
4816 ; AVX-LABEL: constrained_vector_fptrunc_v4f64:
4817 ; AVX: # %bb.0: # %entry
4818 ; AVX-NEXT: vcvtpd2psy {{.*}}(%rip), %xmm0
4819 ; AVX-NEXT: retq
4820 entry:
4821 %result = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64(
4822 <4 x double><double 42.1, double 42.2,
4823 double 42.3, double 42.4>,
4824 metadata !"round.dynamic",
4825 metadata !"fpexcept.strict")
4826 ret <4 x float> %result
4827 }
4829 define <1 x double> @constrained_vector_fpext_v1f32() {
4830 ; CHECK-LABEL: constrained_vector_fpext_v1f32:
4831 ; CHECK: # %bb.0: # %entry
4832 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4833 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm0
4834 ; CHECK-NEXT: retq
4835 ;
4836 ; AVX-LABEL: constrained_vector_fpext_v1f32:
4837 ; AVX: # %bb.0: # %entry
4838 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4839 ; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
4840 ; AVX-NEXT: retq
4841 entry:
4842 %result = call <1 x double> @llvm.experimental.constrained.fpext.v1f64.v1f32(
4843 <1 x float><float 42.0>,
4844 metadata !"fpexcept.strict")
4845 ret <1 x double> %result
4846 }
4848 define <2 x double> @constrained_vector_fpext_v2f32() {
4849 ; CHECK-LABEL: constrained_vector_fpext_v2f32:
4850 ; CHECK: # %bb.0: # %entry
4851 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4852 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm1
4853 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4854 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm0
4855 ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4856 ; CHECK-NEXT: retq
4857 ;
4858 ; AVX-LABEL: constrained_vector_fpext_v2f32:
4859 ; AVX: # %bb.0: # %entry
4860 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4861 ; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
4862 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
4863 ; AVX-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
4864 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4865 ; AVX-NEXT: retq
4866 entry:
4867 %result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(
4868 <2 x float><float 42.0, float 43.0>,
4869 metadata !"fpexcept.strict")
4870 ret <2 x double> %result
4871 }
4873 define <3 x double> @constrained_vector_fpext_v3f32() {
4874 ; CHECK-LABEL: constrained_vector_fpext_v3f32:
4875 ; CHECK: # %bb.0: # %entry
4876 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4877 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm0
4878 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
4879 ; CHECK-NEXT: cvtss2sd %xmm1, %xmm1
4880 ; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
4881 ; CHECK-NEXT: cvtss2sd %xmm2, %xmm2
4882 ; CHECK-NEXT: movsd %xmm2, -{{[0-9]+}}(%rsp)
4883 ; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)
4884 ; CHECK-NEXT: retq
4885 ;
4886 ; AVX-LABEL: constrained_vector_fpext_v3f32:
4887 ; AVX: # %bb.0: # %entry
4888 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4889 ; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
4890 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
4891 ; AVX-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
4892 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
4893 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
4894 ; AVX-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
4895 ; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
4896 ; AVX-NEXT: retq
4897 entry:
4898 %result = call <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32(
4899 <3 x float><float 42.0, float 43.0,
4900 float 44.0>,
4901 metadata !"fpexcept.strict")
4902 ret <3 x double> %result
4903 }
4905 define <4 x double> @constrained_vector_fpext_v4f32() {
4906 ; CHECK-LABEL: constrained_vector_fpext_v4f32:
4907 ; CHECK: # %bb.0: # %entry
4908 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4909 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm1
4910 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4911 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm0
4912 ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
4913 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
4914 ; CHECK-NEXT: cvtss2sd %xmm1, %xmm2
4915 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
4916 ; CHECK-NEXT: cvtss2sd %xmm1, %xmm1
4917 ; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm2[0]
4918 ; CHECK-NEXT: retq
4919 ;
4920 ; AVX-LABEL: constrained_vector_fpext_v4f32:
4921 ; AVX: # %bb.0: # %entry
4922 ; AVX-NEXT: vcvtps2pd {{.*}}(%rip), %ymm0
4923 ; AVX-NEXT: retq
4924 entry:
4925 %result = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32(
4926 <4 x float><float 42.0, float 43.0,
4927 float 44.0, float 45.0>,
4928 metadata !"fpexcept.strict")
4929 ret <4 x double> %result
4930 }
4932 define <1 x float> @constrained_vector_ceil_v1f32() {
4933 ; CHECK-LABEL: constrained_vector_ceil_v1f32:
4934 ; CHECK: # %bb.0: # %entry
4935 ; CHECK-NEXT: pushq %rax
4936 ; CHECK-NEXT: .cfi_def_cfa_offset 16
4937 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4938 ; CHECK-NEXT: callq ceilf
4939 ; CHECK-NEXT: popq %rax
4940 ; CHECK-NEXT: .cfi_def_cfa_offset 8
4941 ; CHECK-NEXT: retq
4942 ;
4943 ; AVX-LABEL: constrained_vector_ceil_v1f32:
4944 ; AVX: # %bb.0: # %entry
4945 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4946 ; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm0
4947 ; AVX-NEXT: retq
4948 entry:
4949 %ceil = call <1 x float> @llvm.experimental.constrained.ceil.v1f32(
4950 <1 x float> <float 1.5>,
4951 metadata !"round.dynamic",
4952 metadata !"fpexcept.strict")
4953 ret <1 x float> %ceil
4954 }
4956 define <2 x double> @constrained_vector_ceil_v2f64() {
4957 ; CHECK-LABEL: constrained_vector_ceil_v2f64:
4958 ; CHECK: # %bb.0: # %entry
4959 ; CHECK-NEXT: subq $24, %rsp
4960 ; CHECK-NEXT: .cfi_def_cfa_offset 32
4961 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
4962 ; CHECK-NEXT: callq ceil
4963 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
4964 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
4965 ; CHECK-NEXT: callq ceil
4966 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
4967 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
4968 ; CHECK-NEXT: addq $24, %rsp
4969 ; CHECK-NEXT: .cfi_def_cfa_offset 8
4970 ; CHECK-NEXT: retq
4971 ;
4972 ; AVX-LABEL: constrained_vector_ceil_v2f64:
4973 ; AVX: # %bb.0: # %entry
4974 ; AVX-NEXT: vroundpd $10, {{.*}}(%rip), %xmm0
4975 ; AVX-NEXT: retq
4976 entry:
4977 %ceil = call <2 x double> @llvm.experimental.constrained.ceil.v2f64(
4978 <2 x double> <double 1.1, double 1.9>,
4979 metadata !"round.dynamic",
4980 metadata !"fpexcept.strict")
4981 ret <2 x double> %ceil
4982 }
4984 define <3 x float> @constrained_vector_ceil_v3f32() {
4985 ; CHECK-LABEL: constrained_vector_ceil_v3f32:
4986 ; CHECK: # %bb.0: # %entry
4987 ; CHECK-NEXT: subq $40, %rsp
4988 ; CHECK-NEXT: .cfi_def_cfa_offset 48
4989 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4990 ; CHECK-NEXT: callq ceilf
4991 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
4992 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4993 ; CHECK-NEXT: callq ceilf
4994 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
4995 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
4996 ; CHECK-NEXT: callq ceilf
4997 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
4998 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
4999 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
5000 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
5001 ; CHECK-NEXT: movaps %xmm1, %xmm0
5002 ; CHECK-NEXT: addq $40, %rsp
5003 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5004 ; CHECK-NEXT: retq
5005 ;
5006 ; AVX-LABEL: constrained_vector_ceil_v3f32:
5007 ; AVX: # %bb.0: # %entry
5008 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5009 ; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm0
5010 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
5011 ; AVX-NEXT: vroundss $10, %xmm1, %xmm1, %xmm1
5012 ; AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
5013 ; AVX-NEXT: vroundss $10, %xmm2, %xmm2, %xmm2
5014 ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
5015 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
5016 ; AVX-NEXT: retq
5017 entry:
5018 %ceil = call <3 x float> @llvm.experimental.constrained.ceil.v3f32(
5019 <3 x float> <float 1.5, float 2.5, float 3.5>,
5020 metadata !"round.dynamic",
5021 metadata !"fpexcept.strict")
5022 ret <3 x float> %ceil
5023 }
5025 define <3 x double> @constrained_vector_ceil_v3f64() {
5026 ; CHECK-LABEL: constrained_vector_ceil_v3f64:
5027 ; CHECK: # %bb.0: # %entry
5028 ; CHECK-NEXT: subq $24, %rsp
5029 ; CHECK-NEXT: .cfi_def_cfa_offset 32
5030 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5031 ; CHECK-NEXT: callq ceil
5032 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
5033 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5034 ; CHECK-NEXT: callq ceil
5035 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
5036 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5037 ; CHECK-NEXT: callq ceil
5038 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
5039 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
5040 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
5041 ; CHECK-NEXT: # xmm0 = mem[0],zero
5042 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
5043 ; CHECK-NEXT: # xmm1 = mem[0],zero
5044 ; CHECK-NEXT: addq $24, %rsp
5045 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5046 ; CHECK-NEXT: retq
5047 ;
5048 ; AVX-LABEL: constrained_vector_ceil_v3f64:
5049 ; AVX: # %bb.0: # %entry
5050 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
5051 ; AVX-NEXT: vroundsd $10, %xmm0, %xmm0, %xmm0
5052 ; AVX-NEXT: vroundpd $10, {{.*}}(%rip), %xmm1
5053 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
5054 ; AVX-NEXT: retq
5055 entry:
5056 %ceil = call <3 x double> @llvm.experimental.constrained.ceil.v3f64(
5057 <3 x double> <double 1.1, double 1.9, double 1.5>,
5058 metadata !"round.dynamic",
5059 metadata !"fpexcept.strict")
5060 ret <3 x double> %ceil
5061 }
5063 define <1 x float> @constrained_vector_floor_v1f32() {
5064 ; CHECK-LABEL: constrained_vector_floor_v1f32:
5065 ; CHECK: # %bb.0: # %entry
5066 ; CHECK-NEXT: pushq %rax
5067 ; CHECK-NEXT: .cfi_def_cfa_offset 16
5068 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5069 ; CHECK-NEXT: callq floorf
5070 ; CHECK-NEXT: popq %rax
5071 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5072 ; CHECK-NEXT: retq
5073 ;
5074 ; AVX-LABEL: constrained_vector_floor_v1f32:
5075 ; AVX: # %bb.0: # %entry
5076 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5077 ; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0
5078 ; AVX-NEXT: retq
5079 entry:
5080 %floor = call <1 x float> @llvm.experimental.constrained.floor.v1f32(
5081 <1 x float> <float 1.5>,
5082 metadata !"round.dynamic",
5083 metadata !"fpexcept.strict")
5084 ret <1 x float> %floor
5085 }
5088 define <2 x double> @constrained_vector_floor_v2f64() {
5089 ; CHECK-LABEL: constrained_vector_floor_v2f64:
5090 ; CHECK: # %bb.0: # %entry
5091 ; CHECK-NEXT: subq $24, %rsp
5092 ; CHECK-NEXT: .cfi_def_cfa_offset 32
5093 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5094 ; CHECK-NEXT: callq floor
5095 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
5096 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5097 ; CHECK-NEXT: callq floor
5098 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
5099 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
5100 ; CHECK-NEXT: addq $24, %rsp
5101 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5102 ; CHECK-NEXT: retq
5103 ;
5104 ; AVX-LABEL: constrained_vector_floor_v2f64:
5105 ; AVX: # %bb.0: # %entry
5106 ; AVX-NEXT: vroundpd $9, {{.*}}(%rip), %xmm0
5107 ; AVX-NEXT: retq
5108 entry:
5109 %floor = call <2 x double> @llvm.experimental.constrained.floor.v2f64(
5110 <2 x double> <double 1.1, double 1.9>,
5111 metadata !"round.dynamic",
5112 metadata !"fpexcept.strict")
5113 ret <2 x double> %floor
5114 }
5116 define <3 x float> @constrained_vector_floor_v3f32() {
5117 ; CHECK-LABEL: constrained_vector_floor_v3f32:
5118 ; CHECK: # %bb.0: # %entry
5119 ; CHECK-NEXT: subq $40, %rsp
5120 ; CHECK-NEXT: .cfi_def_cfa_offset 48
5121 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5122 ; CHECK-NEXT: callq floorf
5123 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
5124 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5125 ; CHECK-NEXT: callq floorf
5126 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
5127 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5128 ; CHECK-NEXT: callq floorf
5129 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
5130 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
5131 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
5132 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
5133 ; CHECK-NEXT: movaps %xmm1, %xmm0
5134 ; CHECK-NEXT: addq $40, %rsp
5135 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5136 ; CHECK-NEXT: retq
5137 ;
5138 ; AVX-LABEL: constrained_vector_floor_v3f32:
5139 ; AVX: # %bb.0: # %entry
5140 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5141 ; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0
5142 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
5143 ; AVX-NEXT: vroundss $9, %xmm1, %xmm1, %xmm1
5144 ; AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
5145 ; AVX-NEXT: vroundss $9, %xmm2, %xmm2, %xmm2
5146 ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
5147 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
5148 ; AVX-NEXT: retq
5149 entry:
5150 %floor = call <3 x float> @llvm.experimental.constrained.floor.v3f32(
5151 <3 x float> <float 1.5, float 2.5, float 3.5>,
5152 metadata !"round.dynamic",
5153 metadata !"fpexcept.strict")
5154 ret <3 x float> %floor
5155 }
5157 define <3 x double> @constrained_vector_floor_v3f64() {
5158 ; CHECK-LABEL: constrained_vector_floor_v3f64:
5159 ; CHECK: # %bb.0: # %entry
5160 ; CHECK-NEXT: subq $24, %rsp
5161 ; CHECK-NEXT: .cfi_def_cfa_offset 32
5162 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5163 ; CHECK-NEXT: callq floor
5164 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
5165 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5166 ; CHECK-NEXT: callq floor
5167 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
5168 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5169 ; CHECK-NEXT: callq floor
5170 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
5171 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
5172 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
5173 ; CHECK-NEXT: # xmm0 = mem[0],zero
5174 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
5175 ; CHECK-NEXT: # xmm1 = mem[0],zero
5176 ; CHECK-NEXT: addq $24, %rsp
5177 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5178 ; CHECK-NEXT: retq
5179 ;
5180 ; AVX-LABEL: constrained_vector_floor_v3f64:
5181 ; AVX: # %bb.0: # %entry
5182 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
5183 ; AVX-NEXT: vroundsd $9, %xmm0, %xmm0, %xmm0
5184 ; AVX-NEXT: vroundpd $9, {{.*}}(%rip), %xmm1
5185 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
5186 ; AVX-NEXT: retq
5187 entry:
5188 %floor = call <3 x double> @llvm.experimental.constrained.floor.v3f64(
5189 <3 x double> <double 1.1, double 1.9, double 1.5>,
5190 metadata !"round.dynamic",
5191 metadata !"fpexcept.strict")
5192 ret <3 x double> %floor
5193 }
5195 define <1 x float> @constrained_vector_round_v1f32() {
5196 ; CHECK-LABEL: constrained_vector_round_v1f32:
5197 ; CHECK: # %bb.0: # %entry
5198 ; CHECK-NEXT: pushq %rax
5199 ; CHECK-NEXT: .cfi_def_cfa_offset 16
5200 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5201 ; CHECK-NEXT: callq roundf
5202 ; CHECK-NEXT: popq %rax
5203 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5204 ; CHECK-NEXT: retq
5205 ;
5206 ; AVX-LABEL: constrained_vector_round_v1f32:
5207 ; AVX: # %bb.0: # %entry
5208 ; AVX-NEXT: pushq %rax
5209 ; AVX-NEXT: .cfi_def_cfa_offset 16
5210 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5211 ; AVX-NEXT: callq roundf
5212 ; AVX-NEXT: popq %rax
5213 ; AVX-NEXT: .cfi_def_cfa_offset 8
5214 ; AVX-NEXT: retq
5215 entry:
5216 %round = call <1 x float> @llvm.experimental.constrained.round.v1f32(
5217 <1 x float> <float 1.5>,
5218 metadata !"round.dynamic",
5219 metadata !"fpexcept.strict")
5220 ret <1 x float> %round
5221 }
5223 define <2 x double> @constrained_vector_round_v2f64() {
5224 ; CHECK-LABEL: constrained_vector_round_v2f64:
5225 ; CHECK: # %bb.0: # %entry
5226 ; CHECK-NEXT: subq $24, %rsp
5227 ; CHECK-NEXT: .cfi_def_cfa_offset 32
5228 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5229 ; CHECK-NEXT: callq round
5230 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
5231 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5232 ; CHECK-NEXT: callq round
5233 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
5234 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
5235 ; CHECK-NEXT: addq $24, %rsp
5236 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5237 ; CHECK-NEXT: retq
5238 ;
5239 ; AVX-LABEL: constrained_vector_round_v2f64:
5240 ; AVX: # %bb.0: # %entry
5241 ; AVX-NEXT: subq $24, %rsp
5242 ; AVX-NEXT: .cfi_def_cfa_offset 32
5243 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
5244 ; AVX-NEXT: callq round
5245 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
5246 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
5247 ; AVX-NEXT: callq round
5248 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
5249 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
5250 ; AVX-NEXT: addq $24, %rsp
5251 ; AVX-NEXT: .cfi_def_cfa_offset 8
5252 ; AVX-NEXT: retq
5253 entry:
5254 %round = call <2 x double> @llvm.experimental.constrained.round.v2f64(
5255 <2 x double> <double 1.1, double 1.9>,
5256 metadata !"round.dynamic",
5257 metadata !"fpexcept.strict")
5258 ret <2 x double> %round
5259 }
5261 define <3 x float> @constrained_vector_round_v3f32() {
5262 ; CHECK-LABEL: constrained_vector_round_v3f32:
5263 ; CHECK: # %bb.0: # %entry
5264 ; CHECK-NEXT: subq $40, %rsp
5265 ; CHECK-NEXT: .cfi_def_cfa_offset 48
5266 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5267 ; CHECK-NEXT: callq roundf
5268 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
5269 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5270 ; CHECK-NEXT: callq roundf
5271 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
5272 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5273 ; CHECK-NEXT: callq roundf
5274 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
5275 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
5276 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
5277 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
5278 ; CHECK-NEXT: movaps %xmm1, %xmm0
5279 ; CHECK-NEXT: addq $40, %rsp
5280 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5281 ; CHECK-NEXT: retq
5282 ;
5283 ; AVX-LABEL: constrained_vector_round_v3f32:
5284 ; AVX: # %bb.0: # %entry
5285 ; AVX-NEXT: subq $40, %rsp
5286 ; AVX-NEXT: .cfi_def_cfa_offset 48
5287 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5288 ; AVX-NEXT: callq roundf
5289 ; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
5290 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5291 ; AVX-NEXT: callq roundf
5292 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
5293 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5294 ; AVX-NEXT: callq roundf
5295 ; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
5296 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
5297 ; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
5298 ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
5299 ; AVX-NEXT: addq $40, %rsp
5300 ; AVX-NEXT: .cfi_def_cfa_offset 8
5301 ; AVX-NEXT: retq
5302 entry:
5303 %round = call <3 x float> @llvm.experimental.constrained.round.v3f32(
5304 <3 x float> <float 1.5, float 2.5, float 3.5>,
5305 metadata !"round.dynamic",
5306 metadata !"fpexcept.strict")
5307 ret <3 x float> %round
5308 }
5311 define <3 x double> @constrained_vector_round_v3f64() {
5312 ; CHECK-LABEL: constrained_vector_round_v3f64:
5313 ; CHECK: # %bb.0: # %entry
5314 ; CHECK-NEXT: subq $24, %rsp
5315 ; CHECK-NEXT: .cfi_def_cfa_offset 32
5316 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5317 ; CHECK-NEXT: callq round
5318 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
5319 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5320 ; CHECK-NEXT: callq round
5321 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
5322 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5323 ; CHECK-NEXT: callq round
5324 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
5325 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
5326 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
5327 ; CHECK-NEXT: # xmm0 = mem[0],zero
5328 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
5329 ; CHECK-NEXT: # xmm1 = mem[0],zero
5330 ; CHECK-NEXT: addq $24, %rsp
5331 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5332 ; CHECK-NEXT: retq
5333 ;
5334 ; AVX-LABEL: constrained_vector_round_v3f64:
5335 ; AVX: # %bb.0: # %entry
5336 ; AVX-NEXT: subq $56, %rsp
5337 ; AVX-NEXT: .cfi_def_cfa_offset 64
5338 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
5339 ; AVX-NEXT: callq round
5340 ; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
5341 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
5342 ; AVX-NEXT: callq round
5343 ; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
5344 ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
5345 ; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
5346 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
5347 ; AVX-NEXT: vzeroupper
5348 ; AVX-NEXT: callq round
5349 ; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload
5350 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
5351 ; AVX-NEXT: addq $56, %rsp
5352 ; AVX-NEXT: .cfi_def_cfa_offset 8
5353 ; AVX-NEXT: retq
5354 entry:
5355 %round = call <3 x double> @llvm.experimental.constrained.round.v3f64(
5356 <3 x double> <double 1.1, double 1.9, double 1.5>,
5357 metadata !"round.dynamic",
5358 metadata !"fpexcept.strict")
5359 ret <3 x double> %round
5360 }
5362 define <1 x float> @constrained_vector_trunc_v1f32() {
5363 ; CHECK-LABEL: constrained_vector_trunc_v1f32:
5364 ; CHECK: # %bb.0: # %entry
5365 ; CHECK-NEXT: pushq %rax
5366 ; CHECK-NEXT: .cfi_def_cfa_offset 16
5367 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5368 ; CHECK-NEXT: callq truncf
5369 ; CHECK-NEXT: popq %rax
5370 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5371 ; CHECK-NEXT: retq
5372 ;
5373 ; AVX-LABEL: constrained_vector_trunc_v1f32:
5374 ; AVX: # %bb.0: # %entry
5375 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5376 ; AVX-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0
5377 ; AVX-NEXT: retq
5378 entry:
5379 %trunc = call <1 x float> @llvm.experimental.constrained.trunc.v1f32(
5380 <1 x float> <float 1.5>,
5381 metadata !"round.dynamic",
5382 metadata !"fpexcept.strict")
5383 ret <1 x float> %trunc
5384 }
5386 define <2 x double> @constrained_vector_trunc_v2f64() {
5387 ; CHECK-LABEL: constrained_vector_trunc_v2f64:
5388 ; CHECK: # %bb.0: # %entry
5389 ; CHECK-NEXT: subq $24, %rsp
5390 ; CHECK-NEXT: .cfi_def_cfa_offset 32
5391 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5392 ; CHECK-NEXT: callq trunc
5393 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
5394 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5395 ; CHECK-NEXT: callq trunc
5396 ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
5397 ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
5398 ; CHECK-NEXT: addq $24, %rsp
5399 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5400 ; CHECK-NEXT: retq
5401 ;
5402 ; AVX-LABEL: constrained_vector_trunc_v2f64:
5403 ; AVX: # %bb.0: # %entry
5404 ; AVX-NEXT: vroundpd $11, {{.*}}(%rip), %xmm0
5405 ; AVX-NEXT: retq
5406 entry:
5407 %trunc = call <2 x double> @llvm.experimental.constrained.trunc.v2f64(
5408 <2 x double> <double 1.1, double 1.9>,
5409 metadata !"round.dynamic",
5410 metadata !"fpexcept.strict")
5411 ret <2 x double> %trunc
5412 }
5414 define <3 x float> @constrained_vector_trunc_v3f32() {
5415 ; CHECK-LABEL: constrained_vector_trunc_v3f32:
5416 ; CHECK: # %bb.0: # %entry
5417 ; CHECK-NEXT: subq $40, %rsp
5418 ; CHECK-NEXT: .cfi_def_cfa_offset 48
5419 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5420 ; CHECK-NEXT: callq truncf
5421 ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
5422 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5423 ; CHECK-NEXT: callq truncf
5424 ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
5425 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5426 ; CHECK-NEXT: callq truncf
5427 ; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
5428 ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
5429 ; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
5430 ; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
5431 ; CHECK-NEXT: movaps %xmm1, %xmm0
5432 ; CHECK-NEXT: addq $40, %rsp
5433 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5434 ; CHECK-NEXT: retq
5435 ;
5436 ; AVX-LABEL: constrained_vector_trunc_v3f32:
5437 ; AVX: # %bb.0: # %entry
5438 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
5439 ; AVX-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0
5440 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
5441 ; AVX-NEXT: vroundss $11, %xmm1, %xmm1, %xmm1
5442 ; AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
5443 ; AVX-NEXT: vroundss $11, %xmm2, %xmm2, %xmm2
5444 ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
5445 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
5446 ; AVX-NEXT: retq
5447 entry:
5448 %trunc = call <3 x float> @llvm.experimental.constrained.trunc.v3f32(
5449 <3 x float> <float 1.5, float 2.5, float 3.5>,
5450 metadata !"round.dynamic",
5451 metadata !"fpexcept.strict")
5452 ret <3 x float> %trunc
5453 }
5455 define <3 x double> @constrained_vector_trunc_v3f64() {
5456 ; CHECK-LABEL: constrained_vector_trunc_v3f64:
5457 ; CHECK: # %bb.0: # %entry
5458 ; CHECK-NEXT: subq $24, %rsp
5459 ; CHECK-NEXT: .cfi_def_cfa_offset 32
5460 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5461 ; CHECK-NEXT: callq trunc
5462 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
5463 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5464 ; CHECK-NEXT: callq trunc
5465 ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
5466 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
5467 ; CHECK-NEXT: callq trunc
5468 ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
5469 ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
5470 ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
5471 ; CHECK-NEXT: # xmm0 = mem[0],zero
5472 ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
5473 ; CHECK-NEXT: # xmm1 = mem[0],zero
5474 ; CHECK-NEXT: addq $24, %rsp
5475 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5476 ; CHECK-NEXT: retq
5477 ;
5478 ; AVX-LABEL: constrained_vector_trunc_v3f64:
5479 ; AVX: # %bb.0: # %entry
5480 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
5481 ; AVX-NEXT: vroundsd $11, %xmm0, %xmm0, %xmm0
5482 ; AVX-NEXT: vroundpd $11, {{.*}}(%rip), %xmm1
5483 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
5484 ; AVX-NEXT: retq
5485 entry:
5486 %trunc = call <3 x double> @llvm.experimental.constrained.trunc.v3f64(
5487 <3 x double> <double 1.1, double 1.9, double 1.5>,
5488 metadata !"round.dynamic",
5489 metadata !"fpexcept.strict")
5490 ret <3 x double> %trunc
5491 }
5494 ; Single width declarations
5495 declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata)
5496 declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata)
5497 declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata)
5498 declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata)
5499 declare <2 x double> @llvm.experimental.constrained.frem.v2f64(<2 x double>, <2 x double>, metadata, metadata)
5500 declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata)
5501 declare <2 x double> @llvm.experimental.constrained.pow.v2f64(<2 x double>, <2 x double>, metadata, metadata)
5502 declare <2 x double> @llvm.experimental.constrained.powi.v2f64(<2 x double>, i32, metadata, metadata)
5503 declare <2 x double> @llvm.experimental.constrained.sin.v2f64(<2 x double>, metadata, metadata)
5504 declare <2 x double> @llvm.experimental.constrained.cos.v2f64(<2 x double>, metadata, metadata)
5505 declare <2 x double> @llvm.experimental.constrained.exp.v2f64(<2 x double>, metadata, metadata)
5506 declare <2 x double> @llvm.experimental.constrained.exp2.v2f64(<2 x double>, metadata, metadata)
5507 declare <2 x double> @llvm.experimental.constrained.log.v2f64(<2 x double>, metadata, metadata)
5508 declare <2 x double> @llvm.experimental.constrained.log10.v2f64(<2 x double>, metadata, metadata)
5509 declare <2 x double> @llvm.experimental.constrained.log2.v2f64(<2 x double>, metadata, metadata)
5510 declare <2 x double> @llvm.experimental.constrained.rint.v2f64(<2 x double>, metadata, metadata)
5511 declare <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(<2 x double>, metadata, metadata)
5512 declare <2 x double> @llvm.experimental.constrained.maxnum.v2f64(<2 x double>, <2 x double>, metadata, metadata)
5513 declare <2 x double> @llvm.experimental.constrained.minnum.v2f64(<2 x double>, <2 x double>, metadata, metadata)
5514 declare <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f32(<2 x float>, metadata)
5515 declare <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f32(<2 x float>, metadata)
5516 declare <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f64(<2 x double>, metadata)
5517 declare <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f64(<2 x double>, metadata)
5518 declare <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f32(<2 x float>, metadata)
5519 declare <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f32(<2 x float>, metadata)
5520 declare <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f64(<2 x double>, metadata)
5521 declare <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64(<2 x double>, metadata)
5522 declare <2 x float> @llvm.experimental.constrained.fptrunc.v2f32.v2f64(<2 x double>, metadata, metadata)
5523 declare <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(<2 x float>, metadata)
5524 declare <2 x double> @llvm.experimental.constrained.ceil.v2f64(<2 x double>, metadata, metadata)
5525 declare <2 x double> @llvm.experimental.constrained.floor.v2f64(<2 x double>, metadata, metadata)
5526 declare <2 x double> @llvm.experimental.constrained.round.v2f64(<2 x double>, metadata, metadata)
5527 declare <2 x double> @llvm.experimental.constrained.trunc.v2f64(<2 x double>, metadata, metadata)
5529 ; Scalar width declarations
5530 declare <1 x float> @llvm.experimental.constrained.fadd.v1f32(<1 x float>, <1 x float>, metadata, metadata)
5531 declare <1 x float> @llvm.experimental.constrained.fsub.v1f32(<1 x float>, <1 x float>, metadata, metadata)
5532 declare <1 x float> @llvm.experimental.constrained.fmul.v1f32(<1 x float>, <1 x float>, metadata, metadata)
5533 declare <1 x float> @llvm.experimental.constrained.fdiv.v1f32(<1 x float>, <1 x float>, metadata, metadata)
5534 declare <1 x float> @llvm.experimental.constrained.frem.v1f32(<1 x float>, <1 x float>, metadata, metadata)
5535 declare <1 x float> @llvm.experimental.constrained.sqrt.v1f32(<1 x float>, metadata, metadata)
5536 declare <1 x float> @llvm.experimental.constrained.pow.v1f32(<1 x float>, <1 x float>, metadata, metadata)
5537 declare <1 x float> @llvm.experimental.constrained.powi.v1f32(<1 x float>, i32, metadata, metadata)
5538 declare <1 x float> @llvm.experimental.constrained.sin.v1f32(<1 x float>, metadata, metadata)
5539 declare <1 x float> @llvm.experimental.constrained.cos.v1f32(<1 x float>, metadata, metadata)
5540 declare <1 x float> @llvm.experimental.constrained.exp.v1f32(<1 x float>, metadata, metadata)
5541 declare <1 x float> @llvm.experimental.constrained.exp2.v1f32(<1 x float>, metadata, metadata)
5542 declare <1 x float> @llvm.experimental.constrained.log.v1f32(<1 x float>, metadata, metadata)
5543 declare <1 x float> @llvm.experimental.constrained.log10.v1f32(<1 x float>, metadata, metadata)
5544 declare <1 x float> @llvm.experimental.constrained.log2.v1f32(<1 x float>, metadata, metadata)
5545 declare <1 x float> @llvm.experimental.constrained.rint.v1f32(<1 x float>, metadata, metadata)
5546 declare <1 x float> @llvm.experimental.constrained.nearbyint.v1f32(<1 x float>, metadata, metadata)
5547 declare <1 x float> @llvm.experimental.constrained.maxnum.v1f32(<1 x float>, <1 x float>, metadata, metadata)
5548 declare <1 x float> @llvm.experimental.constrained.minnum.v1f32(<1 x float>, <1 x float>, metadata, metadata)
5549 declare <1 x i32> @llvm.experimental.constrained.fptosi.v1i32.v1f32(<1 x float>, metadata)
5550 declare <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f32(<1 x float>, metadata)
5551 declare <1 x i32> @llvm.experimental.constrained.fptosi.v1i32.v1f64(<1 x double>, metadata)
5552 declare <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f64(<1 x double>, metadata)
5553 declare <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f32(<1 x float>, metadata)
5554 declare <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f32(<1 x float>, metadata)
5555 declare <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f64(<1 x double>, metadata)
5556 declare <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f64(<1 x double>, metadata)
5557 declare <1 x float> @llvm.experimental.constrained.fptrunc.v1f32.v1f64(<1 x double>, metadata, metadata)
5558 declare <1 x double> @llvm.experimental.constrained.fpext.v1f64.v1f32(<1 x float>, metadata)
5559 declare <1 x float> @llvm.experimental.constrained.ceil.v1f32(<1 x float>, metadata, metadata)
5560 declare <1 x float> @llvm.experimental.constrained.floor.v1f32(<1 x float>, metadata, metadata)
5561 declare <1 x float> @llvm.experimental.constrained.round.v1f32(<1 x float>, metadata, metadata)
5562 declare <1 x float> @llvm.experimental.constrained.trunc.v1f32(<1 x float>, metadata, metadata)
5564 ; Illegal width declarations
5565 declare <3 x float> @llvm.experimental.constrained.fadd.v3f32(<3 x float>, <3 x float>, metadata, metadata)
5566 declare <3 x double> @llvm.experimental.constrained.fadd.v3f64(<3 x double>, <3 x double>, metadata, metadata)
5567 declare <3 x float> @llvm.experimental.constrained.fsub.v3f32(<3 x float>, <3 x float>, metadata, metadata)
5568 declare <3 x double> @llvm.experimental.constrained.fsub.v3f64(<3 x double>, <3 x double>, metadata, metadata)
5569 declare <3 x float> @llvm.experimental.constrained.fmul.v3f32(<3 x float>, <3 x float>, metadata, metadata)
5570 declare <3 x double> @llvm.experimental.constrained.fmul.v3f64(<3 x double>, <3 x double>, metadata, metadata)
5571 declare <3 x float> @llvm.experimental.constrained.fdiv.v3f32(<3 x float>, <3 x float>, metadata, metadata)
5572 declare <3 x double> @llvm.experimental.constrained.fdiv.v3f64(<3 x double>, <3 x double>, metadata, metadata)
5573 declare <3 x float> @llvm.experimental.constrained.frem.v3f32(<3 x float>, <3 x float>, metadata, metadata)
5574 declare <3 x double> @llvm.experimental.constrained.frem.v3f64(<3 x double>, <3 x double>, metadata, metadata)
5575 declare <3 x float> @llvm.experimental.constrained.sqrt.v3f32(<3 x float>, metadata, metadata)
5576 declare <3 x double> @llvm.experimental.constrained.sqrt.v3f64(<3 x double>, metadata, metadata)
5577 declare <3 x float> @llvm.experimental.constrained.pow.v3f32(<3 x float>, <3 x float>, metadata, metadata)
5578 declare <3 x double> @llvm.experimental.constrained.pow.v3f64(<3 x double>, <3 x double>, metadata, metadata)
5579 declare <3 x float> @llvm.experimental.constrained.powi.v3f32(<3 x float>, i32, metadata, metadata)
5580 declare <3 x double> @llvm.experimental.constrained.powi.v3f64(<3 x double>, i32, metadata, metadata)
5581 declare <3 x float> @llvm.experimental.constrained.sin.v3f32(<3 x float>, metadata, metadata)
5582 declare <3 x double> @llvm.experimental.constrained.sin.v3f64(<3 x double>, metadata, metadata)
5583 declare <3 x float> @llvm.experimental.constrained.cos.v3f32(<3 x float>, metadata, metadata)
5584 declare <3 x double> @llvm.experimental.constrained.cos.v3f64(<3 x double>, metadata, metadata)
5585 declare <3 x float> @llvm.experimental.constrained.exp.v3f32(<3 x float>, metadata, metadata)
5586 declare <3 x double> @llvm.experimental.constrained.exp.v3f64(<3 x double>, metadata, metadata)
5587 declare <3 x float> @llvm.experimental.constrained.exp2.v3f32(<3 x float>, metadata, metadata)
5588 declare <3 x double> @llvm.experimental.constrained.exp2.v3f64(<3 x double>, metadata, metadata)
5589 declare <3 x float> @llvm.experimental.constrained.log.v3f32(<3 x float>, metadata, metadata)
5590 declare <3 x double> @llvm.experimental.constrained.log.v3f64(<3 x double>, metadata, metadata)
5591 declare <3 x float> @llvm.experimental.constrained.log10.v3f32(<3 x float>, metadata, metadata)
5592 declare <3 x double> @llvm.experimental.constrained.log10.v3f64(<3 x double>, metadata, metadata)
5593 declare <3 x float> @llvm.experimental.constrained.log2.v3f32(<3 x float>, metadata, metadata)
5594 declare <3 x double> @llvm.experimental.constrained.log2.v3f64(<3 x double>, metadata, metadata)
5595 declare <3 x float> @llvm.experimental.constrained.rint.v3f32(<3 x float>, metadata, metadata)
5596 declare <3 x double> @llvm.experimental.constrained.rint.v3f64(<3 x double>, metadata, metadata)
5597 declare <3 x float> @llvm.experimental.constrained.nearbyint.v3f32(<3 x float>, metadata, metadata)
5598 declare <3 x double> @llvm.experimental.constrained.nearbyint.v3f64(<3 x double>, metadata, metadata)
5599 declare <3 x float> @llvm.experimental.constrained.maxnum.v3f32(<3 x float>, <3 x float>, metadata, metadata)
5600 declare <3 x double> @llvm.experimental.constrained.maxnum.v3f64(<3 x double>, <3 x double>, metadata, metadata)
5601 declare <3 x float> @llvm.experimental.constrained.minnum.v3f32(<3 x float>, <3 x float>, metadata, metadata)
5602 declare <3 x double> @llvm.experimental.constrained.minnum.v3f64(<3 x double>, <3 x double>, metadata, metadata)
5603 declare <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f32(<3 x float>, metadata)
5604 declare <3 x i64> @llvm.experimental.constrained.fptosi.v3i64.v3f32(<3 x float>, metadata)
5605 declare <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f64(<3 x double>, metadata)
5606 declare <3 x i64> @llvm.experimental.constrained.fptosi.v3i64.v3f64(<3 x double>, metadata)
5607 declare <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f32(<3 x float>, metadata)
5608 declare <3 x i64> @llvm.experimental.constrained.fptoui.v3i64.v3f32(<3 x float>, metadata)
5609 declare <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f64(<3 x double>, metadata)
5610 declare <3 x i64> @llvm.experimental.constrained.fptoui.v3i64.v3f64(<3 x double>, metadata)
5611 declare <3 x float> @llvm.experimental.constrained.fptrunc.v3f32.v3f64(<3 x double>, metadata, metadata)
5612 declare <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32(<3 x float>, metadata)
5613 declare <3 x float> @llvm.experimental.constrained.ceil.v3f32(<3 x float>, metadata, metadata)
5614 declare <3 x double> @llvm.experimental.constrained.ceil.v3f64(<3 x double>, metadata, metadata)
5615 declare <3 x float> @llvm.experimental.constrained.floor.v3f32(<3 x float>, metadata, metadata)
5616 declare <3 x double> @llvm.experimental.constrained.floor.v3f64(<3 x double>, metadata, metadata)
5617 declare <3 x float> @llvm.experimental.constrained.round.v3f32(<3 x float>, metadata, metadata)
5618 declare <3 x double> @llvm.experimental.constrained.round.v3f64(<3 x double>, metadata, metadata)
5619 declare <3 x float> @llvm.experimental.constrained.trunc.v3f32(<3 x float>, metadata, metadata)
5620 declare <3 x double> @llvm.experimental.constrained.trunc.v3f64(<3 x double>, metadata, metadata)
5622 ; Double width declarations
5623 declare <4 x double> @llvm.experimental.constrained.fadd.v4f64(<4 x double>, <4 x double>, metadata, metadata)
5624 declare <4 x double> @llvm.experimental.constrained.fsub.v4f64(<4 x double>, <4 x double>, metadata, metadata)
5625 declare <4 x double> @llvm.experimental.constrained.fmul.v4f64(<4 x double>, <4 x double>, metadata, metadata)
5626 declare <4 x double> @llvm.experimental.constrained.fdiv.v4f64(<4 x double>, <4 x double>, metadata, metadata)
5627 declare <4 x double> @llvm.experimental.constrained.frem.v4f64(<4 x double>, <4 x double>, metadata, metadata)
5628 declare <4 x double> @llvm.experimental.constrained.sqrt.v4f64(<4 x double>, metadata, metadata)
5629 declare <4 x double> @llvm.experimental.constrained.pow.v4f64(<4 x double>, <4 x double>, metadata, metadata)
5630 declare <4 x double> @llvm.experimental.constrained.powi.v4f64(<4 x double>, i32, metadata, metadata)
5631 declare <4 x double> @llvm.experimental.constrained.sin.v4f64(<4 x double>, metadata, metadata)
5632 declare <4 x double> @llvm.experimental.constrained.cos.v4f64(<4 x double>, metadata, metadata)
5633 declare <4 x double> @llvm.experimental.constrained.exp.v4f64(<4 x double>, metadata, metadata)
5634 declare <4 x double> @llvm.experimental.constrained.exp2.v4f64(<4 x double>, metadata, metadata)
5635 declare <4 x double> @llvm.experimental.constrained.log.v4f64(<4 x double>, metadata, metadata)
5636 declare <4 x double> @llvm.experimental.constrained.log10.v4f64(<4 x double>, metadata, metadata)
5637 declare <4 x double> @llvm.experimental.constrained.log2.v4f64(<4 x double>, metadata, metadata)
5638 declare <4 x double> @llvm.experimental.constrained.rint.v4f64(<4 x double>, metadata, metadata)
5639 declare <4 x double> @llvm.experimental.constrained.nearbyint.v4f64(<4 x double>, metadata, metadata)
5640 declare <4 x double> @llvm.experimental.constrained.maxnum.v4f64(<4 x double>, <4 x double>, metadata, metadata)
5641 declare <4 x double> @llvm.experimental.constrained.minnum.v4f64(<4 x double>, <4 x double>, metadata, metadata)
5642 declare <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f32(<4 x float>, metadata)
5643 declare <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f32(<4 x float>, metadata)
5644 declare <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f64(<4 x double>, metadata)
5645 declare <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f64(<4 x double>, metadata)
5646 declare <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f32(<4 x float>, metadata)
5647 declare <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f32(<4 x float>, metadata)
5648 declare <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f64(<4 x double>, metadata)
5649 declare <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f64(<4 x double>, metadata)
5650 declare <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64(<4 x double>, metadata, metadata)
5651 declare <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32(<4 x float>, metadata)
5652 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata, metadata)
5653 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata, metadata)
5654 declare <4 x double> @llvm.experimental.constrained.round.v4f64(<4 x double>, metadata, metadata)
5655 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata, metadata)