1 ; Test basic address sanitizer instrumentation.
3 ; RUN: opt < %s -asan -asan-module -S | FileCheck --check-prefixes=CHECK,CHECK-S3 %s
4 ; RUN: opt < %s -asan -asan-module -asan-mapping-scale=5 -S | FileCheck --check-prefixes=CHECK,CHECK-S5 %s
6 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
7 target triple = "x86_64-unknown-linux-gnu"
8 ; CHECK: @llvm.global_ctors = {{.*}}@asan.module_ctor
10 define i32 @test_load(i32* %a) sanitize_address {
11 ; CHECK-LABEL: @test_load
13 ; CHECK: %[[LOAD_ADDR:[^ ]*]] = ptrtoint i32* %a to i64
14 ; CHECK-S3: lshr i64 %[[LOAD_ADDR]], 3
15 ; CHECK-S5: lshr i64 %[[LOAD_ADDR]], 5
17 ; CHECK: %[[LOAD_SHADOW_PTR:[^ ]*]] = inttoptr
18 ; CHECK: %[[LOAD_SHADOW:[^ ]*]] = load i8, i8* %[[LOAD_SHADOW_PTR]]
20 ; CHECK: br i1 %{{.*}}, label %{{.*}}, label %{{.*}}!prof ![[PROF:[0-9]+]]
22 ; First instrumentation block refines the shadow test.
23 ; CHECK-S3: and i64 %[[LOAD_ADDR]], 7
24 ; CHECK-S5: and i64 %[[LOAD_ADDR]], 31
25 ; CHECK: add i64 %{{.*}}, 3
26 ; CHECK: trunc i64 %{{.*}} to i8
27 ; CHECK: icmp sge i8 %{{.*}}, %[[LOAD_SHADOW]]
28 ; CHECK: br i1 %{{.*}}, label %{{.*}}, label %{{.*}}
30 ; The crash block reports the error.
31 ; CHECK: call void @__asan_report_load4(i64 %[[LOAD_ADDR]])
35 ; CHECK: %tmp1 = load i32, i32* %a
36 ; CHECK: ret i32 %tmp1
41 %tmp1 = load i32, i32* %a, align 4
45 define void @test_store(i32* %a) sanitize_address {
46 ; CHECK-LABEL: @test_store
48 ; CHECK: %[[STORE_ADDR:[^ ]*]] = ptrtoint i32* %a to i64
49 ; CHECK-S3: lshr i64 %[[STORE_ADDR]], 3
50 ; CHECK-S5: lshr i64 %[[STORE_ADDR]], 5
52 ; CHECK: %[[STORE_SHADOW_PTR:[^ ]*]] = inttoptr
53 ; CHECK: %[[STORE_SHADOW:[^ ]*]] = load i8, i8* %[[STORE_SHADOW_PTR]]
55 ; CHECK: br i1 %{{.*}}, label %{{.*}}, label %{{.*}}
57 ; First instrumentation block refines the shadow test.
58 ; CHECK-S3: and i64 %[[STORE_ADDR]], 7
59 ; CHECK-S5: and i64 %[[STORE_ADDR]], 31
60 ; CHECK: add i64 %{{.*}}, 3
61 ; CHECK: trunc i64 %{{.*}} to i8
62 ; CHECK: icmp sge i8 %{{.*}}, %[[STORE_SHADOW]]
63 ; CHECK: br i1 %{{.*}}, label %{{.*}}, label %{{.*}}
65 ; The crash block reports the error.
66 ; CHECK: call void @__asan_report_store4(i64 %[[STORE_ADDR]])
70 ; CHECK: store i32 42, i32* %a
75 store i32 42, i32* %a, align 4
79 ; Check that asan leaves just one alloca.
81 declare void @alloca_test_use([10 x i8]*)
82 define void @alloca_test() sanitize_address {
84 %x = alloca [10 x i8], align 1
85 %y = alloca [10 x i8], align 1
86 %z = alloca [10 x i8], align 1
87 call void @alloca_test_use([10 x i8]* %x)
88 call void @alloca_test_use([10 x i8]* %y)
89 call void @alloca_test_use([10 x i8]* %z)
93 ; CHECK-LABEL: define void @alloca_test()
94 ; CHECK: %asan_local_stack_base = alloca
99 define void @LongDoubleTest(x86_fp80* nocapture %a) nounwind uwtable sanitize_address {
101 store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %a, align 16
105 ; CHECK-LABEL: LongDoubleTest
106 ; CHECK: __asan_report_store_n
107 ; CHECK: __asan_report_store_n
111 define void @i40test(i40* %a, i40* %b) nounwind uwtable sanitize_address {
113 %t = load i40, i40* %a
114 store i40 %t, i40* %b, align 8
118 ; CHECK-LABEL: i40test
119 ; CHECK: __asan_report_load_n{{.*}}, i64 5)
120 ; CHECK: __asan_report_load_n{{.*}}, i64 5)
121 ; CHECK: __asan_report_store_n{{.*}}, i64 5)
122 ; CHECK: __asan_report_store_n{{.*}}, i64 5)
125 define void @i64test_align1(i64* %b) nounwind uwtable sanitize_address {
127 store i64 0, i64* %b, align 1
131 ; CHECK-LABEL: i64test_align1
132 ; CHECK: __asan_report_store_n{{.*}}, i64 8)
133 ; CHECK: __asan_report_store_n{{.*}}, i64 8)
137 define void @i80test(i80* %a, i80* %b) nounwind uwtable sanitize_address {
139 %t = load i80, i80* %a
140 store i80 %t, i80* %b, align 8
144 ; CHECK-LABEL: i80test
145 ; CHECK: __asan_report_load_n{{.*}}, i64 10)
146 ; CHECK: __asan_report_load_n{{.*}}, i64 10)
147 ; CHECK: __asan_report_store_n{{.*}}, i64 10)
148 ; CHECK: __asan_report_store_n{{.*}}, i64 10)
151 ; asan should not instrument functions with available_externally linkage.
152 define available_externally i32 @f_available_externally(i32* %a) sanitize_address {
154 %tmp1 = load i32, i32* %a
157 ; CHECK-LABEL: @f_available_externally
158 ; CHECK-NOT: __asan_report
161 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
162 declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) nounwind
163 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) nounwind
165 define void @memintr_test(i8* %a, i8* %b) nounwind uwtable sanitize_address {
167 tail call void @llvm.memset.p0i8.i64(i8* %a, i8 0, i64 100, i1 false)
168 tail call void @llvm.memmove.p0i8.p0i8.i64(i8* %a, i8* %b, i64 100, i1 false)
169 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %b, i64 100, i1 false)
173 ; CHECK-LABEL: memintr_test
174 ; CHECK: __asan_memset
175 ; CHECK: __asan_memmove
176 ; CHECK: __asan_memcpy
179 declare void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* nocapture writeonly, i8, i64, i32) nounwind
180 declare void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32) nounwind
181 declare void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32) nounwind
183 define void @memintr_element_atomic_test(i8* %a, i8* %b) nounwind uwtable sanitize_address {
184 ; This is a canary test to make sure that these don't get lowered into calls that don't
185 ; have the element-atomic property. Eventually, asan will have to be enhanced to lower
187 ; CHECK-LABEL: memintr_element_atomic_test
188 ; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 1 %a, i8 0, i64 100, i32 1)
189 ; CHECK-NEXT: tail call void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %a, i8* align 1 %b, i64 100, i32 1)
190 ; CHECK-NEXT: tail call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %a, i8* align 1 %b, i64 100, i32 1)
191 ; CHECK-NEXT: ret void
192 tail call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 1 %a, i8 0, i64 100, i32 1)
193 tail call void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %a, i8* align 1 %b, i64 100, i32 1)
194 tail call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %a, i8* align 1 %b, i64 100, i32 1)
199 ; CHECK-LABEL: @test_swifterror
200 ; CHECK-NOT: __asan_report_load
202 define void @test_swifterror(i8** swifterror) sanitize_address {
203 %swifterror_ptr_value = load i8*, i8** %0
207 ; CHECK-LABEL: @test_swifterror_2
208 ; CHECK-NOT: __asan_report_store
210 define void @test_swifterror_2(i8** swifterror) sanitize_address {
211 store i8* null, i8** %0
215 ; CHECK-LABEL: @test_swifterror_3
216 ; CHECK-NOT: __asan_report_store
218 define void @test_swifterror_3() sanitize_address {
219 %swifterror_addr = alloca swifterror i8*
220 store i8* null, i8** %swifterror_addr
221 call void @test_swifterror_2(i8** swifterror %swifterror_addr)
225 ; CHECK: define internal void @asan.module_ctor()
226 ; CHECK: call void @__asan_init()
229 ; CHECK: ![[PROF]] = !{!"branch_weights", i32 1, i32 100000}