[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE / ctermeq-diagnostics.s
blob74afc10cb572106f6f8f77e5e83460850e4cc1b9
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
4 // ------------------------------------------------------------------------- //
5 // Invalid scalar registers
7 ctermeq w30, wsp
8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
9 // CHECK-NEXT: ctermeq w30, wsp
10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
12 ctermeq w30, x0
13 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
14 // CHECK-NEXT: ctermeq w30, x0
15 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
17 ctermeq wsp, w30
18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
19 // CHECK-NEXT: ctermeq wsp, w30
20 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
22 ctermeq x0, w30
23 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
24 // CHECK-NEXT: ctermeq x0, w30
25 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: