[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE / ctermne-diagnostics.s
blob96346f44449f209c1643e1bcafe6790ab02774c3
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
4 // ------------------------------------------------------------------------- //
5 // Invalid scalar registers
7 ctermne w30, wsp
8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
9 // CHECK-NEXT: ctermne w30, wsp
10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
12 ctermne w30, x0
13 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
14 // CHECK-NEXT: ctermne w30, x0
15 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
17 ctermne wsp, w30
18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
19 // CHECK-NEXT: ctermne wsp, w30
20 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
22 ctermne x0, w30
23 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
24 // CHECK-NEXT: ctermne x0, w30
25 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: