test/MC/AArch64/SVE/fmla.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   4 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   6 // RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
   7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   8 // RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
   9
  10 fmla z0.h, p7/m, z1.h, z31.h
  11 // CHECK-INST: fmla     z0.h, p7/m, z1.h, z31.h
  12 // CHECK-ENCODING: [0x20,0x1c,0x7f,0x65]
  13 // CHECK-ERROR: instruction requires: sve
  14 // CHECK-UNKNOWN: 20 1c 7f 65 <unknown>
  15
  16 fmla z0.s, p7/m, z1.s, z31.s
  17 // CHECK-INST: fmla     z0.s, p7/m, z1.s, z31.s
  18 // CHECK-ENCODING: [0x20,0x1c,0xbf,0x65]
  19 // CHECK-ERROR: instruction requires: sve
  20 // CHECK-UNKNOWN: 20 1c bf 65 <unknown>
  21
  22 fmla z0.d, p7/m, z1.d, z31.d
  23 // CHECK-INST: fmla     z0.d, p7/m, z1.d, z31.d
  24 // CHECK-ENCODING: [0x20,0x1c,0xff,0x65]
  25 // CHECK-ERROR: instruction requires: sve
  26 // CHECK-UNKNOWN: 20 1c ff 65 <unknown>
  27
  28 fmla z0.h, z1.h, z7.h[7]
  29 // CHECK-INST: fmla     z0.h, z1.h, z7.h[7]
  30 // CHECK-ENCODING: [0x20,0x00,0x7f,0x64]
  31 // CHECK-ERROR: instruction requires: sve
  32 // CHECK-UNKNOWN: 20 00 7f 64 <unknown>
  33
  34 fmla z0.s, z1.s, z7.s[3]
  35 // CHECK-INST: fmla     z0.s, z1.s, z7.s[3]
  36 // CHECK-ENCODING: [0x20,0x00,0xbf,0x64]
  37 // CHECK-ERROR: instruction requires: sve
  38 // CHECK-UNKNOWN: 20 00 bf 64 <unknown>
  39
  40 fmla z0.d, z1.d, z7.d[1]
  41 // CHECK-INST: fmla     z0.d, z1.d, z7.d[1]
  42 // CHECK-ENCODING: [0x20,0x00,0xf7,0x64]
  43 // CHECK-ERROR: instruction requires: sve
  44 // CHECK-UNKNOWN: 20 00 f7 64 <unknown>
  45
  46
  47 // --------------------------------------------------------------------------//
  48 // Test compatibility with MOVPRFX instruction.
  49
  50 movprfx z0.d, p7/z, z7.d
  51 // CHECK-INST: movprfx  z0.d, p7/z, z7.d
  52 // CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
  53 // CHECK-ERROR: instruction requires: sve
  54 // CHECK-UNKNOWN: e0 3c d0 04 <unknown>
  55
  56 fmla z0.d, p7/m, z1.d, z31.d
  57 // CHECK-INST: fmla     z0.d, p7/m, z1.d, z31.d
  58 // CHECK-ENCODING: [0x20,0x1c,0xff,0x65]
  59 // CHECK-ERROR: instruction requires: sve
  60 // CHECK-UNKNOWN: 20 1c ff 65 <unknown>
  61
  62 movprfx z0, z7
  63 // CHECK-INST: movprfx  z0, z7
  64 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
  65 // CHECK-ERROR: instruction requires: sve
  66 // CHECK-UNKNOWN: e0 bc 20 04 <unknown>
  67
  68 fmla z0.d, p7/m, z1.d, z31.d
  69 // CHECK-INST: fmla     z0.d, p7/m, z1.d, z31.d
  70 // CHECK-ENCODING: [0x20,0x1c,0xff,0x65]
  71 // CHECK-ERROR: instruction requires: sve
  72 // CHECK-UNKNOWN: 20 1c ff 65 <unknown>
  73
  74 movprfx z0, z7
  75 // CHECK-INST: movprfx  z0, z7
  76 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
  77 // CHECK-ERROR: instruction requires: sve
  78 // CHECK-UNKNOWN: e0 bc 20 04 <unknown>
  79
  80 fmla z0.d, z1.d, z7.d[1]
  81 // CHECK-INST: fmla     z0.d, z1.d, z7.d[1]
  82 // CHECK-ENCODING: [0x20,0x00,0xf7,0x64]
  83 // CHECK-ERROR: instruction requires: sve
  84 // CHECK-UNKNOWN: 20 00 f7 64 <unknown>