[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE / frintp-diagnostics.s
blob2766299d4c9b8b2995e1de6f838a6a10d8f9d89f
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
3 frintp z0.b, p0/m, z0.b
4 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
5 // CHECK-NEXT: frintp z0.b, p0/m, z0.b
6 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
8 frintp z0.s, p0/z, z0.s
9 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
10 // CHECK-NEXT: frintp z0.s, p0/z, z0.s
11 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
13 frintp z0.s, p8/m, z0.s
14 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
15 // CHECK-NEXT: frintp z0.s, p8/m, z0.s
16 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: