[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE / ldff1sw.s
blob0ee1b9c01c7ced6a78cb7a1fdb9fc290ede1b230
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10 ldff1sw { z31.d }, p7/z, [sp]
11 // CHECK-INST: ldff1sw { z31.d }, p7/z, [sp]
12 // CHECK-ENCODING: [0xff,0x7f,0x9f,0xa4]
13 // CHECK-ERROR: instruction requires: sve
14 // CHECK-UNKNOWN: ff 7f 9f a4 <unknown>
16 ldff1sw { z31.d }, p7/z, [sp, xzr, lsl #2]
17 // CHECK-INST: ldff1sw { z31.d }, p7/z, [sp]
18 // CHECK-ENCODING: [0xff,0x7f,0x9f,0xa4]
19 // CHECK-ERROR: instruction requires: sve
20 // CHECK-UNKNOWN: ff 7f 9f a4 <unknown>
22 ldff1sw { z0.d }, p0/z, [x0, x0, lsl #2]
23 // CHECK-INST: ldff1sw { z0.d }, p0/z, [x0, x0, lsl #2]
24 // CHECK-ENCODING: [0x00,0x60,0x80,0xa4]
25 // CHECK-ERROR: instruction requires: sve
26 // CHECK-UNKNOWN: 00 60 80 a4 <unknown>
28 ldff1sw { z31.d }, p7/z, [sp, z31.d]
29 // CHECK-INST: ldff1sw { z31.d }, p7/z, [sp, z31.d]
30 // CHECK-ENCODING: [0xff,0xbf,0x5f,0xc5]
31 // CHECK-ERROR: instruction requires: sve
32 // CHECK-UNKNOWN: ff bf 5f c5 <unknown>
34 ldff1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
35 // CHECK-INST: ldff1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
36 // CHECK-ENCODING: [0xb7,0xad,0x68,0xc5]
37 // CHECK-ERROR: instruction requires: sve
38 // CHECK-UNKNOWN: b7 ad 68 c5 <unknown>
40 ldff1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
41 // CHECK-INST: ldff1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
42 // CHECK-ENCODING: [0x55,0x35,0x15,0xc5]
43 // CHECK-ERROR: instruction requires: sve
44 // CHECK-UNKNOWN: 55 35 15 c5 <unknown>
46 ldff1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
47 // CHECK-INST: ldff1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
48 // CHECK-ENCODING: [0x55,0x35,0x55,0xc5]
49 // CHECK-ERROR: instruction requires: sve
50 // CHECK-UNKNOWN: 55 35 55 c5 <unknown>
52 ldff1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
53 // CHECK-INST: ldff1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
54 // CHECK-ENCODING: [0x00,0x20,0x20,0xc5]
55 // CHECK-ERROR: instruction requires: sve
56 // CHECK-UNKNOWN: 00 20 20 c5 <unknown>
58 ldff1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
59 // CHECK-INST: ldff1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
60 // CHECK-ENCODING: [0x00,0x20,0x60,0xc5]
61 // CHECK-ERROR: instruction requires: sve
62 // CHECK-UNKNOWN: 00 20 60 c5 <unknown>
64 ldff1sw { z31.d }, p7/z, [z31.d, #124]
65 // CHECK-INST: ldff1sw { z31.d }, p7/z, [z31.d, #124]
66 // CHECK-ENCODING: [0xff,0xbf,0x3f,0xc5]
67 // CHECK-ERROR: instruction requires: sve
68 // CHECK-UNKNOWN: ff bf 3f c5 <unknown>
70 ldff1sw { z0.d }, p0/z, [z0.d]
71 // CHECK-INST: ldff1sw { z0.d }, p0/z, [z0.d]
72 // CHECK-ENCODING: [0x00,0xa0,0x20,0xc5]
73 // CHECK-ERROR: instruction requires: sve
74 // CHECK-UNKNOWN: 00 a0 20 c5 <unknown>