[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE / sqincb.s
blob8a3d3566b0ab9e8ddd0ab0826c9d1ae22d04367e
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10 // ---------------------------------------------------------------------------//
11 // Test 64-bit form (x0) and its aliases
12 // ---------------------------------------------------------------------------//
14 sqincb x0
15 // CHECK-INST: sqincb x0
16 // CHECK-ENCODING: [0xe0,0xf3,0x30,0x04]
17 // CHECK-ERROR: instruction requires: sve
18 // CHECK-UNKNOWN: e0 f3 30 04 <unknown>
20 sqincb x0, all
21 // CHECK-INST: sqincb x0
22 // CHECK-ENCODING: [0xe0,0xf3,0x30,0x04]
23 // CHECK-ERROR: instruction requires: sve
24 // CHECK-UNKNOWN: e0 f3 30 04 <unknown>
26 sqincb x0, all, mul #1
27 // CHECK-INST: sqincb x0
28 // CHECK-ENCODING: [0xe0,0xf3,0x30,0x04]
29 // CHECK-ERROR: instruction requires: sve
30 // CHECK-UNKNOWN: e0 f3 30 04 <unknown>
32 sqincb x0, all, mul #16
33 // CHECK-INST: sqincb x0, all, mul #16
34 // CHECK-ENCODING: [0xe0,0xf3,0x3f,0x04]
35 // CHECK-ERROR: instruction requires: sve
36 // CHECK-UNKNOWN: e0 f3 3f 04 <unknown>
39 // ---------------------------------------------------------------------------//
40 // Test 32-bit form (x0, w0) and its aliases
41 // ---------------------------------------------------------------------------//
43 sqincb x0, w0
44 // CHECK-INST: sqincb x0, w0
45 // CHECK-ENCODING: [0xe0,0xf3,0x20,0x04]
46 // CHECK-ERROR: instruction requires: sve
47 // CHECK-UNKNOWN: e0 f3 20 04 <unknown>
49 sqincb x0, w0, all
50 // CHECK-INST: sqincb x0, w0
51 // CHECK-ENCODING: [0xe0,0xf3,0x20,0x04]
52 // CHECK-ERROR: instruction requires: sve
53 // CHECK-UNKNOWN: e0 f3 20 04 <unknown>
55 sqincb x0, w0, all, mul #1
56 // CHECK-INST: sqincb x0, w0
57 // CHECK-ENCODING: [0xe0,0xf3,0x20,0x04]
58 // CHECK-ERROR: instruction requires: sve
59 // CHECK-UNKNOWN: e0 f3 20 04 <unknown>
61 sqincb x0, w0, all, mul #16
62 // CHECK-INST: sqincb x0, w0, all, mul #16
63 // CHECK-ENCODING: [0xe0,0xf3,0x2f,0x04]
64 // CHECK-ERROR: instruction requires: sve
65 // CHECK-UNKNOWN: e0 f3 2f 04 <unknown>
67 sqincb x0, w0, pow2
68 // CHECK-INST: sqincb x0, w0, pow2
69 // CHECK-ENCODING: [0x00,0xf0,0x20,0x04]
70 // CHECK-ERROR: instruction requires: sve
71 // CHECK-UNKNOWN: 00 f0 20 04 <unknown>
73 sqincb x0, w0, pow2, mul #16
74 // CHECK-INST: sqincb x0, w0, pow2, mul #16
75 // CHECK-ENCODING: [0x00,0xf0,0x2f,0x04]
76 // CHECK-ERROR: instruction requires: sve
77 // CHECK-UNKNOWN: 00 f0 2f 04 <unknown>
80 // ---------------------------------------------------------------------------//
81 // Test all patterns for 64-bit form
82 // ---------------------------------------------------------------------------//
84 sqincb x0, pow2
85 // CHECK-INST: sqincb x0, pow2
86 // CHECK-ENCODING: [0x00,0xf0,0x30,0x04]
87 // CHECK-ERROR: instruction requires: sve
88 // CHECK-UNKNOWN: 00 f0 30 04 <unknown>
90 sqincb x0, vl1
91 // CHECK-INST: sqincb x0, vl1
92 // CHECK-ENCODING: [0x20,0xf0,0x30,0x04]
93 // CHECK-ERROR: instruction requires: sve
94 // CHECK-UNKNOWN: 20 f0 30 04 <unknown>
96 sqincb x0, vl2
97 // CHECK-INST: sqincb x0, vl2
98 // CHECK-ENCODING: [0x40,0xf0,0x30,0x04]
99 // CHECK-ERROR: instruction requires: sve
100 // CHECK-UNKNOWN: 40 f0 30 04 <unknown>
102 sqincb x0, vl3
103 // CHECK-INST: sqincb x0, vl3
104 // CHECK-ENCODING: [0x60,0xf0,0x30,0x04]
105 // CHECK-ERROR: instruction requires: sve
106 // CHECK-UNKNOWN: 60 f0 30 04 <unknown>
108 sqincb x0, vl4
109 // CHECK-INST: sqincb x0, vl4
110 // CHECK-ENCODING: [0x80,0xf0,0x30,0x04]
111 // CHECK-ERROR: instruction requires: sve
112 // CHECK-UNKNOWN: 80 f0 30 04 <unknown>
114 sqincb x0, vl5
115 // CHECK-INST: sqincb x0, vl5
116 // CHECK-ENCODING: [0xa0,0xf0,0x30,0x04]
117 // CHECK-ERROR: instruction requires: sve
118 // CHECK-UNKNOWN: a0 f0 30 04 <unknown>
120 sqincb x0, vl6
121 // CHECK-INST: sqincb x0, vl6
122 // CHECK-ENCODING: [0xc0,0xf0,0x30,0x04]
123 // CHECK-ERROR: instruction requires: sve
124 // CHECK-UNKNOWN: c0 f0 30 04 <unknown>
126 sqincb x0, vl7
127 // CHECK-INST: sqincb x0, vl7
128 // CHECK-ENCODING: [0xe0,0xf0,0x30,0x04]
129 // CHECK-ERROR: instruction requires: sve
130 // CHECK-UNKNOWN: e0 f0 30 04 <unknown>
132 sqincb x0, vl8
133 // CHECK-INST: sqincb x0, vl8
134 // CHECK-ENCODING: [0x00,0xf1,0x30,0x04]
135 // CHECK-ERROR: instruction requires: sve
136 // CHECK-UNKNOWN: 00 f1 30 04 <unknown>
138 sqincb x0, vl16
139 // CHECK-INST: sqincb x0, vl16
140 // CHECK-ENCODING: [0x20,0xf1,0x30,0x04]
141 // CHECK-ERROR: instruction requires: sve
142 // CHECK-UNKNOWN: 20 f1 30 04 <unknown>
144 sqincb x0, vl32
145 // CHECK-INST: sqincb x0, vl32
146 // CHECK-ENCODING: [0x40,0xf1,0x30,0x04]
147 // CHECK-ERROR: instruction requires: sve
148 // CHECK-UNKNOWN: 40 f1 30 04 <unknown>
150 sqincb x0, vl64
151 // CHECK-INST: sqincb x0, vl64
152 // CHECK-ENCODING: [0x60,0xf1,0x30,0x04]
153 // CHECK-ERROR: instruction requires: sve
154 // CHECK-UNKNOWN: 60 f1 30 04 <unknown>
156 sqincb x0, vl128
157 // CHECK-INST: sqincb x0, vl128
158 // CHECK-ENCODING: [0x80,0xf1,0x30,0x04]
159 // CHECK-ERROR: instruction requires: sve
160 // CHECK-UNKNOWN: 80 f1 30 04 <unknown>
162 sqincb x0, vl256
163 // CHECK-INST: sqincb x0, vl256
164 // CHECK-ENCODING: [0xa0,0xf1,0x30,0x04]
165 // CHECK-ERROR: instruction requires: sve
166 // CHECK-UNKNOWN: a0 f1 30 04 <unknown>
168 sqincb x0, #14
169 // CHECK-INST: sqincb x0, #14
170 // CHECK-ENCODING: [0xc0,0xf1,0x30,0x04]
171 // CHECK-ERROR: instruction requires: sve
172 // CHECK-UNKNOWN: c0 f1 30 04 <unknown>
174 sqincb x0, #15
175 // CHECK-INST: sqincb x0, #15
176 // CHECK-ENCODING: [0xe0,0xf1,0x30,0x04]
177 // CHECK-ERROR: instruction requires: sve
178 // CHECK-UNKNOWN: e0 f1 30 04 <unknown>
180 sqincb x0, #16
181 // CHECK-INST: sqincb x0, #16
182 // CHECK-ENCODING: [0x00,0xf2,0x30,0x04]
183 // CHECK-ERROR: instruction requires: sve
184 // CHECK-UNKNOWN: 00 f2 30 04 <unknown>
186 sqincb x0, #17
187 // CHECK-INST: sqincb x0, #17
188 // CHECK-ENCODING: [0x20,0xf2,0x30,0x04]
189 // CHECK-ERROR: instruction requires: sve
190 // CHECK-UNKNOWN: 20 f2 30 04 <unknown>
192 sqincb x0, #18
193 // CHECK-INST: sqincb x0, #18
194 // CHECK-ENCODING: [0x40,0xf2,0x30,0x04]
195 // CHECK-ERROR: instruction requires: sve
196 // CHECK-UNKNOWN: 40 f2 30 04 <unknown>
198 sqincb x0, #19
199 // CHECK-INST: sqincb x0, #19
200 // CHECK-ENCODING: [0x60,0xf2,0x30,0x04]
201 // CHECK-ERROR: instruction requires: sve
202 // CHECK-UNKNOWN: 60 f2 30 04 <unknown>
204 sqincb x0, #20
205 // CHECK-INST: sqincb x0, #20
206 // CHECK-ENCODING: [0x80,0xf2,0x30,0x04]
207 // CHECK-ERROR: instruction requires: sve
208 // CHECK-UNKNOWN: 80 f2 30 04 <unknown>
210 sqincb x0, #21
211 // CHECK-INST: sqincb x0, #21
212 // CHECK-ENCODING: [0xa0,0xf2,0x30,0x04]
213 // CHECK-ERROR: instruction requires: sve
214 // CHECK-UNKNOWN: a0 f2 30 04 <unknown>
216 sqincb x0, #22
217 // CHECK-INST: sqincb x0, #22
218 // CHECK-ENCODING: [0xc0,0xf2,0x30,0x04]
219 // CHECK-ERROR: instruction requires: sve
220 // CHECK-UNKNOWN: c0 f2 30 04 <unknown>
222 sqincb x0, #23
223 // CHECK-INST: sqincb x0, #23
224 // CHECK-ENCODING: [0xe0,0xf2,0x30,0x04]
225 // CHECK-ERROR: instruction requires: sve
226 // CHECK-UNKNOWN: e0 f2 30 04 <unknown>
228 sqincb x0, #24
229 // CHECK-INST: sqincb x0, #24
230 // CHECK-ENCODING: [0x00,0xf3,0x30,0x04]
231 // CHECK-ERROR: instruction requires: sve
232 // CHECK-UNKNOWN: 00 f3 30 04 <unknown>
234 sqincb x0, #25
235 // CHECK-INST: sqincb x0, #25
236 // CHECK-ENCODING: [0x20,0xf3,0x30,0x04]
237 // CHECK-ERROR: instruction requires: sve
238 // CHECK-UNKNOWN: 20 f3 30 04 <unknown>
240 sqincb x0, #26
241 // CHECK-INST: sqincb x0, #26
242 // CHECK-ENCODING: [0x40,0xf3,0x30,0x04]
243 // CHECK-ERROR: instruction requires: sve
244 // CHECK-UNKNOWN: 40 f3 30 04 <unknown>
246 sqincb x0, #27
247 // CHECK-INST: sqincb x0, #27
248 // CHECK-ENCODING: [0x60,0xf3,0x30,0x04]
249 // CHECK-ERROR: instruction requires: sve
250 // CHECK-UNKNOWN: 60 f3 30 04 <unknown>
252 sqincb x0, #28
253 // CHECK-INST: sqincb x0, #28
254 // CHECK-ENCODING: [0x80,0xf3,0x30,0x04]
255 // CHECK-ERROR: instruction requires: sve
256 // CHECK-UNKNOWN: 80 f3 30 04 <unknown>