[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE / uqadd.s
blob23e213ac85f915a48cc3961109105721acc48b3b
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
11 uqadd z0.b, z0.b, z0.b
12 // CHECK-INST: uqadd z0.b, z0.b, z0.b
13 // CHECK-ENCODING: [0x00,0x14,0x20,0x04]
14 // CHECK-ERROR: instruction requires: sve
15 // CHECK-UNKNOWN: 00 14 20 04 <unknown>
17 uqadd z0.h, z0.h, z0.h
18 // CHECK-INST: uqadd z0.h, z0.h, z0.h
19 // CHECK-ENCODING: [0x00,0x14,0x60,0x04]
20 // CHECK-ERROR: instruction requires: sve
21 // CHECK-UNKNOWN: 00 14 60 04 <unknown>
23 uqadd z0.s, z0.s, z0.s
24 // CHECK-INST: uqadd z0.s, z0.s, z0.s
25 // CHECK-ENCODING: [0x00,0x14,0xa0,0x04]
26 // CHECK-ERROR: instruction requires: sve
27 // CHECK-UNKNOWN: 00 14 a0 04 <unknown>
29 uqadd z0.d, z0.d, z0.d
30 // CHECK-INST: uqadd z0.d, z0.d, z0.d
31 // CHECK-ENCODING: [0x00,0x14,0xe0,0x04]
32 // CHECK-ERROR: instruction requires: sve
33 // CHECK-UNKNOWN: 00 14 e0 04 <unknown>
35 uqadd z0.b, z0.b, #0
36 // CHECK-INST: uqadd z0.b, z0.b, #0
37 // CHECK-ENCODING: [0x00,0xc0,0x25,0x25]
38 // CHECK-ERROR: instruction requires: sve
39 // CHECK-UNKNOWN: 00 c0 25 25 <unknown>
41 uqadd z31.b, z31.b, #255
42 // CHECK-INST: uqadd z31.b, z31.b, #255
43 // CHECK-ENCODING: [0xff,0xdf,0x25,0x25]
44 // CHECK-ERROR: instruction requires: sve
45 // CHECK-UNKNOWN: ff df 25 25 <unknown>
47 uqadd z0.h, z0.h, #0
48 // CHECK-INST: uqadd z0.h, z0.h, #0
49 // CHECK-ENCODING: [0x00,0xc0,0x65,0x25]
50 // CHECK-ERROR: instruction requires: sve
51 // CHECK-UNKNOWN: 00 c0 65 25 <unknown>
53 uqadd z0.h, z0.h, #0, lsl #8
54 // CHECK-INST: uqadd z0.h, z0.h, #0, lsl #8
55 // CHECK-ENCODING: [0x00,0xe0,0x65,0x25]
56 // CHECK-ERROR: instruction requires: sve
57 // CHECK-UNKNOWN: 00 e0 65 25 <unknown>
59 uqadd z31.h, z31.h, #255, lsl #8
60 // CHECK-INST: uqadd z31.h, z31.h, #65280
61 // CHECK-ENCODING: [0xff,0xff,0x65,0x25]
62 // CHECK-ERROR: instruction requires: sve
63 // CHECK-UNKNOWN: ff ff 65 25 <unknown>
65 uqadd z31.h, z31.h, #65280
66 // CHECK-INST: uqadd z31.h, z31.h, #65280
67 // CHECK-ENCODING: [0xff,0xff,0x65,0x25]
68 // CHECK-ERROR: instruction requires: sve
69 // CHECK-UNKNOWN: ff ff 65 25 <unknown>
71 uqadd z0.s, z0.s, #0
72 // CHECK-INST: uqadd z0.s, z0.s, #0
73 // CHECK-ENCODING: [0x00,0xc0,0xa5,0x25]
74 // CHECK-ERROR: instruction requires: sve
75 // CHECK-UNKNOWN: 00 c0 a5 25 <unknown>
77 uqadd z0.s, z0.s, #0, lsl #8
78 // CHECK-INST: uqadd z0.s, z0.s, #0, lsl #8
79 // CHECK-ENCODING: [0x00,0xe0,0xa5,0x25]
80 // CHECK-ERROR: instruction requires: sve
81 // CHECK-UNKNOWN: 00 e0 a5 25 <unknown>
83 uqadd z31.s, z31.s, #255, lsl #8
84 // CHECK-INST: uqadd z31.s, z31.s, #65280
85 // CHECK-ENCODING: [0xff,0xff,0xa5,0x25]
86 // CHECK-ERROR: instruction requires: sve
87 // CHECK-UNKNOWN: ff ff a5 25 <unknown>
89 uqadd z31.s, z31.s, #65280
90 // CHECK-INST: uqadd z31.s, z31.s, #65280
91 // CHECK-ENCODING: [0xff,0xff,0xa5,0x25]
92 // CHECK-ERROR: instruction requires: sve
93 // CHECK-UNKNOWN: ff ff a5 25 <unknown>
95 uqadd z0.d, z0.d, #0
96 // CHECK-INST: uqadd z0.d, z0.d, #0
97 // CHECK-ENCODING: [0x00,0xc0,0xe5,0x25]
98 // CHECK-ERROR: instruction requires: sve
99 // CHECK-UNKNOWN: 00 c0 e5 25 <unknown>
101 uqadd z0.d, z0.d, #0, lsl #8
102 // CHECK-INST: uqadd z0.d, z0.d, #0, lsl #8
103 // CHECK-ENCODING: [0x00,0xe0,0xe5,0x25]
104 // CHECK-ERROR: instruction requires: sve
105 // CHECK-UNKNOWN: 00 e0 e5 25 <unknown>
107 uqadd z31.d, z31.d, #255, lsl #8
108 // CHECK-INST: uqadd z31.d, z31.d, #65280
109 // CHECK-ENCODING: [0xff,0xff,0xe5,0x25]
110 // CHECK-ERROR: instruction requires: sve
111 // CHECK-UNKNOWN: ff ff e5 25 <unknown>
113 uqadd z31.d, z31.d, #65280
114 // CHECK-INST: uqadd z31.d, z31.d, #65280
115 // CHECK-ENCODING: [0xff,0xff,0xe5,0x25]
116 // CHECK-ERROR: instruction requires: sve
117 // CHECK-UNKNOWN: ff ff e5 25 <unknown>
120 // --------------------------------------------------------------------------//
121 // Test compatibility with MOVPRFX instruction.
123 movprfx z31, z6
124 // CHECK-INST: movprfx z31, z6
125 // CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
126 // CHECK-ERROR: instruction requires: sve
127 // CHECK-UNKNOWN: df bc 20 04 <unknown>
129 uqadd z31.d, z31.d, #65280
130 // CHECK-INST: uqadd z31.d, z31.d, #65280
131 // CHECK-ENCODING: [0xff,0xff,0xe5,0x25]
132 // CHECK-ERROR: instruction requires: sve
133 // CHECK-UNKNOWN: ff ff e5 25 <unknown>