[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE2 / addhnt-diagnostics.s
blob0bebf9236bf43a053d158b667ad45a1761528180
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
4 // ------------------------------------------------------------------------- //
5 // Invalid element width
7 addhnt z0.b, z1.b, z2.b
8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
9 // CHECK-NEXT: addhnt z0.b, z1.b, z2.b
10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
12 addhnt z0.h, z1.h, z2.h
13 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
14 // CHECK-NEXT: addhnt z0.h, z1.h, z2.h
15 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
17 addhnt z0.s, z1.s, z2.s
18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
19 // CHECK-NEXT: addhnt z0.s, z1.s, z2.s
20 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
22 addhnt z0.d, z1.d, z2.d
23 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
24 // CHECK-NEXT: addhnt z0.d, z1.d, z2.d
25 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
27 // --------------------------------------------------------------------------//
28 // Negative tests for instructions that are incompatible with movprfx
30 movprfx z0, z7
31 addhnt z0.s, z1.d, z31.d
32 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
33 // CHECK-NEXT: addhnt z0.s, z1.d, z31.d
34 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
36 movprfx z0.s, p0/z, z7.s
37 addhnt z0.s, z1.d, z31.d
38 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
39 // CHECK-NEXT: addhnt z0.s, z1.d, z31.d
40 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: