[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE2 / cdot-diagnostics.s
blob569f27701e3175d1e76ee2712e6c70205dd5f303
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
4 // ------------------------------------------------------------------------- //
5 // Invalid element size
7 cdot z0.s, z1.h, z31.h, #0
8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
9 // CHECK-NEXT: cdot z0.s, z1.h, z31.h, #0
10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
12 cdot z0.s, z1.s, z31.s, #0
13 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
14 // CHECK-NEXT: cdot z0.s, z1.s, z31.s, #0
15 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
17 cdot z0.s, z1.d, z31.d, #0
18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
19 // CHECK-NEXT: cdot z0.s, z1.d, z31.d, #0
20 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
22 cdot z0.d, z1.b, z31.b, #0
23 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
24 // CHECK-NEXT: cdot z0.d, z1.b, z31.b, #0
25 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
27 cdot z0.d, z1.s, z31.s, #0
28 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
29 // CHECK-NEXT: cdot z0.d, z1.s, z31.s, #0
30 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
32 cdot z0.d, z1.d, z31.d, #0
33 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
34 // CHECK-NEXT: cdot z0.d, z1.d, z31.d, #0
35 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
38 // ------------------------------------------------------------------------- //
39 // Invalid restricted register for indexed vector.
41 cdot z0.s, z1.b, z8.b[3], #0
42 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
43 // CHECK-NEXT: cdot z0.s, z1.b, z8.b[3], #0
44 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
46 cdot z0.d, z1.h, z16.h[1], #0
47 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
48 // CHECK-NEXT: cdot z0.d, z1.h, z16.h[1], #0
49 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
52 // ------------------------------------------------------------------------- //
53 // Invalid element index
55 cdot z0.s, z1.b, z7.b[-1], #0
56 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
57 // CHECK-NEXT: cdot z0.s, z1.b, z7.b[-1], #0
58 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
60 cdot z0.s, z1.b, z7.b[4], #0
61 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
62 // CHECK-NEXT: cdot z0.s, z1.b, z7.b[4], #0
63 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
65 cdot z0.d, z1.h, z15.h[-1], #0
66 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
67 // CHECK-NEXT: cdot z0.d, z1.h, z15.h[-1], #0
68 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
70 cdot z0.d, z1.h, z15.h[2], #0
71 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
72 // CHECK-NEXT: cdot z0.d, z1.h, z15.h[2], #0
73 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
76 // --------------------------------------------------------------------------//
77 // Invalid rotation
79 cdot z0.s, z1.b, z2.b[0], #360
80 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: complex rotation must be 0, 90, 180 or 270.
81 // CHECK-NEXT: cdot z0.s, z1.b, z2.b[0], #360
82 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
84 cdot z0.d, z1.h, z2.h[0], #450
85 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: complex rotation must be 0, 90, 180 or 270.
86 // CHECK-NEXT: cdot z0.d, z1.h, z2.h[0], #450
87 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
90 // --------------------------------------------------------------------------//
91 // Negative tests for instructions that are incompatible with movprfx
93 movprfx z0.d, p0/z, z7.d
94 cdot z0.d, z1.h, z31.h, #0
95 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
96 // CHECK-NEXT: cdot z0.d, z1.h, z31.h, #0
97 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
99 movprfx z0.d, p0/z, z7.d
100 cdot z0.d, z1.h, z15.h[1], #0
101 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
102 // CHECK-NEXT: cdot z0.d, z1.h, z15.h[1], #0
103 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: