[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE2 / mla-diagnostics.s
blob668e77c1f522d31c9babe79429e150a7b48ae187
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
4 // ------------------------------------------------------------------------- //
5 // z register out of range for index
7 mla z0.h, z1.h, z8.h[0]
8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.h..z7.h
9 // CHECK-NEXT: mla z0.h, z1.h, z8.h[0]
10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
12 mla z0.s, z1.s, z8.s[0]
13 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.s..z7.s
14 // CHECK-NEXT: mla z0.s, z1.s, z8.s[0]
15 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
17 mla z0.d, z1.d, z16.d[0]
18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.d..z15.d
19 // CHECK-NEXT: mla z0.d, z1.d, z16.d[0]
20 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
23 // ------------------------------------------------------------------------- //
24 // Invalid element index
26 mla z0.h, z1.h, z2.h[-1]
27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
28 // CHECK-NEXT: mla z0.h, z1.h, z2.h[-1]
29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
31 mla z0.h, z1.h, z2.h[8]
32 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
33 // CHECK-NEXT: mla z0.h, z1.h, z2.h[8]
34 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
36 mla z0.s, z1.s, z2.s[-1]
37 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
38 // CHECK-NEXT: mla z0.s, z1.s, z2.s[-1]
39 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
41 mla z0.s, z1.s, z2.s[4]
42 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
43 // CHECK-NEXT: mla z0.s, z1.s, z2.s[4]
44 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
46 mla z0.d, z1.d, z2.d[-1]
47 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
48 // CHECK-NEXT: mla z0.d, z1.d, z2.d[-1]
49 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
51 mla z0.d, z1.d, z2.d[2]
52 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
53 // CHECK-NEXT: mla z0.d, z1.d, z2.d[2]
54 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
57 // --------------------------------------------------------------------------//
58 // Negative tests for instructions that are incompatible with movprfx
60 movprfx z0.d, p0/z, z7.d
61 mla z0.d, z1.d, z7.d[1]
62 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
63 // CHECK-NEXT: mla z0.d, z1.d, z7.d[1]
64 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: