[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE2 / pmullt-diagnostics.s
blobf068bd3bac1a5a6ab2a7140966243db047e16605
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
4 // ------------------------------------------------------------------------- //
5 // Invalid element width
7 pmullt z0.b, z0.b, z0.b
8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
9 // CHECK-NEXT: pmullt z0.b, z0.b, z0.b
10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
12 pmullt z0.h, z0.h, z0.h
13 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
14 // CHECK-NEXT: pmullt z0.h, z0.h, z0.h
15 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
17 pmullt z0.s, z0.s, z0.s
18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
19 // CHECK-NEXT: pmullt z0.s, z0.s, z0.s
20 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
22 pmullt z0.d, z0.d, z0.d
23 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
24 // CHECK-NEXT: pmullt z0.d, z0.d, z0.d
25 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
27 pmullt z0.q, z0.q, z0.q
28 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
29 // CHECK-NEXT: pmullt z0.q, z0.q, z0.q
30 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
32 // --------------------------------------------------------------------------//
33 // Negative tests for instructions that are incompatible with movprfx
35 movprfx z31.d, p0/z, z6.d
36 pmullt z0.d, z1.s, z2.s
37 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
38 // CHECK-NEXT: pmullt z0.d, z1.s, z2.s
39 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
41 movprfx z31, z6
42 pmullt z0.d, z1.s, z2.s
43 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
44 // CHECK-NEXT: pmullt z0.d, z1.s, z2.s
45 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: