[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE2 / sm4e-diagnostics.s
blob521fba458e8db5a6c499961a601234255707cced
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-sm4 2>&1 < %s| FileCheck %s
4 // --------------------------------------------------------------------------//
5 // Source and Destination Registers must match
7 sm4e z0.s, z1.s, z2.s
8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
9 // CHECK-NEXT: sm4e z0.s, z1.s, z2.s
10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
13 // --------------------------------------------------------------------------//
14 // Invalid element width
16 sm4e z0.b, z0.b, z0.b
17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
18 // CHECK-NEXT: sm4e z0.b, z0.b, z0.b
19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
21 sm4e z0.h, z0.h, z0.h
22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
23 // CHECK-NEXT: sm4e z0.h, z0.h, z0.h
24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
26 sm4e z0.d, z0.d, z0.d
27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
28 // CHECK-NEXT: sm4e z0.d, z0.d, z0.d
29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
32 // --------------------------------------------------------------------------//
33 // Negative tests for instructions that are incompatible with movprfx
35 movprfx z0.s, p0/z, z7.s
36 sm4e z0.s, z0.s, z1.s
37 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
38 // CHECK-NEXT: sm4e z0.s, z0.s, z1.s
39 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
41 movprfx z0, z7
42 sm4e z0.s, z0.s, z1.s
43 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
44 // CHECK-NEXT: sm4e z0.s, z0.s, z1.s
45 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: