test/MC/AArch64/SVE2/uadalp-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
   2
   3
   4 // --------------------------------------------------------------------------//
   5 // Element sizes must match
   6
   7 uadalp z0.b, p0/m, z1.b
   8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
   9 // CHECK-NEXT: uadalp z0.b, p0/m, z1.b
  10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  11
  12 uadalp z0.h, p0/m, z1.h
  13 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  14 // CHECK-NEXT: uadalp z0.h, p0/m, z1.h
  15 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  16
  17 uadalp z0.s, p0/m, z1.s
  18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  19 // CHECK-NEXT: uadalp z0.s, p0/m, z1.s
  20 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  21
  22 uadalp z0.d, p0/m, z1.d
  23 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  24 // CHECK-NEXT: uadalp z0.d, p0/m, z1.d
  25 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  26
  27 // --------------------------------------------------------------------------//
  28 // Predicate not in restricted predicate range
  29
  30 uadalp z0.h, p8/m, z1.b
  31 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  32 // CHECK-NEXT: uadalp z0.h, p8/m, z1.b
  33 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  34
  35 // --------------------------------------------------------------------------//
  36 // Negative movprfx tests
  37
  38 movprfx z31.s, p0/z, z6.s // element type of the source operand, rather than destination.
  39 uadalp z31.d, p0/m, z30.s
  40 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx with a different element size
  41 // CHECK-NEXT: uadalp z31.d, p0/m, z30.s
  42 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: