test/MC/AArch64/armv8.1a-atomic.s

   1 // RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a -show-encoding < %s 2> %t | FileCheck %s
   2 // RUN: FileCheck --check-prefix=CHECK-ERROR <%t %s
   3   .text
   4
   5   //8 bits
   6   casb   w0, w1, [x2]
   7   casab  w0, w1, [x2]
   8   caslb  w0, w1, [x2]
   9   casalb   w0, w1, [x2]
  10
  11 //CHECK:  casb   w0, w1, [x2]        //      encoding: [0x41,0x7c,0xa0,0x08]
  12 //CHECK:  casab  w0, w1, [x2]        //      encoding: [0x41,0x7c,0xe0,0x08]
  13 //CHECK:  caslb   w0, w1, [x2]       //      encoding: [0x41,0xfc,0xa0,0x08]
  14 //CHECK:  casalb   w0, w1, [x2]      //      encoding: [0x41,0xfc,0xe0,0x08]
  15
  16   casb w0, w1, [w2]
  17   casalb x0, x1, [x2]
  18 //CHECK-ERROR: error: invalid operand for instruction
  19 //CHECK-ERROR:   casb w0, w1, [w2]
  20 //CHECK-ERROR:                 ^
  21 //CHECK-ERROR: error: invalid operand for instruction
  22 //CHECK-ERROR:   casalb x0, x1, [x2]
  23 //CHECK-ERROR:          ^
  24
  25   //16 bits
  26   cash   w0, w1, [x2]
  27   casah  w0, w1, [x2]
  28   caslh  w0, w1, [x2]
  29   casalh   w0, w1, [x2]
  30
  31 //CHECK:  cash   w0, w1, [x2]        //      encoding: [0x41,0x7c,0xa0,0x48]
  32 //CHECK:  casah  w0, w1, [x2]        //      encoding: [0x41,0x7c,0xe0,0x48]
  33 //CHECK:  caslh   w0, w1, [x2]       //      encoding: [0x41,0xfc,0xa0,0x48]
  34 //CHECK:  casalh   w0, w1, [x2]      //      encoding: [0x41,0xfc,0xe0,0x48]
  35
  36   //32 bits
  37   cas   w0, w1, [x2]
  38   casa  w0, w1, [x2]
  39   casl  w0, w1, [x2]
  40   casal   w0, w1, [x2]
  41
  42 //CHECK:  cas   w0, w1, [x2]        //      encoding: [0x41,0x7c,0xa0,0x88]
  43 //CHECK:  casa  w0, w1, [x2]        //      encoding: [0x41,0x7c,0xe0,0x88]
  44 //CHECK:  casl   w0, w1, [x2]       //      encoding: [0x41,0xfc,0xa0,0x88]
  45 //CHECK:  casal   w0, w1, [x2]      //      encoding: [0x41,0xfc,0xe0,0x88]
  46
  47   cas   w0, w1, [w2]
  48   casl  w0, x1, [x2]
  49
  50 //CHECK-ERROR: error: invalid operand for instruction
  51 //CHECK-ERROR:   cas   w0, w1, [w2]
  52 //CHECK-ERROR:                  ^
  53 //CHECK-ERROR: error: invalid operand for instruction
  54 //CHECK-ERROR:   casl  w0, x1, [x2]
  55 //CHECK-ERROR:             ^
  56
  57   //64 bits
  58   cas   x0, x1, [x2]
  59   casa  x0, x1, [x2]
  60   casl   x0, x1, [x2]
  61   casal   x0, x1, [x2]
  62
  63 //CHECK:  cas   x0, x1, [x2]        //      encoding: [0x41,0x7c,0xa0,0xc8]
  64 //CHECK:  casa  x0, x1, [x2]        //      encoding: [0x41,0x7c,0xe0,0xc8]
  65 //CHECK:  casl   x0, x1, [x2]       //      encoding: [0x41,0xfc,0xa0,0xc8]
  66 //CHECK:  casal   x0, x1, [x2]      //      encoding: [0x41,0xfc,0xe0,0xc8]
  67
  68   casa   x0, x1, [w2]
  69   casal  x0, w1, [x2]
  70
  71 //CHECK-ERROR: error: invalid operand for instruction
  72 //CHECK-ERROR:   casa   x0, x1, [w2]
  73 //CHECK-ERROR:                   ^
  74 //CHECK-ERROR: error: invalid operand for instruction
  75 //CHECK-ERROR:   casal  x0, w1, [x2]
  76 //CHECK-ERROR:              ^
  77
  78   // LD<OP> intructions
  79   ldadda x0, x1, [x2]
  80   ldclrl x0, x1, [x2]
  81   ldeoral x0, x1, [x2]
  82   ldset x0, x1, [x2]
  83   ldsmaxa w0, w1, [x2]
  84   ldsminlb w0, w1, [x2]
  85   ldumaxalh w0, w1, [x2]
  86   ldumin w0, w1, [x2]
  87   ldsminb w2, w3, [x5]
  88 //CHECK: ldadda     x0, x1, [x2]  // encoding: [0x41,0x00,0xa0,0xf8]
  89 //CHECK: ldclrl     x0, x1, [x2]  // encoding: [0x41,0x10,0x60,0xf8]
  90 //CHECK: ldeoral    x0, x1, [x2]  // encoding: [0x41,0x20,0xe0,0xf8]
  91 //CHECK: ldset      x0, x1, [x2]  // encoding: [0x41,0x30,0x20,0xf8]
  92 //CHECK: ldsmaxa    w0, w1, [x2]  // encoding: [0x41,0x40,0xa0,0xb8]
  93 //CHECK: ldsminlb   w0, w1, [x2]  // encoding: [0x41,0x50,0x60,0x38]
  94 //CHECK: ldumaxalh  w0, w1, [x2]  // encoding: [0x41,0x60,0xe0,0x78]
  95 //CHECK: ldumin     w0, w1, [x2]  // encoding: [0x41,0x70,0x20,0xb8]
  96 //CHECK: ldsminb    w2, w3, [x5]  // encoding: [0xa3,0x50,0x22,0x38]
  97
  98   // ST<OP> intructions: aliases to LD<OP>
  99   stADDlb w0, [x2]
 100   stclrlh w0, [x2]
 101   steorl  w0, [x2]
 102   stsetl  x0, [x2]
 103   stsmaxb  w0, [x2]
 104   stsminh  w0, [x2]
 105   stumax   w0, [x2]
 106   stumin   x0, [x2]
 107   stsminl x29, [sp]
 108 //CHECK: staddlb    w0, [x2]  // encoding: [0x5f,0x00,0x60,0x38]
 109 //CHECK: stclrlh    w0, [x2]  // encoding: [0x5f,0x10,0x60,0x78]
 110 //CHECK: steorl     w0, [x2]  // encoding: [0x5f,0x20,0x60,0xb8]
 111 //CHECK: stsetl     x0, [x2]  // encoding: [0x5f,0x30,0x60,0xf8]
 112 //CHECK: stsmaxb     w0, [x2]  // encoding: [0x5f,0x40,0x20,0x38]
 113 //CHECK: stsminh     w0, [x2]  // encoding: [0x5f,0x50,0x20,0x78]
 114 //CHECK: stumax      w0, [x2]  // encoding: [0x5f,0x60,0x20,0xb8]
 115 //CHECK: stumin      x0, [x2]  // encoding: [0x5f,0x70,0x20,0xf8]
 116 //CHECK: stsminl     x29, [sp] // encoding: [0xff,0x53,0x7d,0xf8]
 117
 118
 119   ldsmax x0, x1, [w2]
 120   ldeorl w0, w1, [w2]
 121 //CHECK-ERROR: error: invalid operand for instruction
 122 //CHECK-ERROR:   ldsmax x0, x1, [w2]
 123 //CHECK-ERROR:                   ^
 124 //CHECK-ERROR: error: invalid operand for instruction
 125 //CHECK-ERROR:   ldeorl w0, w1, [w2]
 126 //CHECK-ERROR:                   ^
 127
 128   //SWP instruction
 129   swp   x0, x1, [x2]
 130   swpb  w0, w1, [x2]
 131   swplh w0, w1, [x2]
 132   swpal x0, x1, [sp]
 133 //CHECK: swp   x0, x1, [x2]       // encoding: [0x41,0x80,0x20,0xf8]
 134 //CHECK: swpb  w0, w1, [x2]       // encoding: [0x41,0x80,0x20,0x38]
 135 //CHECK: swplh w0, w1, [x2]       // encoding: [0x41,0x80,0x60,0x78]
 136 //CHECK: swpal x0, x1, [sp]       // encoding: [0xe1,0x83,0xe0,0xf8]
 137
 138   swp   x0, x1, [w2]
 139   swp   x0, x1, [xzr]
 140 //CHECK-ERROR: error: invalid operand for instruction
 141 //CHECK-ERROR:   swp   x0, x1, [w2]
 142 //CHECK-ERROR:                  ^
 143 //CHECK-ERROR: error: invalid operand for instruction
 144 //CHECK-ERROR:   swp   x0, x1, [xzr]
 145 //CHECK-ERROR:                  ^
 146
 147   //CASP instruction
 148   casp x0, x1, x2, x3, [x4]
 149   casp w0, w1, w2, w3, [x4]
 150 //CHECK: casp x0, x1, x2, x3, [x4]      // encoding: [0x82,0x7c,0x20,0x48]
 151 //CHECK: casp w0, w1, w2, w3, [x4]      // encoding: [0x82,0x7c,0x20,0x08]
 152
 153   casp x1, x2, x4, x5, [x6]
 154   casp x0, x1, x3, x4, [x5]
 155   casp x0, x2, x4, x5, [x6]
 156   casp x0, x1, x2, x4, [x5]
 157   casp x0, w1, x2, x3, [x5]
 158   casp w0, x1, x2, x3, [x5]
 159   casp w0, x1, w2, w3, [x5]
 160   casp x0, x1, w2, w3, [x5]
 161 //CHECK-ERROR: error: expected first even register of a consecutive same-size even/odd register pair
 162 //CHECK-ERROR:  casp x1, x2, x4, x5, [x6]
 163 //CHECK-ERROR:       ^
 164 //CHECK-ERROR: error: expected first even register of a consecutive same-size even/odd register pair
 165 //CHECK-ERROR:  casp x0, x1, x3, x4, [x5]
 166 //CHECK-ERROR:               ^
 167 //CHECK-ERROR: error:  expected second odd register of a consecutive same-size even/odd register pair
 168 //CHECK-ERROR:  casp x0, x2, x4, x5, [x6]
 169 //CHECK-ERROR:           ^
 170 //CHECK-ERROR: error: expected second odd register of a consecutive same-size even/odd register pair
 171 //CHECK-ERROR:  casp x0, x1, x2, x4, [x5]
 172 //CHECK-ERROR:                   ^
 173 //CHECK-ERROR: error: expected second odd register of a consecutive same-size even/odd register pair
 174 //CHECK-ERROR:  casp x0, w1, x2, x3, [x5]
 175 //CHECK-ERROR:           ^
 176 //CHECK-ERROR: error: expected second odd register of a consecutive same-size even/odd register pair
 177 //CHECK-ERROR:  casp w0, x1, x2, x3, [x5]
 178 //CHECK-ERROR:           ^
 179 //CHECK-ERROR: error: expected second odd register of a consecutive same-size even/odd register pair
 180 //CHECK-ERROR:  casp w0, x1, w2, w3, [x5]
 181 //CHECK-ERROR:           ^
 182 //CHECK-ERROR: error: invalid operand for instruction
 183 //CHECK-ERROR:  casp x0, x1, w2, w3, [x5]
 184 //CHECK-ERROR:               ^