[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / armv8.5a-predres-error.s
blob295252d0f6783f5da1c8f078e2f51ac3420f8557
1 // RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predres < %s 2>&1| FileCheck %s
3 cfp rctx
4 dvp rctx
5 cpp rctx
7 // CHECK: specified cfp op requires a register
8 // CHECK: specified dvp op requires a register
9 // CHECK: specified cpp op requires a register
11 cfp x0, x1
12 dvp x1, x2
13 cpp x2, x3
15 // CHECK: invalid operand for prediction restriction instruction
16 // CHECK-NEXT: cfp
17 // CHECK: invalid operand for prediction restriction instruction
18 // CHECK-NEXT: dvp
19 // CHECK: invalid operand for prediction restriction instruction
20 // CHECK-NEXT: cpp