[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AMDGPU / ds-gfx9.s
blob7c67a3f7edd43b20c5c40bd80268d83c12413e22
1 // RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
2 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding 2>&1 %s | FileCheck -check-prefix=VI-ERR -check-prefix=GCNERR %s
4 ds_read_u8_d16 v8, v2
5 // GFX9: ds_read_u8_d16 v8, v2 ; encoding: [0x00,0x00,0xac,0xd8,0x02,0x00,0x00,0x08]
6 // VI-ERR: error: instruction not supported on this GPU
8 ds_read_u8_d16_hi v8, v2
9 // GFX9: ds_read_u8_d16_hi v8, v2 ; encoding: [0x00,0x00,0xae,0xd8,0x02,0x00,0x00,0x08]
10 // VI-ERR: error: instruction not supported on this GPU
12 ds_read_i8_d16 v8, v2
13 // GFX9: ds_read_i8_d16 v8, v2 ; encoding: [0x00,0x00,0xb0,0xd8,0x02,0x00,0x00,0x08]
14 // VI-ERR: error: instruction not supported on this GPU
16 ds_read_i8_d16_hi v8, v2
17 // GFX9: ds_read_i8_d16_hi v8, v2 ; encoding: [0x00,0x00,0xb2,0xd8,0x02,0x00,0x00,0x08]
18 // VI-ERR: error: instruction not supported on this GPU
20 ds_read_u16_d16 v8, v2
21 // GFX9: ds_read_u16_d16 v8, v2 ; encoding: [0x00,0x00,0xb4,0xd8,0x02,0x00,0x00,0x08]
22 // VI-ERR: error: instruction not supported on this GPU
24 ds_read_u16_d16_hi v8, v2
25 // GFX9: ds_read_u16_d16_hi v8, v2 ; encoding: [0x00,0x00,0xb6,0xd8,0x02,0x00,0x00,0x08]
26 // VI-ERR: error: instruction not supported on this GPU
28 ds_write_b8_d16_hi v8, v2
29 // VI-ERR: error: instruction not supported on this GPU
30 // GFX9: ds_write_b8_d16_hi v8, v2 ; encoding: [0x00,0x00,0xa8,0xd8,0x08,0x02,0x00,0x00]
32 ds_write_b16_d16_hi v8, v2
33 // VI-ERR: error: instruction not supported on this GPU
34 // GFX9: ds_write_b16_d16_hi v8, v2 ; encoding: [0x00,0x00,0xaa,0xd8,0x08,0x02,0x00,0x00]
36 ds_write_addtid_b32 v8, v2
37 // VI-ERR: error: instruction not supported on this GPU
38 // GFX9: ds_write_addtid_b32 v8, v2 ; encoding: [0x00,0x00,0x3a,0xd8,0x08,0x02,0x00,0x00]
40 ds_read_addtid_b32 v8, v2
41 // VI-ERR: error: instruction not supported on this GPU
42 // GFX9: ds_read_addtid_b32 v8, v2 ; encoding: [0x00,0x00,0x6c,0xd9,0x02,0x00,0x00,0x08]