[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AMDGPU / hsa-exp.s
blobcb7c0be8b021fc59d50c37c964d57cdae609d2ac
1 // RUN: llvm-mc -triple amdgcn--amdhsa -mcpu=kaveri -mattr=-code-object-v3 -show-encoding %s | FileCheck %s --check-prefix=ASM
2 // RUN: llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=kaveri -mattr=-code-object-v3 -show-encoding %s | llvm-readobj --symbols -S --sd | FileCheck %s --check-prefix=ELF
4 // ELF: Section {
5 // ELF: Name: .text
6 // ELF: Type: SHT_PROGBITS (0x1)
7 // ELF: Flags [ (0x6)
8 // ELF: SHF_ALLOC (0x2)
9 // ELF: SHF_EXECINSTR (0x4)
11 // ELF: SHT_NOTE
12 // ELF: 0000: 04000000 08000000 01000000 414D4400
13 // ELF: 0010: 02000000 00000000 04000000 1B000000
14 // ELF: 0020: 03000000 414D4400 04000700 07000000
15 // ELF: 0030: 00000000 00000000 414D4400 414D4447
16 // ELF: 0040: 50550000
18 // ELF: Symbol {
19 // ELF: Name: amd_kernel_code_t_minimal
20 // ELF: Type: AMDGPU_HSA_KERNEL (0xA)
21 // ELF: Section: .text
22 // ELF: }
24 .text
25 // ASM: .text
27 .hsa_code_object_version 2,0
28 // ASM: .hsa_code_object_version 2,0
30 .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
31 // ASM: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
33 .amdgpu_hsa_kernel amd_kernel_code_t_minimal
35 .set my_is_ptr64, 1
37 .if my_is_ptr64 == 0
38 .set my_kernarg_segment_byte_size, 32
39 .else
40 .set my_kernarg_segment_byte_size, 16
41 .endif
43 .set my_sgpr, 8
46 amd_kernel_code_t_minimal:
47 .amd_kernel_code_t
48 amd_code_version_major = .option.machine_version_major
49 enable_sgpr_kernarg_segment_ptr = 1
50 is_ptr64 = my_is_ptr64
51 granulated_workitem_vgpr_count = 1
52 granulated_wavefront_sgpr_count = 1+(my_sgpr-1)/8
53 user_sgpr_count = 2
54 kernarg_segment_byte_size = my_kernarg_segment_byte_size
55 wavefront_sgpr_count = my_sgpr
56 // wavefront_sgpr_count = 7
57 ; wavefront_sgpr_count = 7
58 // Make sure a blank line won't break anything:
60 // Make sure a line with whitespace won't break anything:
62 workitem_vgpr_count = 16
63 .end_amd_kernel_code_t
65 // ASM-LABEL: {{^}}amd_kernel_code_t_minimal:
66 // ASM: .amd_kernel_code_t
67 // ASM: amd_code_version_major = 7
68 // ASM: amd_code_version_minor = 2
69 // ASM: amd_machine_kind = 1
70 // ASM: amd_machine_version_major = 7
71 // ASM: amd_machine_version_minor = 0
72 // ASM: amd_machine_version_stepping = 0
73 // ASM: kernel_code_entry_byte_offset = 256
74 // ASM: kernel_code_prefetch_byte_size = 0
75 // ASM: granulated_workitem_vgpr_count = 1
76 // ASM: granulated_wavefront_sgpr_count = 1
77 // ASM: priority = 0
78 // ASM: float_mode = 0
79 // ASM: priv = 0
80 // ASM: enable_dx10_clamp = 0
81 // ASM: debug_mode = 0
82 // ASM: enable_ieee_mode = 0
83 // ASM: enable_sgpr_private_segment_wave_byte_offset = 0
84 // ASM: user_sgpr_count = 2
85 // ASM: enable_sgpr_workgroup_id_x = 0
86 // ASM: enable_sgpr_workgroup_id_y = 0
87 // ASM: enable_sgpr_workgroup_id_z = 0
88 // ASM: enable_sgpr_workgroup_info = 0
89 // ASM: enable_vgpr_workitem_id = 0
90 // ASM: enable_exception_msb = 0
91 // ASM: granulated_lds_size = 0
92 // ASM: enable_exception = 0
93 // ASM: enable_sgpr_private_segment_buffer = 0
94 // ASM: enable_sgpr_dispatch_ptr = 0
95 // ASM: enable_sgpr_queue_ptr = 0
96 // ASM: enable_sgpr_kernarg_segment_ptr = 1
97 // ASM: enable_sgpr_dispatch_id = 0
98 // ASM: enable_sgpr_flat_scratch_init = 0
99 // ASM: enable_sgpr_private_segment_size = 0
100 // ASM: enable_sgpr_grid_workgroup_count_x = 0
101 // ASM: enable_sgpr_grid_workgroup_count_y = 0
102 // ASM: enable_sgpr_grid_workgroup_count_z = 0
103 // ASM: enable_ordered_append_gds = 0
104 // ASM: private_element_size = 0
105 // ASM: is_ptr64 = 1
106 // ASM: is_dynamic_callstack = 0
107 // ASM: is_debug_enabled = 0
108 // ASM: is_xnack_enabled = 0
109 // ASM: workitem_private_segment_byte_size = 0
110 // ASM: workgroup_group_segment_byte_size = 0
111 // ASM: gds_segment_byte_size = 0
112 // ASM: kernarg_segment_byte_size = 16
113 // ASM: workgroup_fbarrier_count = 0
114 // ASM: wavefront_sgpr_count = 8
115 // ASM: workitem_vgpr_count = 16
116 // ASM: reserved_vgpr_first = 0
117 // ASM: reserved_vgpr_count = 0
118 // ASM: reserved_sgpr_first = 0
119 // ASM: reserved_sgpr_count = 0
120 // ASM: debug_wavefront_private_segment_offset_sgpr = 0
121 // ASM: debug_private_segment_buffer_sgpr = 0
122 // ASM: kernarg_segment_alignment = 4
123 // ASM: group_segment_alignment = 4
124 // ASM: private_segment_alignment = 4
125 // ASM: wavefront_size = 6
126 // ASM: call_convention = -1
127 // ASM: runtime_loader_kernel_symbol = 0
128 // ASM: .end_amd_kernel_code_t