[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / Mips / mips32r6 / invalid-mips5.s
blob63f1ccaef8f346f16ab738ace3feb2aec1202cde
1 # Instructions that are invalid
3 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \
4 # RUN: 2>%t1
5 # RUN: FileCheck %s < %t1
7 .set noat
8 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 suxc1 $f12,$k1($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled