1 # RUN: llvm-mc -filetype=obj -arch mipsel %s | llvm-readobj -r | FileCheck %s
3 # Test the order of records in the relocation table.
5 # MIPS has a few relocations that have an AHL component in the expression used
6 # to evaluate them. This AHL component is an addend with the same number of
7 # bits as a symbol value but not all of our ABI's are able to supply a
8 # sufficiently sized addend in a single relocation.
10 # The O32 ABI for example, uses REL relocations which store the addend in the
11 # section data. All the relocations with AHL components affect 16-bit fields
12 # so the addend is limited to 16-bit. This ABI resolves the limitation by
13 # linking relocations (e.g. R_MIPS_HI16 and R_MIPS_LO16) and distributing the
14 # addend between the linked relocations. The ABI mandates that such relocations
15 # must be next to each other in a particular order (e.g. R_MIPS_HI16 must be
16 # followed by a matching R_MIPS_LO16) but the rule is less strict in practice.
18 # See MipsELFObjectWriter.cpp for a full description of the rules.
20 # TODO: Add mips16 and micromips tests.
22 # HILO 1: HI/LO already match
23 .section .mips_hilo_1, "ax", @progbits
25 addiu $
2, $
2, %lo
(sym1
)
27 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_1 {
28 # CHECK-NEXT: 0x0 R_MIPS_HI16 sym1
29 # CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
32 # HILO 2: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
33 .section .mips_hilo_2, "ax", @progbits
34 addiu $
2, $
2, %lo
(sym1
)
37 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_2 {
38 # CHECK-NEXT: 0x4 R_MIPS_HI16 sym1
39 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
42 # HILO 3: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
43 # The second relocation matches if the symbol is the same.
44 .section .mips_hilo_3, "ax", @progbits
45 addiu $
2, $
2, %lo
(sym1
)
47 addiu $
2, $
2, %lo
(sym2
)
50 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_3 {
51 # CHECK-NEXT: 0xC R_MIPS_HI16 sym1
52 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
53 # CHECK-NEXT: 0x4 R_MIPS_HI16 sym2
54 # CHECK-NEXT: 0x8 R_MIPS_LO16 sym2
57 # HILO 3b: Same as 3 but a different starting order.
58 .section .mips_hilo_3b, "ax", @progbits
59 addiu $
2, $
2, %lo
(sym1
)
61 addiu $
2, $
2, %lo
(sym2
)
64 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_3b {
65 # CHECK-NEXT: 0x4 R_MIPS_HI16 sym1
66 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
67 # CHECK-NEXT: 0xC R_MIPS_HI16 sym2
68 # CHECK-NEXT: 0x8 R_MIPS_LO16 sym2
71 # HILO 4: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
72 # The second relocation matches if the symbol is the same and the
74 .section .mips_hilo_4, "ax", @progbits
75 addiu $
2, $
2, %lo
(sym1
)
76 addiu $
2, $
2, %lo
(sym1+
4)
80 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_4 {
81 # CHECK-NEXT: 0xC R_MIPS_HI16 sym1
82 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
83 # CHECK-NEXT: 0x8 R_MIPS_HI16 sym1
84 # CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
87 # HILO 5: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
88 # The second relocation matches if the symbol is the same and the
89 # offset is greater or equal. Exact matches are preferred so both
90 # R_MIPS_HI16's match the same R_MIPS_LO16.
91 .section .mips_hilo_5, "ax", @progbits
94 addiu $
2, $
2, %lo
(sym1+
1)
95 addiu $
2, $
2, %lo
(sym1
)
97 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_5 {
98 # CHECK-NEXT: 0x8 R_MIPS_LO16 sym1
99 # CHECK-NEXT: 0x0 R_MIPS_HI16 sym1
100 # CHECK-NEXT: 0x4 R_MIPS_HI16 sym1
101 # CHECK-NEXT: 0xC R_MIPS_LO16 sym1
104 # HILO 6: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
105 # The second relocation matches if the symbol is the same and the
106 # offset is greater or equal. Smaller offsets are preferred so both
107 # R_MIPS_HI16's still match the same R_MIPS_LO16.
108 .section .mips_hilo_6, "ax", @progbits
111 addiu $
2, $
2, %lo
(sym1+
2)
112 addiu $
2, $
2, %lo
(sym1+
1)
114 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_6 {
115 # CHECK-NEXT: 0x8 R_MIPS_LO16 sym1
116 # CHECK-NEXT: 0x0 R_MIPS_HI16 sym1
117 # CHECK-NEXT: 0x4 R_MIPS_HI16 sym1
118 # CHECK-NEXT: 0xC R_MIPS_LO16 sym1
121 # HILO 7: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
122 # The second relocation matches if the symbol is the same and the
123 # offset is greater or equal so that the carry bit is correct. The two
124 # R_MIPS_HI16's therefore match different R_MIPS_LO16's.
125 .section .mips_hilo_7, "ax", @progbits
126 addiu $
2, $
2, %lo
(sym1+
1)
127 addiu $
2, $
2, %lo
(sym1+
6)
131 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_7 {
132 # CHECK-NEXT: 0xC R_MIPS_HI16 sym1
133 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
134 # CHECK-NEXT: 0x8 R_MIPS_HI16 sym1
135 # CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
138 # HILO 8: R_MIPS_LO16's may be orphaned.
139 .section .mips_hilo_8, "ax", @progbits
142 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_8 {
143 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
146 # HILO 8b: Another example of 8. The R_MIPS_LO16 at 0x4 is orphaned.
147 .section .mips_hilo_8b, "ax", @progbits
152 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_8b {
153 # CHECK-NEXT: 0x8 R_MIPS_HI16 sym1
154 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
155 # CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
158 # HILO 9: R_MIPS_HI16's don't need a matching R_MIPS_LO16 to immediately follow
159 # so long as there is one after the R_MIPS_HI16 somewhere. This isn't
160 # permitted by the ABI specification but has been allowed in practice
161 # for a very long time. The R_MIPS_HI16's should be ordered by the
162 # address they affect for purely cosmetic reasons.
163 .section .mips_hilo_9, "ax", @progbits
168 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_9 {
169 # CHECK-NEXT: 0x4 R_MIPS_HI16 sym1
170 # CHECK-NEXT: 0x8 R_MIPS_HI16 sym1
171 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
174 # HILO 10: R_MIPS_HI16's must have a matching R_MIPS_LO16 somewhere though.
175 # When this is impossible we have two possible bad behaviours
176 # depending on the linker implementation:
177 # * The linker silently computes the wrong value using a partially
178 # matching R_MIPS_LO16.
179 # * The linker rejects the relocation table as invalid.
180 # The latter is preferable since it's far easier to detect and debug so
181 # check that we encourage this behaviour by putting invalid
182 # R_MIPS_HI16's at the end of the relocation table where the risk of a
183 # partial match is very low.
184 .section .mips_hilo_10, "ax", @progbits
191 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_10 {
192 # CHECK-NEXT: 0x0 R_MIPS_HI16 sym1
193 # CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
194 # CHECK-NEXT: 0xC R_MIPS_HI16 sym3
195 # CHECK-NEXT: 0x10 R_MIPS_LO16 sym3
196 # CHECK-NEXT: 0x8 R_MIPS_HI16 sym2
199 # Now do the same tests for GOT/LO.
200 # The rules only apply to R_MIPS_GOT16 on local symbols which are also
201 # rewritten into section relative relocations.
203 # GOTLO 1: GOT/LO already match
204 .section .mips_gotlo_1, "ax", @progbits
206 addiu $
2, $
2, %lo
(local1
)
208 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_1 {
209 # CHECK-NEXT: 0x0 R_MIPS_GOT16 .text
210 # CHECK-NEXT: 0x4 R_MIPS_LO16 .text
213 # GOTLO 2: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
214 .section .mips_gotlo_2, "ax", @progbits
215 addiu $
2, $
2, %lo
(local1
)
218 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_2 {
219 # CHECK-NEXT: 0x4 R_MIPS_GOT16 .text
220 # CHECK-NEXT: 0x0 R_MIPS_LO16 .text
223 # GOTLO 3: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
224 # The second relocation matches if the symbol is the same.
225 .section .mips_gotlo_3, "ax", @progbits
226 addiu $
2, $
2, %lo
(local1
)
228 addiu $
2, $
2, %lo
(local2
)
231 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_3 {
232 # CHECK-NEXT: 0xC R_MIPS_GOT16 .text
233 # CHECK-NEXT: 0x0 R_MIPS_LO16 .text
234 # CHECK-NEXT: 0x4 R_MIPS_GOT16 .text
235 # CHECK-NEXT: 0x8 R_MIPS_LO16 .text
238 # GOTLO 3b: Same as 3 but a different starting order.
239 .section .mips_gotlo_3b, "ax", @progbits
240 addiu $
2, $
2, %lo
(local1
)
242 addiu $
2, $
2, %lo
(local2
)
245 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_3b {
246 # CHECK-NEXT: 0x4 R_MIPS_GOT16 .text
247 # CHECK-NEXT: 0x0 R_MIPS_LO16 .text
248 # CHECK-NEXT: 0xC R_MIPS_GOT16 .text
249 # CHECK-NEXT: 0x8 R_MIPS_LO16 .text
252 # GOTLO 4: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
253 # The second relocation matches if the symbol is the same and the
254 # offset is the same.
255 .section .mips_gotlo_4, "ax", @progbits
256 addiu $
2, $
2, %lo
(local1
)
257 addiu $
2, $
2, %lo
(local1+
4)
258 lui $
2, %got
(local1+
4)
261 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_4 {
262 # CHECK-NEXT: 0xC R_MIPS_GOT16 .text
263 # CHECK-NEXT: 0x0 R_MIPS_LO16 .text
264 # CHECK-NEXT: 0x8 R_MIPS_GOT16 .text
265 # CHECK-NEXT: 0x4 R_MIPS_LO16 .text
268 # GOTLO 5: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
269 # The second relocation matches if the symbol is the same and the
270 # offset is greater or equal. Exact matches are preferred so both
271 # R_MIPS_GOT16's match the same R_MIPS_LO16.
272 .section .mips_gotlo_5, "ax", @progbits
275 addiu $
2, $
2, %lo
(local1+
1)
276 addiu $
2, $
2, %lo
(local1
)
278 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_5 {
279 # CHECK-NEXT: 0x8 R_MIPS_LO16 .text
280 # CHECK-NEXT: 0x0 R_MIPS_GOT16 .text
281 # CHECK-NEXT: 0x4 R_MIPS_GOT16 .text
282 # CHECK-NEXT: 0xC R_MIPS_LO16 .text
285 # GOTLO 6: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
286 # The second relocation matches if the symbol is the same and the
287 # offset is greater or equal. Smaller offsets are preferred so both
288 # R_MIPS_GOT16's still match the same R_MIPS_LO16.
289 .section .mips_gotlo_6, "ax", @progbits
292 addiu $
2, $
2, %lo
(local1+
2)
293 addiu $
2, $
2, %lo
(local1+
1)
295 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_6 {
296 # CHECK-NEXT: 0x8 R_MIPS_LO16 .text
297 # CHECK-NEXT: 0x0 R_MIPS_GOT16 .text
298 # CHECK-NEXT: 0x4 R_MIPS_GOT16 .text
299 # CHECK-NEXT: 0xC R_MIPS_LO16 .text
302 # GOTLO 7: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
303 # The second relocation matches if the symbol is the same and the
304 # offset is greater or equal so that the carry bit is correct. The two
305 # R_MIPS_GOT16's therefore match different R_MIPS_LO16's.
306 .section .mips_gotlo_7, "ax", @progbits
307 addiu $
2, $
2, %lo
(local1+
1)
308 addiu $
2, $
2, %lo
(local1+
6)
309 lui $
2, %got
(local1+
4)
312 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_7 {
313 # CHECK-NEXT: 0xC R_MIPS_GOT16 .text
314 # CHECK-NEXT: 0x0 R_MIPS_LO16 .text
315 # CHECK-NEXT: 0x8 R_MIPS_GOT16 .text
316 # CHECK-NEXT: 0x4 R_MIPS_LO16 .text
319 # GOTLO 8: R_MIPS_LO16's may be orphaned.
320 .section .mips_gotlo_8, "ax", @progbits
323 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_8 {
324 # CHECK-NEXT: 0x0 R_MIPS_LO16 .text
327 # GOTLO 8b: Another example of 8. The R_MIPS_LO16 at 0x4 is orphaned.
328 .section .mips_gotlo_8b, "ax", @progbits
333 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_8b {
334 # CHECK-NEXT: 0x8 R_MIPS_GOT16 .text
335 # CHECK-NEXT: 0x0 R_MIPS_LO16 .text
336 # CHECK-NEXT: 0x4 R_MIPS_LO16 .text
339 # GOTLO 9: R_MIPS_GOT16's don't need a matching R_MIPS_LO16 to immediately
340 # follow so long as there is one after the R_MIPS_GOT16 somewhere.
341 # This isn't permitted by the ABI specification but has been allowed
342 # in practice for a very long time. The R_MIPS_GOT16's should be
343 # ordered by the address they affect for purely cosmetic reasons.
344 .section .mips_gotlo_9, "ax", @progbits
349 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_9 {
350 # CHECK-NEXT: 0x4 R_MIPS_GOT16 .text
351 # CHECK-NEXT: 0x8 R_MIPS_GOT16 .text
352 # CHECK-NEXT: 0x0 R_MIPS_LO16 .text
355 # GOTLO 10: R_MIPS_GOT16's must have a matching R_MIPS_LO16 somewhere though.
356 # When this is impossible we have two possible bad behaviours
357 # depending on the linker implementation:
358 # * The linker silently computes the wrong value using a partially
359 # matching R_MIPS_LO16.
360 # * The linker rejects the relocation table as invalid.
361 # The latter is preferable since it's far easier to detect and debug
362 # so check that we encourage this behaviour by putting invalid
363 # R_MIPS_GOT16's at the end of the relocation table where the risk of
364 # a partial match is very low.
365 .section .mips_gotlo_10, "ax", @progbits
372 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_10 {
373 # CHECK-NEXT: 0x0 R_MIPS_GOT16 .text
374 # CHECK-NEXT: 0x4 R_MIPS_LO16 .text
375 # CHECK-NEXT: 0xC R_MIPS_GOT16 .text
376 # CHECK-NEXT: 0x10 R_MIPS_LO16 .text
377 # CHECK-NEXT: 0x8 R_MIPS_GOT16 .text
380 # Finally, do test 2 for R_MIPS_GOT16 on external symbols to prove they are
381 # exempt from the rules for local symbols.
383 # External GOTLO 2: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.
384 .section .mips_ext_gotlo_2, "ax", @progbits
385 addiu $
2, $
2, %lo
(sym1
)
388 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_ext_gotlo_2 {
389 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
390 # CHECK-NEXT: 0x4 R_MIPS_GOT16 sym1
393 # Define some local symbols.