[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / RISCV / rv32m-invalid.s
blob5e268e8b9160e86467d5a1d80852f169b8ad722e
1 # RUN: not llvm-mc -triple riscv32 -mattr=+m < %s 2>&1 | FileCheck %s
3 # RV64M instructions can't be used for RV32
4 mulw ra, sp, gp # CHECK: :[[@LINE]]:1: error: instruction use requires an option to be enabled
5 divw tp, t0, t1 # CHECK: :[[@LINE]]:1: error: instruction use requires an option to be enabled
6 divuw t2, s0, s2 # CHECK: :[[@LINE]]:1: error: instruction use requires an option to be enabled
7 remw a0, a1, a2 # CHECK: :[[@LINE]]:1: error: instruction use requires an option to be enabled
8 remuw a3, a4, a5 # CHECK: :[[@LINE]]:1: error: instruction use requires an option to be enabled