1 ; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -inline < %s | FileCheck %s
2 ; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -passes='cgscc(inline)' < %s | FileCheck %s
4 define i32 @func_default() #0 {
8 define i32 @func_dx10_clamp_enabled() #1 {
12 define i32 @func_dx10_clamp_disabled() #2 {
16 ; CHECK-LABEL: @default_call_default(
17 ; CHECK-NEXT: ret i32 0
18 define i32 @default_call_default() #0 {
19 %call = call i32 @func_default()
23 ; CHECK-LABEL: @dx10_clamp_enabled_call_default(
24 ; CHECK-NEXT: ret i32 0
25 define i32 @dx10_clamp_enabled_call_default() #1 {
26 %call = call i32 @func_default()
30 ; CHECK-LABEL: @dx10_clamp_enabled_call_dx10_clamp_enabled(
31 ; CHECK-NEXT: ret i32 0
32 define i32 @dx10_clamp_enabled_call_dx10_clamp_enabled() #1 {
33 %call = call i32 @func_dx10_clamp_enabled()
37 ; CHECK-LABEL: @dx10_clamp_enabled_call_dx10_clamp_disabled(
38 ; CHECK-NEXT: call i32 @func_dx10_clamp_disabled()
39 define i32 @dx10_clamp_enabled_call_dx10_clamp_disabled() #1 {
40 %call = call i32 @func_dx10_clamp_disabled()
44 ; CHECK-LABEL: @dx10_clamp_disabled_call_default(
45 ; CHECK-NEXT: call i32 @func_default()
46 define i32 @dx10_clamp_disabled_call_default() #2 {
47 %call = call i32 @func_default()
51 ; CHECK-LABEL: @dx10_clamp_disabled_call_dx10_clamp_enabled(
52 ; CHECK-NEXT: call i32 @func_dx10_clamp_enabled()
53 define i32 @dx10_clamp_disabled_call_dx10_clamp_enabled() #2 {
54 %call = call i32 @func_dx10_clamp_enabled()
58 ; CHECK-LABEL: @dx10_clamp_disabled_call_dx10_clamp_disabled(
59 ; CHECK-NEXT: ret i32 0
60 define i32 @dx10_clamp_disabled_call_dx10_clamp_disabled() #2 {
61 %call = call i32 @func_dx10_clamp_disabled()
65 ; Shader calling a compute function
66 ; CHECK-LABEL: @amdgpu_ps_default_call_default(
67 ; CHECK-NEXT: call i32 @func_default()
68 define amdgpu_ps i32 @amdgpu_ps_default_call_default() #0 {
69 %call = call i32 @func_default()
73 ; Shader with dx10_clamp enabled calling a compute function. Default
74 ; also implies ieee_mode, so this isn't inlinable.
75 ; CHECK-LABEL: @amdgpu_ps_dx10_clamp_enabled_call_default(
76 ; CHECK-NEXT: call i32 @func_default()
77 define amdgpu_ps i32 @amdgpu_ps_dx10_clamp_enabled_call_default() #1 {
78 %call = call i32 @func_default()
82 ; CHECK-LABEL: @amdgpu_ps_dx10_clamp_disabled_call_default(
83 ; CHECK-NEXT: call i32 @func_default()
84 define amdgpu_ps i32 @amdgpu_ps_dx10_clamp_disabled_call_default() #2 {
85 %call = call i32 @func_default()
89 ; CHECK-LABEL: @amdgpu_ps_dx10_clamp_enabled_ieee_call_default(
90 ; CHECK-NEXT: ret i32 0
91 define amdgpu_ps i32 @amdgpu_ps_dx10_clamp_enabled_ieee_call_default() #3 {
92 %call = call i32 @func_default()
96 ; CHECK-LABEL: @amdgpu_ps_dx10_clamp_disabled_ieee_call_default(
97 ; CHECK-NEXT: call i32 @func_default()
98 define amdgpu_ps i32 @amdgpu_ps_dx10_clamp_disabled_ieee_call_default() #4 {
99 %call = call i32 @func_default()
103 attributes #0 = { nounwind }
104 attributes #1 = { nounwind "amdgpu-dx10-clamp"="true" }
105 attributes #2 = { nounwind "amdgpu-dx10-clamp"="false" }
106 attributes #3 = { nounwind "amdgpu-dx10-clamp"="true" "amdgpu-ieee"="true" }
107 attributes #4 = { nounwind "amdgpu-dx10-clamp"="false" "amdgpu-ieee"="true" }