1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -instcombine -S | FileCheck %s
7 define i1 @test0(i1 %A) {
9 ; CHECK-NEXT: ret i1 [[A:%.*]]
15 define i32 @test1(i32 %A) {
16 ; CHECK-LABEL: @test1(
17 ; CHECK-NEXT: ret i32 [[A:%.*]]
23 define i1 @test2(i1 %A) {
24 ; CHECK-LABEL: @test2(
25 ; CHECK-NEXT: ret i1 false
31 define i32 @test3(i32 %A) {
32 ; CHECK-LABEL: @test3(
33 ; CHECK-NEXT: ret i32 0
39 define i32 @test4(i32 %A) {
40 ; CHECK-LABEL: @test4(
41 ; CHECK-NEXT: ret i32 -1
43 %NotA = xor i32 -1, %A
44 %B = xor i32 %A, %NotA
48 define i32 @test5(i32 %A) {
49 ; CHECK-LABEL: @test5(
50 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -124
51 ; CHECK-NEXT: ret i32 [[TMP1]]
58 define i8 @test6(i8 %A) {
59 ; CHECK-LABEL: @test6(
60 ; CHECK-NEXT: ret i8 [[A:%.*]]
67 define i32 @test7(i32 %A, i32 %B) {
68 ; CHECK-LABEL: @test7(
69 ; CHECK-NEXT: [[A1:%.*]] = and i32 [[A:%.*]], 7
70 ; CHECK-NEXT: [[B1:%.*]] = and i32 [[B:%.*]], 128
71 ; CHECK-NEXT: [[C11:%.*]] = or i32 [[A1]], [[B1]]
72 ; CHECK-NEXT: ret i32 [[C11]]
76 %C1 = xor i32 %A1, %B1
80 define i8 @test8(i1 %c) {
81 ; CHECK-LABEL: @test8(
82 ; CHECK-NEXT: br i1 [[C:%.*]], label [[FALSE:%.*]], label [[TRUE:%.*]]
84 ; CHECK-NEXT: ret i8 1
86 ; CHECK-NEXT: ret i8 3
89 br i1 %d, label %True, label %False
98 define i1 @test9(i8 %A) {
99 ; CHECK-LABEL: @test9(
100 ; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A:%.*]], 89
101 ; CHECK-NEXT: ret i1 [[C]]
104 %C = icmp eq i8 %B, 34
108 define <2 x i1> @test9vec(<2 x i8> %a) {
109 ; CHECK-LABEL: @test9vec(
110 ; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i8> [[A:%.*]], <i8 89, i8 89>
111 ; CHECK-NEXT: ret <2 x i1> [[C]]
113 %b = xor <2 x i8> %a, <i8 123, i8 123>
114 %c = icmp eq <2 x i8> %b, <i8 34, i8 34>
118 define i8 @test10(i8 %A) {
119 ; CHECK-LABEL: @test10(
120 ; CHECK-NEXT: [[B:%.*]] = and i8 [[A:%.*]], 3
121 ; CHECK-NEXT: [[C1:%.*]] = or i8 [[B]], 4
122 ; CHECK-NEXT: ret i8 [[C1]]
129 define i8 @test11(i8 %A) {
130 ; CHECK-LABEL: @test11(
131 ; CHECK-NEXT: [[B:%.*]] = and i8 [[A:%.*]], -13
132 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[B]], 8
133 ; CHECK-NEXT: ret i8 [[TMP1]]
140 define i1 @test12(i8 %A) {
141 ; CHECK-LABEL: @test12(
142 ; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[A:%.*]], 4
143 ; CHECK-NEXT: ret i1 [[C]]
146 %c = icmp ne i8 %B, 0
150 define <2 x i1> @test12vec(<2 x i8> %a) {
151 ; CHECK-LABEL: @test12vec(
152 ; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i8> [[A:%.*]], <i8 4, i8 4>
153 ; CHECK-NEXT: ret <2 x i1> [[C]]
155 %b = xor <2 x i8> %a, <i8 4, i8 4>
156 %c = icmp ne <2 x i8> %b, zeroinitializer
160 define i32 @test18(i32 %A) {
161 ; CHECK-LABEL: @test18(
162 ; CHECK-NEXT: [[C:%.*]] = add i32 [[A:%.*]], 124
163 ; CHECK-NEXT: ret i32 [[C]]
170 define i32 @test19(i32 %A, i32 %B) {
171 ; CHECK-LABEL: @test19(
172 ; CHECK-NEXT: ret i32 [[B:%.*]]
179 define void @test20(i32 %A, i32 %B) {
180 ; CHECK-LABEL: @test20(
181 ; CHECK-NEXT: store i32 [[B:%.*]], i32* @G1, align 4
182 ; CHECK-NEXT: store i32 [[A:%.*]], i32* @G2, align 4
183 ; CHECK-NEXT: ret void
186 %t5 = xor i32 %t2, %B
187 %t8 = xor i32 %t5, %t2
188 store i32 %t8, i32* @G1
189 store i32 %t5, i32* @G2
193 define i32 @test22(i1 %X) {
194 ; CHECK-LABEL: @test22(
195 ; CHECK-NEXT: [[Z:%.*]] = zext i1 [[X:%.*]] to i32
196 ; CHECK-NEXT: ret i32 [[Z]]
199 %Z = zext i1 %Y to i32
204 ; Look through a zext between xors.
206 define i32 @fold_zext_xor_sandwich(i1 %X) {
207 ; CHECK-LABEL: @fold_zext_xor_sandwich(
208 ; CHECK-NEXT: [[Z:%.*]] = zext i1 [[X:%.*]] to i32
209 ; CHECK-NEXT: [[Q:%.*]] = xor i32 [[Z]], 3
210 ; CHECK-NEXT: ret i32 [[Q]]
213 %Z = zext i1 %Y to i32
218 define <2 x i32> @fold_zext_xor_sandwich_vec(<2 x i1> %X) {
219 ; CHECK-LABEL: @fold_zext_xor_sandwich_vec(
220 ; CHECK-NEXT: [[Z:%.*]] = zext <2 x i1> [[X:%.*]] to <2 x i32>
221 ; CHECK-NEXT: [[Q:%.*]] = xor <2 x i32> [[Z]], <i32 3, i32 3>
222 ; CHECK-NEXT: ret <2 x i32> [[Q]]
224 %Y = xor <2 x i1> %X, <i1 true, i1 true>
225 %Z = zext <2 x i1> %Y to <2 x i32>
226 %Q = xor <2 x i32> %Z, <i32 2, i32 2>
230 define i1 @test23(i32 %a, i32 %b) {
231 ; CHECK-LABEL: @test23(
232 ; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[B:%.*]], 0
233 ; CHECK-NEXT: ret i1 [[T4]]
236 %t4 = icmp eq i32 %t2, %a
240 define i1 @test24(i32 %c, i32 %d) {
241 ; CHECK-LABEL: @test24(
242 ; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[D:%.*]], 0
243 ; CHECK-NEXT: ret i1 [[T4]]
246 %t4 = icmp ne i32 %t2, %c
250 define i32 @test25(i32 %g, i32 %h) {
251 ; CHECK-LABEL: @test25(
252 ; CHECK-NEXT: [[T4:%.*]] = and i32 [[H:%.*]], [[G:%.*]]
253 ; CHECK-NEXT: ret i32 [[T4]]
256 %t2 = and i32 %h2, %g
257 %t4 = xor i32 %t2, %g
261 define i32 @test27(i32 %b, i32 %c, i32 %d) {
262 ; CHECK-LABEL: @test27(
263 ; CHECK-NEXT: [[T6:%.*]] = icmp eq i32 [[B:%.*]], [[C:%.*]]
264 ; CHECK-NEXT: [[T7:%.*]] = zext i1 [[T6]] to i32
265 ; CHECK-NEXT: ret i32 [[T7]]
269 %t6 = icmp eq i32 %t2, %t5
270 %t7 = zext i1 %t6 to i32
274 define i32 @test28(i32 %indvar) {
275 ; CHECK-LABEL: @test28(
276 ; CHECK-NEXT: [[T214:%.*]] = add i32 [[INDVAR:%.*]], 1
277 ; CHECK-NEXT: ret i32 [[T214]]
279 %t7 = add i32 %indvar, -2147483647
280 %t214 = xor i32 %t7, -2147483648
284 define <2 x i32> @test28vec(<2 x i32> %indvar) {
285 ; CHECK-LABEL: @test28vec(
286 ; CHECK-NEXT: [[T214:%.*]] = add <2 x i32> [[INDVAR:%.*]], <i32 1, i32 1>
287 ; CHECK-NEXT: ret <2 x i32> [[T214]]
289 %t7 = add <2 x i32> %indvar, <i32 -2147483647, i32 -2147483647>
290 %t214 = xor <2 x i32> %t7, <i32 -2147483648, i32 -2147483648>
294 define i32 @test28_sub(i32 %indvar) {
295 ; CHECK-LABEL: @test28_sub(
296 ; CHECK-NEXT: [[T214:%.*]] = sub i32 1, [[INDVAR:%.*]]
297 ; CHECK-NEXT: ret i32 [[T214]]
299 %t7 = sub i32 -2147483647, %indvar
300 %t214 = xor i32 %t7, -2147483648
304 define <2 x i32> @test28_subvec(<2 x i32> %indvar) {
305 ; CHECK-LABEL: @test28_subvec(
306 ; CHECK-NEXT: [[T214:%.*]] = sub <2 x i32> <i32 1, i32 1>, [[INDVAR:%.*]]
307 ; CHECK-NEXT: ret <2 x i32> [[T214]]
309 %t7 = sub <2 x i32> <i32 -2147483647, i32 -2147483647>, %indvar
310 %t214 = xor <2 x i32> %t7, <i32 -2147483648, i32 -2147483648>
314 define i32 @test29(i1 %C) {
315 ; CHECK-LABEL: @test29(
316 ; CHECK-NEXT: [[V:%.*]] = select i1 [[C:%.*]], i32 915, i32 113
317 ; CHECK-NEXT: ret i32 [[V]]
319 %A = select i1 %C, i32 1000, i32 10
324 define <2 x i32> @test29vec(i1 %C) {
325 ; CHECK-LABEL: @test29vec(
326 ; CHECK-NEXT: [[V:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 915, i32 915>, <2 x i32> <i32 113, i32 113>
327 ; CHECK-NEXT: ret <2 x i32> [[V]]
329 %A = select i1 %C, <2 x i32> <i32 1000, i32 1000>, <2 x i32> <i32 10, i32 10>
330 %V = xor <2 x i32> %A, <i32 123, i32 123>
334 define <2 x i32> @test29vec2(i1 %C) {
335 ; CHECK-LABEL: @test29vec2(
336 ; CHECK-NEXT: [[V:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 915, i32 2185>, <2 x i32> <i32 113, i32 339>
337 ; CHECK-NEXT: ret <2 x i32> [[V]]
339 %A = select i1 %C, <2 x i32> <i32 1000, i32 2500>, <2 x i32> <i32 10, i32 30>
340 %V = xor <2 x i32> %A, <i32 123, i32 333>
344 define i32 @test30(i1 %which) {
345 ; CHECK-LABEL: @test30(
347 ; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
349 ; CHECK-NEXT: br label [[FINAL]]
351 ; CHECK-NEXT: [[A:%.*]] = phi i32 [ 915, [[ENTRY:%.*]] ], [ 113, [[DELAY]] ]
352 ; CHECK-NEXT: ret i32 [[A]]
355 br i1 %which, label %final, label %delay
361 %A = phi i32 [ 1000, %entry ], [ 10, %delay ]
362 %value = xor i32 %A, 123
366 define <2 x i32> @test30vec(i1 %which) {
367 ; CHECK-LABEL: @test30vec(
369 ; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
371 ; CHECK-NEXT: br label [[FINAL]]
373 ; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ <i32 915, i32 915>, [[ENTRY:%.*]] ], [ <i32 113, i32 113>, [[DELAY]] ]
374 ; CHECK-NEXT: ret <2 x i32> [[A]]
377 br i1 %which, label %final, label %delay
383 %A = phi <2 x i32> [ <i32 1000, i32 1000>, %entry ], [ <i32 10, i32 10>, %delay ]
384 %value = xor <2 x i32> %A, <i32 123, i32 123>
388 define <2 x i32> @test30vec2(i1 %which) {
389 ; CHECK-LABEL: @test30vec2(
391 ; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
393 ; CHECK-NEXT: br label [[FINAL]]
395 ; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ <i32 915, i32 2185>, [[ENTRY:%.*]] ], [ <i32 113, i32 339>, [[DELAY]] ]
396 ; CHECK-NEXT: ret <2 x i32> [[A]]
399 br i1 %which, label %final, label %delay
405 %A = phi <2 x i32> [ <i32 1000, i32 2500>, %entry ], [ <i32 10, i32 30>, %delay ]
406 %value = xor <2 x i32> %A, <i32 123, i32 333>
410 ; B ^ (B | A) --> A & ~B
411 ; The division ops are here to thwart complexity-based canonicalization: all ops are binops.
413 define i32 @or_xor_commute1(i32 %p1, i32 %p2) {
414 ; CHECK-LABEL: @or_xor_commute1(
415 ; CHECK-NEXT: [[A:%.*]] = udiv i32 42, [[P1:%.*]]
416 ; CHECK-NEXT: [[B:%.*]] = udiv i32 42, [[P2:%.*]]
417 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[B]], -1
418 ; CHECK-NEXT: [[R:%.*]] = and i32 [[A]], [[TMP1]]
419 ; CHECK-NEXT: ret i32 [[R]]
421 %a = udiv i32 42, %p1
422 %b = udiv i32 42, %p2
428 ; B ^ (B | A) --> A & ~B
429 ; The division ops are here to thwart complexity-based canonicalization: all ops are binops.
431 define i32 @or_xor_commute2(i32 %p1, i32 %p2) {
432 ; CHECK-LABEL: @or_xor_commute2(
433 ; CHECK-NEXT: [[A:%.*]] = udiv i32 42, [[P1:%.*]]
434 ; CHECK-NEXT: [[B:%.*]] = udiv i32 42, [[P2:%.*]]
435 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[B]], -1
436 ; CHECK-NEXT: [[R:%.*]] = and i32 [[A]], [[TMP1]]
437 ; CHECK-NEXT: ret i32 [[R]]
439 %a = udiv i32 42, %p1
440 %b = udiv i32 42, %p2
446 ; B ^ (B | A) --> A & ~B
447 ; The division ops are here to thwart complexity-based canonicalization: all ops are binops.
449 define i32 @or_xor_commute3(i32 %p1, i32 %p2) {
450 ; CHECK-LABEL: @or_xor_commute3(
451 ; CHECK-NEXT: [[A:%.*]] = udiv i32 42, [[P1:%.*]]
452 ; CHECK-NEXT: [[B:%.*]] = udiv i32 42, [[P2:%.*]]
453 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[B]], -1
454 ; CHECK-NEXT: [[R:%.*]] = and i32 [[A]], [[TMP1]]
455 ; CHECK-NEXT: ret i32 [[R]]
457 %a = udiv i32 42, %p1
458 %b = udiv i32 42, %p2
464 ; B ^ (B | A) --> A & ~B
465 ; The division ops are here to thwart complexity-based canonicalization: all ops are binops.
467 define i32 @or_xor_commute4(i32 %p1, i32 %p2) {
468 ; CHECK-LABEL: @or_xor_commute4(
469 ; CHECK-NEXT: [[A:%.*]] = udiv i32 42, [[P1:%.*]]
470 ; CHECK-NEXT: [[B:%.*]] = udiv i32 42, [[P2:%.*]]
471 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[B]], -1
472 ; CHECK-NEXT: [[R:%.*]] = and i32 [[A]], [[TMP1]]
473 ; CHECK-NEXT: ret i32 [[R]]
475 %a = udiv i32 42, %p1
476 %b = udiv i32 42, %p2
482 define i32 @or_xor_extra_use(i32 %a, i32 %b, i32* %p) {
483 ; CHECK-LABEL: @or_xor_extra_use(
484 ; CHECK-NEXT: [[O:%.*]] = or i32 [[A:%.*]], [[B:%.*]]
485 ; CHECK-NEXT: store i32 [[O]], i32* [[P:%.*]], align 4
486 ; CHECK-NEXT: [[R:%.*]] = xor i32 [[O]], [[B]]
487 ; CHECK-NEXT: ret i32 [[R]]
490 store i32 %o, i32* %p
495 ; B ^ (B & A) --> ~A & B
496 ; The division ops are here to thwart complexity-based canonicalization: all ops are binops.
498 define i32 @and_xor_commute1(i32 %p1, i32 %p2) {
499 ; CHECK-LABEL: @and_xor_commute1(
500 ; CHECK-NEXT: [[A:%.*]] = udiv i32 42, [[P1:%.*]]
501 ; CHECK-NEXT: [[B:%.*]] = udiv i32 42, [[P2:%.*]]
502 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[A]], -1
503 ; CHECK-NEXT: [[R:%.*]] = and i32 [[B]], [[TMP1]]
504 ; CHECK-NEXT: ret i32 [[R]]
506 %a = udiv i32 42, %p1
507 %b = udiv i32 42, %p2
513 ; B ^ (B & A) --> ~A & B
514 ; The division ops are here to thwart complexity-based canonicalization: all ops are binops.
516 define i32 @and_xor_commute2(i32 %p1, i32 %p2) {
517 ; CHECK-LABEL: @and_xor_commute2(
518 ; CHECK-NEXT: [[A:%.*]] = udiv i32 42, [[P1:%.*]]
519 ; CHECK-NEXT: [[B:%.*]] = udiv i32 42, [[P2:%.*]]
520 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[A]], -1
521 ; CHECK-NEXT: [[R:%.*]] = and i32 [[B]], [[TMP1]]
522 ; CHECK-NEXT: ret i32 [[R]]
524 %a = udiv i32 42, %p1
525 %b = udiv i32 42, %p2
531 ; B ^ (B & A) --> ~A & B
532 ; The division ops are here to thwart complexity-based canonicalization: all ops are binops.
534 define i32 @and_xor_commute3(i32 %p1, i32 %p2) {
535 ; CHECK-LABEL: @and_xor_commute3(
536 ; CHECK-NEXT: [[A:%.*]] = udiv i32 42, [[P1:%.*]]
537 ; CHECK-NEXT: [[B:%.*]] = udiv i32 42, [[P2:%.*]]
538 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[A]], -1
539 ; CHECK-NEXT: [[R:%.*]] = and i32 [[B]], [[TMP1]]
540 ; CHECK-NEXT: ret i32 [[R]]
542 %a = udiv i32 42, %p1
543 %b = udiv i32 42, %p2
549 ; B ^ (B & A) --> ~A & B
550 ; The division ops are here to thwart complexity-based canonicalization: all ops are binops.
552 define i32 @and_xor_commute4(i32 %p1, i32 %p2) {
553 ; CHECK-LABEL: @and_xor_commute4(
554 ; CHECK-NEXT: [[A:%.*]] = udiv i32 42, [[P1:%.*]]
555 ; CHECK-NEXT: [[B:%.*]] = udiv i32 42, [[P2:%.*]]
556 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[A]], -1
557 ; CHECK-NEXT: [[R:%.*]] = and i32 [[B]], [[TMP1]]
558 ; CHECK-NEXT: ret i32 [[R]]
560 %a = udiv i32 42, %p1
561 %b = udiv i32 42, %p2
567 define i32 @and_xor_extra_use(i32 %a, i32 %b, i32* %p) {
568 ; CHECK-LABEL: @and_xor_extra_use(
569 ; CHECK-NEXT: [[O:%.*]] = and i32 [[A:%.*]], [[B:%.*]]
570 ; CHECK-NEXT: store i32 [[O]], i32* [[P:%.*]], align 4
571 ; CHECK-NEXT: [[R:%.*]] = xor i32 [[O]], [[B]]
572 ; CHECK-NEXT: ret i32 [[R]]
575 store i32 %o, i32* %p
580 ; (~X | C2) ^ C1 --> ((X & ~C2) ^ -1) ^ C1 --> (X & ~C2) ^ ~C1
581 ; The extra use (store) is here because the simpler case
582 ; may be transformed using demanded bits.
584 define i8 @xor_or_not(i8 %x, i8* %p) {
585 ; CHECK-LABEL: @xor_or_not(
586 ; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
587 ; CHECK-NEXT: store i8 [[NX]], i8* [[P:%.*]], align 1
588 ; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X]], -8
589 ; CHECK-NEXT: [[R:%.*]] = xor i8 [[TMP1]], -13
590 ; CHECK-NEXT: ret i8 [[R]]
599 ; Don't do this if the 'or' has extra uses.
601 define i8 @xor_or_not_uses(i8 %x, i8* %p) {
602 ; CHECK-LABEL: @xor_or_not_uses(
603 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[X:%.*]], 7
604 ; CHECK-NEXT: [[OR:%.*]] = xor i8 [[TMP1]], -8
605 ; CHECK-NEXT: store i8 [[OR]], i8* [[P:%.*]], align 1
606 ; CHECK-NEXT: [[R:%.*]] = xor i8 [[TMP1]], -12
607 ; CHECK-NEXT: ret i8 [[R]]
616 ; (~X & C2) ^ C1 --> ((X | ~C2) ^ -1) ^ C1 --> (X | ~C2) ^ ~C1
617 ; The extra use (store) is here because the simpler case
618 ; may be transformed using demanded bits.
620 define i8 @xor_and_not(i8 %x, i8* %p) {
621 ; CHECK-LABEL: @xor_and_not(
622 ; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
623 ; CHECK-NEXT: store i8 [[NX]], i8* [[P:%.*]], align 1
624 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[X]], -43
625 ; CHECK-NEXT: [[R:%.*]] = xor i8 [[TMP1]], -32
626 ; CHECK-NEXT: ret i8 [[R]]
630 %and = and i8 %nx, 42
635 ; Don't do this if the 'and' has extra uses.
637 define i8 @xor_and_not_uses(i8 %x, i8* %p) {
638 ; CHECK-LABEL: @xor_and_not_uses(
639 ; CHECK-NEXT: [[NX:%.*]] = and i8 [[X:%.*]], 42
640 ; CHECK-NEXT: [[AND:%.*]] = xor i8 [[NX]], 42
641 ; CHECK-NEXT: store i8 [[AND]], i8* [[P:%.*]], align 1
642 ; CHECK-NEXT: [[R:%.*]] = xor i8 [[NX]], 53
643 ; CHECK-NEXT: ret i8 [[R]]
646 %and = and i8 %nx, 42
647 store i8 %and, i8* %p
652 ; The tests 39-47 are related to the canonicalization:
653 ; %notx = xor i32 %x, -1
654 ; %cmp = icmp sgt i32 %notx, %y
655 ; %smax = select i1 %cmp, i32 %notx, i32 %y
656 ; %res = xor i32 %smax, -1
658 ; %noty = xor i32 %y, -1
659 ; %cmp2 = icmp slt %x, %noty
660 ; %res = select i1 %cmp2, i32 %x, i32 %noty
662 ; Same transformations is valid for smin/umax/umin.
664 define i32 @test39(i32 %x) {
665 ; CHECK-LABEL: @test39(
666 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 255
667 ; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 255
668 ; CHECK-NEXT: ret i32 [[RES]]
671 %2 = icmp sgt i32 %1, -256
672 %3 = select i1 %2, i32 %1, i32 -256
673 %res = xor i32 %3, -1
677 define i32 @test40(i32 %x, i32 %y) {
678 ; CHECK-LABEL: @test40(
679 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -1
680 ; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], [[X:%.*]]
681 ; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP2]], i32 [[X]], i32 [[TMP1]]
682 ; CHECK-NEXT: ret i32 [[RES]]
684 %notx = xor i32 %x, -1
685 %cmp1 = icmp sgt i32 %notx, %y
686 %smax = select i1 %cmp1, i32 %notx, i32 %y
687 %res = xor i32 %smax, -1
691 define i32 @test41(i32 %x, i32 %y) {
692 ; CHECK-LABEL: @test41(
693 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -1
694 ; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], [[X:%.*]]
695 ; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP2]], i32 [[X]], i32 [[TMP1]]
696 ; CHECK-NEXT: ret i32 [[RES]]
698 %notx = xor i32 %x, -1
699 %cmp1 = icmp slt i32 %notx, %y
700 %smin = select i1 %cmp1, i32 %notx, i32 %y
701 %res = xor i32 %smin, -1
705 define i32 @test42(i32 %x, i32 %y) {
706 ; CHECK-LABEL: @test42(
707 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -1
708 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i32 [[TMP1]], [[X:%.*]]
709 ; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP2]], i32 [[X]], i32 [[TMP1]]
710 ; CHECK-NEXT: ret i32 [[RES]]
712 %notx = xor i32 %x, -1
713 %cmp1 = icmp ugt i32 %notx, %y
714 %umax = select i1 %cmp1, i32 %notx, i32 %y
715 %res = xor i32 %umax, -1
719 define i32 @test43(i32 %x, i32 %y) {
720 ; CHECK-LABEL: @test43(
721 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -1
722 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], [[X:%.*]]
723 ; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP2]], i32 [[X]], i32 [[TMP1]]
724 ; CHECK-NEXT: ret i32 [[RES]]
726 %notx = xor i32 %x, -1
727 %cmp1 = icmp ult i32 %notx, %y
728 %umin = select i1 %cmp1, i32 %notx, i32 %y
729 %res = xor i32 %umin, -1
733 define i32 @test44(i32 %x, i32 %y) {
734 ; CHECK-LABEL: @test44(
735 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 -4, [[Y:%.*]]
736 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i32 [[TMP1]], [[X:%.*]]
737 ; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP2]], i32 [[TMP1]], i32 [[X]]
738 ; CHECK-NEXT: ret i32 [[RES]]
740 %z = add i32 %y, 3 ; thwart complexity-based canonicalization
741 %notx = xor i32 %x, -1
742 %cmp1 = icmp ult i32 %z, %notx
743 %umin = select i1 %cmp1, i32 %z, i32 %notx
744 %res = xor i32 %umin, -1
748 define i32 @test45(i32 %x, i32 %y) {
749 ; CHECK-LABEL: @test45(
750 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
751 ; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[Y]], i32 [[X]]
752 ; CHECK-NEXT: ret i32 [[TMP2]]
755 %notx = xor i32 %x, -1
756 %cmp1 = icmp ult i32 %z, %notx
757 %umin = select i1 %cmp1, i32 %z, i32 %notx
758 %res = xor i32 %umin, -1
762 ; Check that we work with splat vectors also.
763 define <4 x i32> @test46(<4 x i32> %x) {
764 ; CHECK-LABEL: @test46(
765 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <4 x i32> [[X:%.*]], <i32 255, i32 255, i32 255, i32 255>
766 ; CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[X]], <4 x i32> <i32 255, i32 255, i32 255, i32 255>
767 ; CHECK-NEXT: ret <4 x i32> [[TMP2]]
769 %1 = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
770 %2 = icmp sgt <4 x i32> %1, <i32 -256, i32 -256, i32 -256, i32 -256>
771 %3 = select <4 x i1> %2, <4 x i32> %1, <4 x i32> <i32 -256, i32 -256, i32 -256, i32 -256>
772 %4 = xor <4 x i32> %3, <i32 -1, i32 -1, i32 -1, i32 -1>
776 ; Test case when select pattern has more than one use.
777 define i32 @test47(i32 %x, i32 %y, i32 %z) {
778 ; CHECK-LABEL: @test47(
779 ; CHECK-NEXT: [[NOTX:%.*]] = xor i32 [[X:%.*]], -1
780 ; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[NOTX]], [[Y:%.*]]
781 ; CHECK-NEXT: [[UMAX:%.*]] = select i1 [[CMP1]], i32 [[NOTX]], i32 [[Y]]
782 ; CHECK-NEXT: [[UMIN:%.*]] = xor i32 [[UMAX]], -1
783 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[UMAX]], [[Z:%.*]]
784 ; CHECK-NEXT: [[RES:%.*]] = mul i32 [[ADD]], [[UMIN]]
785 ; CHECK-NEXT: ret i32 [[RES]]
787 %notx = xor i32 %x, -1
788 %cmp1 = icmp ugt i32 %notx, %y
789 %umax = select i1 %cmp1, i32 %notx, i32 %y
790 %umin = xor i32 %umax, -1
791 %add = add i32 %umax, %z
792 %res = mul i32 %umin, %add
796 define i32 @test48(i32 %x) {
797 ; CHECK-LABEL: @test48(
798 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1
799 ; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], -1
800 ; CHECK-NEXT: [[D:%.*]] = select i1 [[TMP2]], i32 [[TMP1]], i32 -1
801 ; CHECK-NEXT: ret i32 [[D]]
804 %b = icmp sgt i32 %a, 0
805 %c = select i1 %b, i32 %a, i32 0
810 define <2 x i32> @test48vec(<2 x i32> %x) {
811 ; CHECK-LABEL: @test48vec(
812 ; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X:%.*]], <i32 1, i32 1>
813 ; CHECK-NEXT: [[TMP2:%.*]] = icmp slt <2 x i32> [[TMP1]], <i32 -1, i32 -1>
814 ; CHECK-NEXT: [[D:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[TMP1]], <2 x i32> <i32 -1, i32 -1>
815 ; CHECK-NEXT: ret <2 x i32> [[D]]
817 %a = sub <2 x i32> <i32 -2, i32 -2>, %x
818 %b = icmp sgt <2 x i32> %a, zeroinitializer
819 %c = select <2 x i1> %b, <2 x i32> %a, <2 x i32> zeroinitializer
820 %d = xor <2 x i32> %c, <i32 -1, i32 -1>
824 define i32 @test49(i32 %x) {
825 ; CHECK-LABEL: @test49(
826 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 1, [[X:%.*]]
827 ; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], 0
828 ; CHECK-NEXT: [[D:%.*]] = select i1 [[TMP2]], i32 [[TMP1]], i32 0
829 ; CHECK-NEXT: ret i32 [[D]]
832 %b = icmp slt i32 %a, -1
833 %c = select i1 %b, i32 %a, i32 -1
838 define <2 x i32> @test49vec(<2 x i32> %x) {
839 ; CHECK-LABEL: @test49vec(
840 ; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i32> <i32 1, i32 1>, [[X:%.*]]
841 ; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt <2 x i32> [[TMP1]], zeroinitializer
842 ; CHECK-NEXT: [[D:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[TMP1]], <2 x i32> zeroinitializer
843 ; CHECK-NEXT: ret <2 x i32> [[D]]
845 %a = add <2 x i32> %x, <i32 -2, i32 -2>
846 %b = icmp slt <2 x i32> %a, <i32 -1, i32 -1>
847 %c = select <2 x i1> %b, <2 x i32> %a, <2 x i32> <i32 -1, i32 -1>
848 %d = xor <2 x i32> %c, <i32 -1, i32 -1>
852 define i32 @test50(i32 %x, i32 %y) {
853 ; CHECK-LABEL: @test50(
854 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 1, [[X:%.*]]
855 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[Y:%.*]], 1
856 ; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], [[TMP1]]
857 ; CHECK-NEXT: [[E:%.*]] = select i1 [[TMP3]], i32 [[TMP1]], i32 [[TMP2]]
858 ; CHECK-NEXT: ret i32 [[E]]
862 %c = icmp slt i32 %a, %b
863 %d = select i1 %c, i32 %a, i32 %b
868 define <2 x i32> @test50vec(<2 x i32> %x, <2 x i32> %y) {
869 ; CHECK-LABEL: @test50vec(
870 ; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i32> <i32 1, i32 1>, [[X:%.*]]
871 ; CHECK-NEXT: [[TMP2:%.*]] = add <2 x i32> [[Y:%.*]], <i32 1, i32 1>
872 ; CHECK-NEXT: [[TMP3:%.*]] = icmp slt <2 x i32> [[TMP2]], [[TMP1]]
873 ; CHECK-NEXT: [[E:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[TMP1]], <2 x i32> [[TMP2]]
874 ; CHECK-NEXT: ret <2 x i32> [[E]]
876 %a = add <2 x i32> %x, <i32 -2, i32 -2>
877 %b = sub <2 x i32> <i32 -2, i32 -2>, %y
878 %c = icmp slt <2 x i32> %a, %b
879 %d = select <2 x i1> %c, <2 x i32> %a, <2 x i32> %b
880 %e = xor <2 x i32> %d, <i32 -1, i32 -1>
884 define i32 @test51(i32 %x, i32 %y) {
885 ; CHECK-LABEL: @test51(
886 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 -3, [[X:%.*]]
887 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[Y:%.*]], -3
888 ; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], [[TMP1]]
889 ; CHECK-NEXT: [[E:%.*]] = select i1 [[TMP3]], i32 [[TMP1]], i32 [[TMP2]]
890 ; CHECK-NEXT: ret i32 [[E]]
894 %c = icmp sgt i32 %a, %b
895 %d = select i1 %c, i32 %a, i32 %b
900 define <2 x i32> @test51vec(<2 x i32> %x, <2 x i32> %y) {
901 ; CHECK-LABEL: @test51vec(
902 ; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i32> <i32 -3, i32 -3>, [[X:%.*]]
903 ; CHECK-NEXT: [[TMP2:%.*]] = add <2 x i32> [[Y:%.*]], <i32 -3, i32 -3>
904 ; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt <2 x i32> [[TMP2]], [[TMP1]]
905 ; CHECK-NEXT: [[E:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[TMP1]], <2 x i32> [[TMP2]]
906 ; CHECK-NEXT: ret <2 x i32> [[E]]
908 %a = add <2 x i32> %x, <i32 2, i32 2>
909 %b = sub <2 x i32> <i32 2, i32 2>, %y
910 %c = icmp sgt <2 x i32> %a, %b
911 %d = select <2 x i1> %c, <2 x i32> %a, <2 x i32> %b
912 %e = xor <2 x i32> %d, <i32 -1, i32 -1>