1 //===- X86DisassemblerShared.h - Emitter shared header ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef LLVM_UTILS_TABLEGEN_X86DISASSEMBLERSHARED_H
11 #define LLVM_UTILS_TABLEGEN_X86DISASSEMBLERSHARED_H
16 #include "llvm/Support/X86DisassemblerDecoderCommon.h"
18 struct InstructionSpecifier
{
19 llvm::X86Disassembler::OperandSpecifier
20 operands
[llvm::X86Disassembler::X86_MAX_OPERANDS
];
21 llvm::X86Disassembler::InstructionContext insnContext
;
24 InstructionSpecifier() {
25 insnContext
= llvm::X86Disassembler::IC
;
27 memset(operands
, 0, sizeof(operands
));
31 /// Specifies whether a ModR/M byte is needed and (if so) which
32 /// instruction each possible value of the ModR/M byte corresponds to. Once
33 /// this information is known, we have narrowed down to a single instruction.
34 struct ModRMDecision
{
36 llvm::X86Disassembler::InstrUID instructionIDs
[256];
39 /// Specifies which set of ModR/M->instruction tables to look at
40 /// given a particular opcode.
41 struct OpcodeDecision
{
42 ModRMDecision modRMDecisions
[256];
45 /// Specifies which opcode->instruction tables to look at given
46 /// a particular context (set of attributes). Since there are many possible
47 /// contexts, the decoder first uses CONTEXTS_SYM to determine which context
48 /// applies given a specific set of attributes. Hence there are only IC_max
49 /// entries in this table, rather than 2^(ATTR_max).
50 struct ContextDecision
{
51 OpcodeDecision opcodeDecisions
[llvm::X86Disassembler::IC_max
];
54 memset(opcodeDecisions
, 0, sizeof(opcodeDecisions
));