1 //=- AMDGPURegisterBank.td - Describe the AMDGPU Banks -------*- tablegen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 def SGPRRegBank : RegisterBank<"SGPR",
11 [SReg_32, SReg_64, SReg_128, SReg_256, SReg_512]
14 def VGPRRegBank : RegisterBank<"VGPR",
15 [VGPR_32, VReg_64, VReg_96, VReg_128, VReg_256, VReg_512]
18 def SCCRegBank : RegisterBank <"SCC", [SCC_CLASS ]>;