[PowerPC] Materialize more constants with CR-field set in late peephole
[llvm-core.git] / lib / Target / XCore / XCoreRegisterInfo.h
blobc31f5d5a7c44a01bab6aa8e8947e1b2ded91376b
1 //===-- XCoreRegisterInfo.h - XCore Register Information Impl ---*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the XCore implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_XCORE_XCOREREGISTERINFO_H
15 #define LLVM_LIB_TARGET_XCORE_XCOREREGISTERINFO_H
17 #include "llvm/CodeGen/TargetRegisterInfo.h"
19 #define GET_REGINFO_HEADER
20 #include "XCoreGenRegisterInfo.inc"
22 namespace llvm {
24 class TargetInstrInfo;
26 struct XCoreRegisterInfo : public XCoreGenRegisterInfo {
27 public:
28 XCoreRegisterInfo();
30 /// Code Generation virtual methods...
32 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
34 BitVector getReservedRegs(const MachineFunction &MF) const override;
36 bool enableMultipleCopyHints() const override { return true; }
38 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
40 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
42 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
44 void eliminateFrameIndex(MachineBasicBlock::iterator II,
45 int SPAdj, unsigned FIOperandNum,
46 RegScavenger *RS = nullptr) const override;
48 // Debug information queries.
49 unsigned getFrameRegister(const MachineFunction &MF) const override;
51 //! Return whether to emit frame moves
52 static bool needsFrameMoves(const MachineFunction &MF);
55 } // end namespace llvm
57 #endif