[ARM] Generate 8.1-m CSINC, CSNEG and CSINV instructions.
[llvm-core.git] / lib / ExecutionEngine / Orc / IRTransformLayer.cpp
blob845ecc71eb87089c76e5905fb9eb4321e5dfa145
1 //===-------------- IRTransformLayer.cpp - IR Transform Layer -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #include "llvm/ExecutionEngine/Orc/IRTransformLayer.h"
10 #include "llvm/Support/MemoryBuffer.h"
12 namespace llvm {
13 namespace orc {
15 IRTransformLayer::IRTransformLayer(ExecutionSession &ES,
16 IRLayer &BaseLayer,
17 TransformFunction Transform)
18 : IRLayer(ES), BaseLayer(BaseLayer), Transform(std::move(Transform)) {}
20 void IRTransformLayer::emit(MaterializationResponsibility R,
21 ThreadSafeModule TSM) {
22 assert(TSM && "Module must not be null");
24 if (auto TransformedTSM = Transform(std::move(TSM), R))
25 BaseLayer.emit(std::move(R), std::move(*TransformedTSM));
26 else {
27 R.failMaterialization();
28 getExecutionSession().reportError(TransformedTSM.takeError());
32 } // End namespace orc.
33 } // End namespace llvm.