1 ; RUN: llc -mtriple=mipsel-- -disable-mips-delay-filler -relocation-model=pic < %s | \
2 ; RUN: FileCheck %s -check-prefixes=PIC,CHECK
3 ; RUN: llc -mtriple=mipsel-- -relocation-model=static -disable-mips-delay-filler < \
4 ; RUN: %s | FileCheck %s -check-prefixes=STATIC,CHECK
5 ; RUN: llc -mtriple=mipsel-- -relocation-model=static -disable-mips-delay-filler \
6 ; RUN: -mips-fix-global-base-reg=false < %s | \
7 ; RUN: FileCheck %s -check-prefixes=STATICGP,CHECK
9 @t1 = thread_local global i32 0, align 4
11 define i32 @f1() nounwind {
13 %tmp = load i32, i32* @t1, align 4
17 ; PIC-DAG: addu $[[R0:[a-z0-9]+]], $2, $25
18 ; PIC-DAG: lw $25, %call16(__tls_get_addr)($[[R0]])
19 ; PIC-DAG: addiu $4, $[[R0]], %tlsgd(t1)
21 ; PIC-DAG: lw $2, 0($2)
24 ; STATIC: lui $[[R0:[0-9]+]], %tprel_hi(t1)
25 ; STATIC: addiu $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
26 ; STATIC: rdhwr $3, $29
27 ; STATIC: addu $[[R2:[0-9]+]], $3, $[[R1]]
28 ; STATIC: lw $2, 0($[[R2]])
32 @t2 = external thread_local global i32
34 define i32 @f2() nounwind {
36 %tmp = load i32, i32* @t2, align 4
40 ; PIC-DAG: addu $[[R0:[a-z0-9]+]], $2, $25
41 ; PIC-DAG: lw $25, %call16(__tls_get_addr)($[[R0]])
42 ; PIC-DAG: addiu $4, $[[R0]], %tlsgd(t2)
44 ; PIC-DAG: lw $2, 0($2)
47 ; STATICGP: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp)
48 ; STATICGP: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
49 ; STATICGP: lw ${{[0-9]+}}, %gottprel(t2)($[[GP]])
52 ; STATIC: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp)
53 ; STATIC: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
54 ; STATIC: rdhwr $3, $29
55 ; STATIC: lw $[[R0:[0-9]+]], %gottprel(t2)($[[GP]])
56 ; STATIC: addu $[[R1:[0-9]+]], $3, $[[R0]]
57 ; STATIC: lw $2, 0($[[R1]])
60 @f3.i = internal thread_local unnamed_addr global i32 1, align 4
62 define i32 @f3() nounwind {
66 ; PIC: addiu $4, ${{[a-z0-9]+}}, %tlsldm(f3.i)
68 ; PIC: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i)
69 ; PIC: addu $[[R1:[0-9]+]], $[[R0]], $2
70 ; PIC: lw ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]])
72 %0 = load i32, i32* @f3.i, align 4
73 %inc = add nsw i32 %0, 1
74 store i32 %inc, i32* @f3.i, align 4