1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3 ; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6 ; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
9 @glob = common local_unnamed_addr global i64 0, align 8
11 ; Function Attrs: norecurse nounwind readnone
12 define i64 @test_llequll(i64 %a, i64 %b) {
13 ; CHECK-LABEL: test_llequll:
14 ; CHECK: # BB#0: # %entry
15 ; CHECK-NEXT: xor r3, r3, r4
16 ; CHECK-NEXT: cntlzd r3, r3
17 ; CHECK-NEXT: rldicl r3, r3, 58, 63
20 %cmp = icmp eq i64 %a, %b
21 %conv1 = zext i1 %cmp to i64
25 ; Function Attrs: norecurse nounwind readnone
26 define i64 @test_llequll_sext(i64 %a, i64 %b) {
27 ; CHECK-LABEL: test_llequll_sext:
28 ; CHECK: # BB#0: # %entry
29 ; CHECK-NEXT: xor r3, r3, r4
30 ; CHECK-NEXT: addic r3, r3, -1
31 ; CHECK-NEXT: subfe r3, r3, r3
34 %cmp = icmp eq i64 %a, %b
35 %conv1 = sext i1 %cmp to i64
39 ; Function Attrs: norecurse nounwind readnone
40 define i64 @test_llequll_z(i64 %a) {
41 ; CHECK-LABEL: test_llequll_z:
42 ; CHECK: # BB#0: # %entry
43 ; CHECK-NEXT: cntlzd r3, r3
44 ; CHECK-NEXT: rldicl r3, r3, 58, 63
47 %cmp = icmp eq i64 %a, 0
48 %conv1 = zext i1 %cmp to i64
52 ; Function Attrs: norecurse nounwind readnone
53 define i64 @test_llequll_sext_z(i64 %a) {
54 ; CHECK-LABEL: test_llequll_sext_z:
55 ; CHECK: # BB#0: # %entry
56 ; CHECK-NEXT: addic r3, r3, -1
57 ; CHECK-NEXT: subfe r3, r3, r3
60 %cmp = icmp eq i64 %a, 0
61 %conv1 = sext i1 %cmp to i64
65 ; Function Attrs: norecurse nounwind
66 define void @test_llequll_store(i64 %a, i64 %b) {
67 ; CHECK-LABEL: test_llequll_store:
68 ; CHECK: # BB#0: # %entry
69 ; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
70 ; CHECK-NEXT: xor r3, r3, r4
71 ; CHECK-NEXT: ld r12, .LC0@toc@l(r5)
72 ; CHECK-NEXT: cntlzd r3, r3
73 ; CHECK-NEXT: rldicl r3, r3, 58, 63
74 ; CHECK-NEXT: std r3, 0(r12)
77 %cmp = icmp eq i64 %a, %b
78 %conv1 = zext i1 %cmp to i64
79 store i64 %conv1, i64* @glob, align 8
83 ; Function Attrs: norecurse nounwind
84 define void @test_llequll_sext_store(i64 %a, i64 %b) {
85 ; CHECK-LABEL: test_llequll_sext_store:
86 ; CHECK: # BB#0: # %entry
87 ; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
88 ; CHECK-NEXT: xor r3, r3, r4
89 ; CHECK-NEXT: ld r12, .LC0@toc@l(r5)
90 ; CHECK-NEXT: addic r3, r3, -1
91 ; CHECK-NEXT: subfe r3, r3, r3
92 ; CHECK-NEXT: std r3, 0(r12)
95 %cmp = icmp eq i64 %a, %b
96 %conv1 = sext i1 %cmp to i64
97 store i64 %conv1, i64* @glob, align 8
101 ; Function Attrs: norecurse nounwind
102 define void @test_llequll_z_store(i64 %a) {
103 ; CHECK-LABEL: test_llequll_z_store:
104 ; CHECK: # BB#0: # %entry
105 ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
106 ; CHECK-NEXT: cntlzd r3, r3
107 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
108 ; CHECK-NEXT: rldicl r3, r3, 58, 63
109 ; CHECK-NEXT: std r3, 0(r4)
112 %cmp = icmp eq i64 %a, 0
113 %conv1 = zext i1 %cmp to i64
114 store i64 %conv1, i64* @glob, align 8
118 ; Function Attrs: norecurse nounwind
119 define void @test_llequll_sext_z_store(i64 %a) {
120 ; CHECK-LABEL: test_llequll_sext_z_store:
121 ; CHECK: # BB#0: # %entry
122 ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
123 ; CHECK-NEXT: addic r3, r3, -1
124 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
125 ; CHECK-NEXT: subfe r3, r3, r3
126 ; CHECK-NEXT: std r3, 0(r4)
129 %cmp = icmp eq i64 %a, 0
130 %conv1 = sext i1 %cmp to i64
131 store i64 %conv1, i64* @glob, align 8