lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h

   1 //===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 /// \file
  11 /// Provides AMDGPU specific target descriptions.
  12 //
  13 //===----------------------------------------------------------------------===//
  14 //
  15
  16 #ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCTARGETDESC_H
  17 #define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCTARGETDESC_H
  18
  19 #include "llvm/Support/DataTypes.h"
  20
  21 #include <memory>
  22
  23 namespace llvm {
  24 class MCAsmBackend;
  25 class MCCodeEmitter;
  26 class MCContext;
  27 class MCInstrInfo;
  28 class MCObjectTargetWriter;
  29 class MCRegisterInfo;
  30 class MCSubtargetInfo;
  31 class MCTargetOptions;
  32 class StringRef;
  33 class Target;
  34 class Triple;
  35 class raw_pwrite_stream;
  36
  37 Target &getTheAMDGPUTarget();
  38 Target &getTheGCNTarget();
  39
  40 MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII,
  41                                        const MCRegisterInfo &MRI,
  42                                        MCContext &Ctx);
  43 MCInstrInfo *createR600MCInstrInfo();
  44
  45 MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
  46                                      const MCRegisterInfo &MRI,
  47                                      MCContext &Ctx);
  48
  49 MCAsmBackend *createAMDGPUAsmBackend(const Target &T,
  50                                      const MCSubtargetInfo &STI,
  51                                      const MCRegisterInfo &MRI,
  52                                      const MCTargetOptions &Options);
  53
  54 std::unique_ptr<MCObjectTargetWriter>
  55 createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI,
  56                             bool HasRelocationAddend);
  57 } // End llvm namespace
  58
  59 #define GET_REGINFO_ENUM
  60 #include "AMDGPUGenRegisterInfo.inc"
  61 #undef GET_REGINFO_ENUM
  62
  63 #define GET_REGINFO_ENUM
  64 #include "R600GenRegisterInfo.inc"
  65 #undef GET_REGINFO_ENUM
  66
  67 #define GET_INSTRINFO_ENUM
  68 #define GET_INSTRINFO_OPERAND_ENUM
  69 #define GET_INSTRINFO_SCHED_ENUM
  70 #include "AMDGPUGenInstrInfo.inc"
  71 #undef GET_INSTRINFO_SCHED_ENUM
  72 #undef GET_INSTRINFO_OPERAND_ENUM
  73 #undef GET_INSTRINFO_ENUM
  74
  75 #define GET_INSTRINFO_ENUM
  76 #define GET_INSTRINFO_OPERAND_ENUM
  77 #define GET_INSTRINFO_SCHED_ENUM
  78 #include "R600GenInstrInfo.inc"
  79 #undef GET_INSTRINFO_SCHED_ENUM
  80 #undef GET_INSTRINFO_OPERAND_ENUM
  81 #undef GET_INSTRINFO_ENUM
  82
  83 #define GET_SUBTARGETINFO_ENUM
  84 #include "AMDGPUGenSubtargetInfo.inc"
  85 #undef GET_SUBTARGETINFO_ENUM
  86
  87 #define GET_SUBTARGETINFO_ENUM
  88 #include "R600GenSubtargetInfo.inc"
  89 #undef GET_SUBTARGETINFO_ENUM
  90
  91 #endif