[PowerPC] Do not emit record-form rotates when record-form andi/andis suffices
[llvm-core.git] / lib / Target / AMDGPU / SIFrameLowering.h
blob2f35b3631cdc37e27847d4b4e006edc2e220aa4c
1 //===--------------------- SIFrameLowering.h --------------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
10 #ifndef LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
11 #define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
13 #include "AMDGPUFrameLowering.h"
15 namespace llvm {
17 class SIInstrInfo;
18 class SIMachineFunctionInfo;
19 class SIRegisterInfo;
20 class GCNSubtarget;
22 class SIFrameLowering final : public AMDGPUFrameLowering {
23 public:
24 SIFrameLowering(StackDirection D, unsigned StackAl, int LAO,
25 unsigned TransAl = 1) :
26 AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
27 ~SIFrameLowering() override = default;
29 void emitEntryFunctionPrologue(MachineFunction &MF,
30 MachineBasicBlock &MBB) const;
31 void emitPrologue(MachineFunction &MF,
32 MachineBasicBlock &MBB) const override;
33 void emitEpilogue(MachineFunction &MF,
34 MachineBasicBlock &MBB) const override;
35 int getFrameIndexReference(const MachineFunction &MF, int FI,
36 unsigned &FrameReg) const override;
38 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
39 RegScavenger *RS = nullptr) const override;
41 void processFunctionBeforeFrameFinalized(
42 MachineFunction &MF,
43 RegScavenger *RS = nullptr) const override;
45 MachineBasicBlock::iterator
46 eliminateCallFramePseudoInstr(MachineFunction &MF,
47 MachineBasicBlock &MBB,
48 MachineBasicBlock::iterator MI) const override;
50 private:
51 void emitFlatScratchInit(const GCNSubtarget &ST,
52 MachineFunction &MF,
53 MachineBasicBlock &MBB) const;
55 unsigned getReservedPrivateSegmentBufferReg(
56 const GCNSubtarget &ST,
57 const SIInstrInfo *TII,
58 const SIRegisterInfo *TRI,
59 SIMachineFunctionInfo *MFI,
60 MachineFunction &MF) const;
62 std::pair<unsigned, unsigned> getReservedPrivateSegmentWaveByteOffsetReg(
63 const GCNSubtarget &ST,
64 const SIInstrInfo *TII,
65 const SIRegisterInfo *TRI,
66 SIMachineFunctionInfo *MFI,
67 MachineFunction &MF) const;
69 /// Emits debugger prologue.
70 void emitDebuggerPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const;
72 // Emit scratch setup code for AMDPAL or Mesa, assuming ResourceRegUsed is set.
73 void emitEntryFunctionScratchSetup(const GCNSubtarget &ST, MachineFunction &MF,
74 MachineBasicBlock &MBB, SIMachineFunctionInfo *MFI,
75 MachineBasicBlock::iterator I, unsigned PreloadedPrivateBufferReg,
76 unsigned ScratchRsrcReg) const;
78 public:
79 bool hasFP(const MachineFunction &MF) const override;
80 bool hasSP(const MachineFunction &MF) const;
83 } // end namespace llvm
85 #endif // LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H