[PowerPC] Do not emit record-form rotates when record-form andi/andis suffices
[llvm-core.git] / lib / Target / Mips / MipsSEISelDAGToDAG.h
blobeb3657aae05002c3d821f4b527c4588df9a41a72
1 //===-- MipsSEISelDAGToDAG.h - A Dag to Dag Inst Selector for MipsSE -----===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Subclass of MipsDAGToDAGISel specialized for mips32/64.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H
17 #include "MipsISelDAGToDAG.h"
19 namespace llvm {
21 class MipsSEDAGToDAGISel : public MipsDAGToDAGISel {
23 public:
24 explicit MipsSEDAGToDAGISel(MipsTargetMachine &TM, CodeGenOpt::Level OL)
25 : MipsDAGToDAGISel(TM, OL) {}
27 private:
29 bool runOnMachineFunction(MachineFunction &MF) override;
31 void getAnalysisUsage(AnalysisUsage &AU) const override;
33 void addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI,
34 MachineFunction &MF);
36 unsigned getMSACtrlReg(const SDValue RegIdx) const;
38 bool replaceUsesWithZeroReg(MachineRegisterInfo *MRI, const MachineInstr&);
40 std::pair<SDNode *, SDNode *> selectMULT(SDNode *N, unsigned Opc,
41 const SDLoc &dl, EVT Ty, bool HasLo,
42 bool HasHi);
44 void selectAddE(SDNode *Node, const SDLoc &DL) const;
46 bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const;
47 bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset,
48 unsigned OffsetBits,
49 unsigned ShiftAmount) const;
51 bool selectAddrRegImm(SDValue Addr, SDValue &Base,
52 SDValue &Offset) const override;
54 bool selectAddrDefault(SDValue Addr, SDValue &Base,
55 SDValue &Offset) const override;
57 bool selectIntAddr(SDValue Addr, SDValue &Base,
58 SDValue &Offset) const override;
60 bool selectAddrRegImm9(SDValue Addr, SDValue &Base,
61 SDValue &Offset) const;
63 bool selectAddrRegImm11(SDValue Addr, SDValue &Base,
64 SDValue &Offset) const;
66 bool selectAddrRegImm12(SDValue Addr, SDValue &Base,
67 SDValue &Offset) const;
69 bool selectAddrRegImm16(SDValue Addr, SDValue &Base,
70 SDValue &Offset) const;
72 bool selectIntAddr11MM(SDValue Addr, SDValue &Base,
73 SDValue &Offset) const override;
75 bool selectIntAddr12MM(SDValue Addr, SDValue &Base,
76 SDValue &Offset) const override;
78 bool selectIntAddr16MM(SDValue Addr, SDValue &Base,
79 SDValue &Offset) const override;
81 bool selectIntAddrLSL2MM(SDValue Addr, SDValue &Base,
82 SDValue &Offset) const override;
84 bool selectIntAddrSImm10(SDValue Addr, SDValue &Base,
85 SDValue &Offset) const override;
87 bool selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base,
88 SDValue &Offset) const override;
90 bool selectIntAddrSImm10Lsl2(SDValue Addr, SDValue &Base,
91 SDValue &Offset) const override;
93 bool selectIntAddrSImm10Lsl3(SDValue Addr, SDValue &Base,
94 SDValue &Offset) const override;
96 /// Select constant vector splats.
97 bool selectVSplat(SDNode *N, APInt &Imm,
98 unsigned MinSizeInBits) const override;
99 /// Select constant vector splats whose value fits in a given integer.
100 bool selectVSplatCommon(SDValue N, SDValue &Imm, bool Signed,
101 unsigned ImmBitSize) const;
102 /// Select constant vector splats whose value fits in a uimm1.
103 bool selectVSplatUimm1(SDValue N, SDValue &Imm) const override;
104 /// Select constant vector splats whose value fits in a uimm2.
105 bool selectVSplatUimm2(SDValue N, SDValue &Imm) const override;
106 /// Select constant vector splats whose value fits in a uimm3.
107 bool selectVSplatUimm3(SDValue N, SDValue &Imm) const override;
108 /// Select constant vector splats whose value fits in a uimm4.
109 bool selectVSplatUimm4(SDValue N, SDValue &Imm) const override;
110 /// Select constant vector splats whose value fits in a uimm5.
111 bool selectVSplatUimm5(SDValue N, SDValue &Imm) const override;
112 /// Select constant vector splats whose value fits in a uimm6.
113 bool selectVSplatUimm6(SDValue N, SDValue &Imm) const override;
114 /// Select constant vector splats whose value fits in a uimm8.
115 bool selectVSplatUimm8(SDValue N, SDValue &Imm) const override;
116 /// Select constant vector splats whose value fits in a simm5.
117 bool selectVSplatSimm5(SDValue N, SDValue &Imm) const override;
118 /// Select constant vector splats whose value is a power of 2.
119 bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const override;
120 /// Select constant vector splats whose value is the inverse of a
121 /// power of 2.
122 bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const override;
123 /// Select constant vector splats whose value is a run of set bits
124 /// ending at the most significant bit
125 bool selectVSplatMaskL(SDValue N, SDValue &Imm) const override;
126 /// Select constant vector splats whose value is a run of set bits
127 /// starting at bit zero.
128 bool selectVSplatMaskR(SDValue N, SDValue &Imm) const override;
130 bool trySelect(SDNode *Node) override;
132 void processFunctionAfterISel(MachineFunction &MF) override;
134 // Insert instructions to initialize the global base register in the
135 // first MBB of the function.
136 void initGlobalBaseReg(MachineFunction &MF);
138 bool SelectInlineAsmMemoryOperand(const SDValue &Op,
139 unsigned ConstraintID,
140 std::vector<SDValue> &OutOps) override;
143 FunctionPass *createMipsSEISelDag(MipsTargetMachine &TM,
144 CodeGenOpt::Level OptLevel);
147 #endif