[PowerPC] Do not emit record-form rotates when record-form andi/andis suffices
[llvm-core.git] / lib / Target / SystemZ / SystemZSubtarget.cpp
blobfb030a207bc755db4eab5a3b45cb65859dfa3388
1 //===-- SystemZSubtarget.cpp - SystemZ subtarget information --------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
10 #include "SystemZSubtarget.h"
11 #include "MCTargetDesc/SystemZMCTargetDesc.h"
12 #include "llvm/IR/GlobalValue.h"
14 using namespace llvm;
16 #define DEBUG_TYPE "systemz-subtarget"
18 #define GET_SUBTARGETINFO_TARGET_DESC
19 #define GET_SUBTARGETINFO_CTOR
20 #include "SystemZGenSubtargetInfo.inc"
22 static cl::opt<bool> UseSubRegLiveness(
23 "systemz-subreg-liveness",
24 cl::desc("Enable subregister liveness tracking for SystemZ (experimental)"),
25 cl::Hidden);
27 // Pin the vtable to this file.
28 void SystemZSubtarget::anchor() {}
30 SystemZSubtarget &
31 SystemZSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) {
32 std::string CPUName = CPU;
33 if (CPUName.empty())
34 CPUName = "generic";
35 // Parse features string.
36 ParseSubtargetFeatures(CPUName, FS);
37 return *this;
40 SystemZSubtarget::SystemZSubtarget(const Triple &TT, const std::string &CPU,
41 const std::string &FS,
42 const TargetMachine &TM)
43 : SystemZGenSubtargetInfo(TT, CPU, FS), HasDistinctOps(false),
44 HasLoadStoreOnCond(false), HasHighWord(false), HasFPExtension(false),
45 HasPopulationCount(false), HasMessageSecurityAssist3(false),
46 HasMessageSecurityAssist4(false), HasResetReferenceBitsMultiple(false),
47 HasFastSerialization(false), HasInterlockedAccess1(false),
48 HasMiscellaneousExtensions(false),
49 HasExecutionHint(false), HasLoadAndTrap(false),
50 HasTransactionalExecution(false), HasProcessorAssist(false),
51 HasDFPZonedConversion(false), HasEnhancedDAT2(false),
52 HasVector(false), HasLoadStoreOnCond2(false),
53 HasLoadAndZeroRightmostByte(false), HasMessageSecurityAssist5(false),
54 HasDFPPackedConversion(false),
55 HasMiscellaneousExtensions2(false), HasGuardedStorage(false),
56 HasMessageSecurityAssist7(false), HasMessageSecurityAssist8(false),
57 HasVectorEnhancements1(false), HasVectorPackedDecimal(false),
58 HasInsertReferenceBitsMultiple(false),
59 TargetTriple(TT), InstrInfo(initializeSubtargetDependencies(CPU, FS)),
60 TLInfo(TM, *this), TSInfo(), FrameLowering() {}
63 bool SystemZSubtarget::enableSubRegLiveness() const {
64 return UseSubRegLiveness;
67 bool SystemZSubtarget::isPC32DBLSymbol(const GlobalValue *GV,
68 CodeModel::Model CM) const {
69 // PC32DBL accesses require the low bit to be clear. Note that a zero
70 // value selects the default alignment and is therefore OK.
71 if (GV->getAlignment() == 1)
72 return false;
74 // For the small model, all locally-binding symbols are in range.
75 if (CM == CodeModel::Small)
76 return TLInfo.getTargetMachine().shouldAssumeDSOLocal(*GV->getParent(), GV);
78 // For Medium and above, assume that the symbol is not within the 4GB range.
79 // Taking the address of locally-defined text would be OK, but that
80 // case isn't easy to detect.
81 return false;