lib/Target/X86/X86RegisterInfo.h

   1 //===-- X86RegisterInfo.h - X86 Register Information Impl -------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the X86 implementation of the TargetRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef LLVM_LIB_TARGET_X86_X86REGISTERINFO_H
  15 #define LLVM_LIB_TARGET_X86_X86REGISTERINFO_H
  16
  17 #include "llvm/CodeGen/TargetRegisterInfo.h"
  18
  19 #define GET_REGINFO_HEADER
  20 #include "X86GenRegisterInfo.inc"
  21
  22 namespace llvm {
  23   class Triple;
  24
  25 class X86RegisterInfo final : public X86GenRegisterInfo {
  26 private:
  27   /// Is64Bit - Is the target 64-bits.
  28   ///
  29   bool Is64Bit;
  30
  31   /// IsWin64 - Is the target on of win64 flavours
  32   ///
  33   bool IsWin64;
  34
  35   /// SlotSize - Stack slot size in bytes.
  36   ///
  37   unsigned SlotSize;
  38
  39   /// StackPtr - X86 physical register used as stack ptr.
  40   ///
  41   unsigned StackPtr;
  42
  43   /// FramePtr - X86 physical register used as frame ptr.
  44   ///
  45   unsigned FramePtr;
  46
  47   /// BasePtr - X86 physical register used as a base ptr in complex stack
  48   /// frames. I.e., when we need a 3rd base, not just SP and FP, due to
  49   /// variable size stack objects.
  50   unsigned BasePtr;
  51
  52 public:
  53   X86RegisterInfo(const Triple &TT);
  54
  55   // FIXME: This should be tablegen'd like getDwarfRegNum is
  56   int getSEHRegNum(unsigned i) const;
  57
  58   /// Code Generation virtual methods...
  59   ///
  60   bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
  61
  62   /// getMatchingSuperRegClass - Return a subclass of the specified register
  63   /// class A so that each register in it has a sub-register of the
  64   /// specified sub-register index which is in the specified register class B.
  65   const TargetRegisterClass *
  66   getMatchingSuperRegClass(const TargetRegisterClass *A,
  67                            const TargetRegisterClass *B,
  68                            unsigned Idx) const override;
  69
  70   const TargetRegisterClass *
  71   getSubClassWithSubReg(const TargetRegisterClass *RC,
  72                         unsigned Idx) const override;
  73
  74   const TargetRegisterClass *
  75   getLargestLegalSuperClass(const TargetRegisterClass *RC,
  76                             const MachineFunction &MF) const override;
  77
  78   /// getPointerRegClass - Returns a TargetRegisterClass used for pointer
  79   /// values.
  80   const TargetRegisterClass *
  81   getPointerRegClass(const MachineFunction &MF,
  82                      unsigned Kind = 0) const override;
  83
  84   /// getCrossCopyRegClass - Returns a legal register class to copy a register
  85   /// in the specified class to or from. Returns NULL if it is possible to copy
  86   /// between a two registers of the specified class.
  87   const TargetRegisterClass *
  88   getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
  89
  90   /// getGPRsForTailCall - Returns a register class with registers that can be
  91   /// used in forming tail calls.
  92   const TargetRegisterClass *
  93   getGPRsForTailCall(const MachineFunction &MF) const;
  94
  95   unsigned getRegPressureLimit(const TargetRegisterClass *RC,
  96                                MachineFunction &MF) const override;
  97
  98   /// getCalleeSavedRegs - Return a null-terminated list of all of the
  99   /// callee-save registers on this target.
 100   const MCPhysReg *
 101   getCalleeSavedRegs(const MachineFunction* MF) const override;
 102   const MCPhysReg *
 103   getCalleeSavedRegsViaCopy(const MachineFunction *MF) const;
 104   const uint32_t *getCallPreservedMask(const MachineFunction &MF,
 105                                        CallingConv::ID) const override;
 106   const uint32_t *getNoPreservedMask() const override;
 107
 108   // Calls involved in thread-local variable lookup save more registers than
 109   // normal calls, so they need a different mask to represent this.
 110   const uint32_t *getDarwinTLSCallPreservedMask() const;
 111
 112   /// getReservedRegs - Returns a bitset indexed by physical register number
 113   /// indicating if a register is a special register that has particular uses and
 114   /// should be considered unavailable at all times, e.g. SP, RA. This is used by
 115   /// register scavenger to determine what registers are free.
 116   BitVector getReservedRegs(const MachineFunction &MF) const override;
 117
 118   void adjustStackMapLiveOutMask(uint32_t *Mask) const override;
 119
 120   bool hasBasePointer(const MachineFunction &MF) const;
 121
 122   bool canRealignStack(const MachineFunction &MF) const override;
 123
 124   bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
 125                             int &FrameIdx) const override;
 126
 127   void eliminateFrameIndex(MachineBasicBlock::iterator MI,
 128                            int SPAdj, unsigned FIOperandNum,
 129                            RegScavenger *RS = nullptr) const override;
 130
 131   // Debug information queries.
 132   unsigned getFrameRegister(const MachineFunction &MF) const override;
 133   unsigned getPtrSizedFrameRegister(const MachineFunction &MF) const;
 134   unsigned getStackRegister() const { return StackPtr; }
 135   unsigned getBaseRegister() const { return BasePtr; }
 136   /// Returns physical register used as frame pointer.
 137   /// This will always returns the frame pointer register, contrary to
 138   /// getFrameRegister() which returns the "base pointer" in situations
 139   /// involving a stack, frame and base pointer.
 140   unsigned getFramePtr() const { return FramePtr; }
 141   // FIXME: Move to FrameInfok
 142   unsigned getSlotSize() const { return SlotSize; }
 143 };
 144
 145 } // End llvm namespace
 146
 147 #endif