[ARM] MVE integer min and max
[llvm-core.git] / lib / Target / PowerPC / PPCMachineScheduler.h
blob93532d9545a6e57f59f4bc810ec8562dcc953488
1 //===- PPCMachineScheduler.h - Custom PowerPC MI scheduler --*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Custom PowerPC MI scheduler.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_POWERPC_POWERPCMACHINESCHEDULER_H
14 #define LLVM_LIB_TARGET_POWERPC_POWERPCMACHINESCHEDULER_H
16 #include "llvm/CodeGen/MachineScheduler.h"
18 namespace llvm {
20 /// A MachineSchedStrategy implementation for PowerPC pre RA scheduling.
21 class PPCPreRASchedStrategy : public GenericScheduler {
22 public:
23 PPCPreRASchedStrategy(const MachineSchedContext *C) :
24 GenericScheduler(C) {}
25 protected:
26 void tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand,
27 SchedBoundary *Zone) const override;
28 private:
29 bool biasAddiLoadCandidate(SchedCandidate &Cand,
30 SchedCandidate &TryCand,
31 SchedBoundary &Zone) const;
34 /// A MachineSchedStrategy implementation for PowerPC post RA scheduling.
35 class PPCPostRASchedStrategy : public PostGenericScheduler {
36 public:
37 PPCPostRASchedStrategy(const MachineSchedContext *C) :
38 PostGenericScheduler(C) {}
40 protected:
41 void initialize(ScheduleDAGMI *Dag) override;
42 SUnit *pickNode(bool &IsTopNode) override;
43 void enterMBB(MachineBasicBlock *MBB) override;
44 void leaveMBB() override;
47 } // end namespace llvm
49 #endif // LLVM_LIB_TARGET_POWERPC_POWERPCMACHINESCHEDULER_H