1 //===-- X86PfmCounters.td - X86 Hardware Counters ----------*- tablegen -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This describes the available hardware counters for various subtargets.
11 //===----------------------------------------------------------------------===//
13 def UnhaltedCoreCyclesPfmCounter : PfmCounter<"unhalted_core_cycles">;
14 def UopsIssuedPfmCounter : PfmCounter<"uops_issued:any">;
16 // No default counters on X86.
17 def DefaultPfmCounters : ProcPfmCounters {}
18 def : PfmCountersDefaultBinding<DefaultPfmCounters>;
20 // Intel X86 Counters.
21 def PentiumPfmCounters : ProcPfmCounters {
22 let CycleCounter = PfmCounter<"cpu_clk_unhalted">;
23 let UopsCounter = PfmCounter<"uops_retired">;
25 def : PfmCountersBinding<"pentiumpro", PentiumPfmCounters>;
26 def : PfmCountersBinding<"pentium2", PentiumPfmCounters>;
27 def : PfmCountersBinding<"pentium3", PentiumPfmCounters>;
28 def : PfmCountersBinding<"pentium3m", PentiumPfmCounters>;
29 def : PfmCountersBinding<"pentium-m", PentiumPfmCounters>;
31 def CorePfmCounters : ProcPfmCounters {
32 let CycleCounter = UnhaltedCoreCyclesPfmCounter;
33 let UopsCounter = PfmCounter<"uops_retired:any">;
35 def : PfmCountersBinding<"yonah", CorePfmCounters>;
36 def : PfmCountersBinding<"prescott", CorePfmCounters>;
37 def : PfmCountersBinding<"core2", CorePfmCounters>;
38 def : PfmCountersBinding<"penryn", CorePfmCounters>;
39 def : PfmCountersBinding<"nehalem", CorePfmCounters>;
40 def : PfmCountersBinding<"corei7", CorePfmCounters>;
41 def : PfmCountersBinding<"westmere", CorePfmCounters>;
43 def AtomPfmCounters : ProcPfmCounters {
44 let CycleCounter = UnhaltedCoreCyclesPfmCounter;
45 let UopsCounter = PfmCounter<"uops_retired:any">;
47 def : PfmCountersBinding<"bonnell", AtomPfmCounters>;
48 def : PfmCountersBinding<"atom", AtomPfmCounters>;
50 def SLMPfmCounters : ProcPfmCounters {
51 let CycleCounter = UnhaltedCoreCyclesPfmCounter;
52 let UopsCounter = PfmCounter<"uops_retired:any">;
54 def : PfmCountersBinding<"silvermont", SLMPfmCounters>;
55 def : PfmCountersBinding<"goldmont", SLMPfmCounters>;
56 def : PfmCountersBinding<"goldmont-plus", SLMPfmCounters>;
57 def : PfmCountersBinding<"tremont", SLMPfmCounters>;
59 def KnightPfmCounters : ProcPfmCounters {
60 let CycleCounter = UnhaltedCoreCyclesPfmCounter;
61 let UopsCounter = PfmCounter<"uops_retired:all">;
63 def : PfmCountersBinding<"knl", KnightPfmCounters>;
64 def : PfmCountersBinding<"knm", KnightPfmCounters>;
66 def SandyBridgePfmCounters : ProcPfmCounters {
67 let CycleCounter = UnhaltedCoreCyclesPfmCounter;
68 let UopsCounter = UopsIssuedPfmCounter;
70 PfmIssueCounter<"SBPort0", "uops_dispatched_port:port_0">,
71 PfmIssueCounter<"SBPort1", "uops_dispatched_port:port_1">,
72 PfmIssueCounter<"SBPort23", "uops_dispatched_port:port_2 + uops_dispatched_port:port_3">,
73 PfmIssueCounter<"SBPort4", "uops_dispatched_port:port_4">,
74 PfmIssueCounter<"SBPort5", "uops_dispatched_port:port_5">
77 def : PfmCountersBinding<"sandybridge", SandyBridgePfmCounters>;
78 def : PfmCountersBinding<"ivybridge", SandyBridgePfmCounters>;
80 def HaswellPfmCounters : ProcPfmCounters {
81 let CycleCounter = UnhaltedCoreCyclesPfmCounter;
82 let UopsCounter = UopsIssuedPfmCounter;
84 PfmIssueCounter<"HWPort0", "uops_dispatched_port:port_0">,
85 PfmIssueCounter<"HWPort1", "uops_dispatched_port:port_1">,
86 PfmIssueCounter<"HWPort2", "uops_dispatched_port:port_2">,
87 PfmIssueCounter<"HWPort3", "uops_dispatched_port:port_3">,
88 PfmIssueCounter<"HWPort4", "uops_dispatched_port:port_4">,
89 PfmIssueCounter<"HWPort5", "uops_dispatched_port:port_5">,
90 PfmIssueCounter<"HWPort6", "uops_dispatched_port:port_6">,
91 PfmIssueCounter<"HWPort7", "uops_dispatched_port:port_7">
94 def : PfmCountersBinding<"haswell", HaswellPfmCounters>;
96 def BroadwellPfmCounters : ProcPfmCounters {
97 let CycleCounter = UnhaltedCoreCyclesPfmCounter;
98 let UopsCounter = UopsIssuedPfmCounter;
100 PfmIssueCounter<"BWPort0", "uops_executed_port:port_0">,
101 PfmIssueCounter<"BWPort1", "uops_executed_port:port_1">,
102 PfmIssueCounter<"BWPort2", "uops_executed_port:port_2">,
103 PfmIssueCounter<"BWPort3", "uops_executed_port:port_3">,
104 PfmIssueCounter<"BWPort4", "uops_executed_port:port_4">,
105 PfmIssueCounter<"BWPort5", "uops_executed_port:port_5">,
106 PfmIssueCounter<"BWPort6", "uops_executed_port:port_6">,
107 PfmIssueCounter<"BWPort7", "uops_executed_port:port_7">
110 def : PfmCountersBinding<"broadwell", BroadwellPfmCounters>;
112 def SkylakeClientPfmCounters : ProcPfmCounters {
113 let CycleCounter = UnhaltedCoreCyclesPfmCounter;
114 let UopsCounter = UopsIssuedPfmCounter;
115 let IssueCounters = [
116 PfmIssueCounter<"SKLPort0", "uops_dispatched_port:port_0">,
117 PfmIssueCounter<"SKLPort1", "uops_dispatched_port:port_1">,
118 PfmIssueCounter<"SKLPort2", "uops_dispatched_port:port_2">,
119 PfmIssueCounter<"SKLPort3", "uops_dispatched_port:port_3">,
120 PfmIssueCounter<"SKLPort4", "uops_dispatched_port:port_4">,
121 PfmIssueCounter<"SKLPort5", "uops_dispatched_port:port_5">,
122 PfmIssueCounter<"SKLPort6", "uops_dispatched_port:port_6">,
123 PfmIssueCounter<"SKLPort7", "uops_dispatched_port:port_7">
126 def : PfmCountersBinding<"skylake", SkylakeClientPfmCounters>;
128 def SkylakeServerPfmCounters : ProcPfmCounters {
129 let CycleCounter = UnhaltedCoreCyclesPfmCounter;
130 let UopsCounter = UopsIssuedPfmCounter;
131 let IssueCounters = [
132 PfmIssueCounter<"SKXPort0", "uops_dispatched_port:port_0">,
133 PfmIssueCounter<"SKXPort1", "uops_dispatched_port:port_1">,
134 PfmIssueCounter<"SKXPort2", "uops_dispatched_port:port_2">,
135 PfmIssueCounter<"SKXPort3", "uops_dispatched_port:port_3">,
136 PfmIssueCounter<"SKXPort4", "uops_dispatched_port:port_4">,
137 PfmIssueCounter<"SKXPort5", "uops_dispatched_port:port_5">,
138 PfmIssueCounter<"SKXPort6", "uops_dispatched_port:port_6">,
139 PfmIssueCounter<"SKXPort7", "uops_dispatched_port:port_7">
142 def : PfmCountersBinding<"skylake-avx512", SkylakeServerPfmCounters>;
143 def : PfmCountersBinding<"cascadelake", SkylakeServerPfmCounters>;
144 def : PfmCountersBinding<"cannonlake", SkylakeServerPfmCounters>;
145 def : PfmCountersBinding<"icelake-client", SkylakeServerPfmCounters>;
146 def : PfmCountersBinding<"icelake-server", SkylakeServerPfmCounters>;
149 // Set basic counters for AMD cpus that we know libpfm4 supports.
150 def DefaultAMDPfmCounters : ProcPfmCounters {
151 let CycleCounter = PfmCounter<"cpu_clk_unhalted">;
152 let UopsCounter = PfmCounter<"retired_uops">;
154 def : PfmCountersBinding<"athlon", DefaultAMDPfmCounters>;
155 def : PfmCountersBinding<"athlon-tbird", DefaultAMDPfmCounters>;
156 def : PfmCountersBinding<"athlon-4", DefaultAMDPfmCounters>;
157 def : PfmCountersBinding<"athlon-xp", DefaultAMDPfmCounters>;
158 def : PfmCountersBinding<"athlon-mp", DefaultAMDPfmCounters>;
159 def : PfmCountersBinding<"k8", DefaultAMDPfmCounters>;
160 def : PfmCountersBinding<"opteron", DefaultAMDPfmCounters>;
161 def : PfmCountersBinding<"athlon64", DefaultAMDPfmCounters>;
162 def : PfmCountersBinding<"athlon-fx", DefaultAMDPfmCounters>;
163 def : PfmCountersBinding<"k8-sse3", DefaultAMDPfmCounters>;
164 def : PfmCountersBinding<"opteron-sse3", DefaultAMDPfmCounters>;
165 def : PfmCountersBinding<"athlon64-sse3", DefaultAMDPfmCounters>;
166 def : PfmCountersBinding<"amdfam10", DefaultAMDPfmCounters>;
167 def : PfmCountersBinding<"barcelona", DefaultAMDPfmCounters>;
169 def BdVer2PfmCounters : ProcPfmCounters {
170 let CycleCounter = PfmCounter<"cpu_clk_unhalted">;
171 let UopsCounter = PfmCounter<"retired_uops">;
172 let IssueCounters = [
173 PfmIssueCounter<"PdFPU0", "dispatched_fpu_ops:ops_pipe0 + dispatched_fpu_ops:ops_dual_pipe0">,
174 PfmIssueCounter<"PdFPU1", "dispatched_fpu_ops:ops_pipe1 + dispatched_fpu_ops:ops_dual_pipe1">,
175 PfmIssueCounter<"PdFPU2", "dispatched_fpu_ops:ops_pipe2 + dispatched_fpu_ops:ops_dual_pipe2">,
176 PfmIssueCounter<"PdFPU3", "dispatched_fpu_ops:ops_pipe3 + dispatched_fpu_ops:ops_dual_pipe3">
179 def : PfmCountersBinding<"bdver1", BdVer2PfmCounters>;
180 def : PfmCountersBinding<"bdver2", BdVer2PfmCounters>;
182 def BdVer3PfmCounters : ProcPfmCounters {
183 let CycleCounter = PfmCounter<"cpu_clk_unhalted">;
184 let UopsCounter = PfmCounter<"retired_uops">;
185 let IssueCounters = [
186 PfmIssueCounter<"SrFPU0", "dispatched_fpu_ops:ops_pipe0 + dispatched_fpu_ops:ops_dual_pipe0">,
187 PfmIssueCounter<"SrFPU1", "dispatched_fpu_ops:ops_pipe1 + dispatched_fpu_ops:ops_dual_pipe1">,
188 PfmIssueCounter<"SrFPU2", "dispatched_fpu_ops:ops_pipe2 + dispatched_fpu_ops:ops_dual_pipe2">
191 def : PfmCountersBinding<"bdver3", BdVer3PfmCounters>;
192 def : PfmCountersBinding<"bdver4", BdVer3PfmCounters>;
194 def BtVer1PfmCounters : ProcPfmCounters {
195 let CycleCounter = PfmCounter<"cpu_clk_unhalted">;
196 let UopsCounter = PfmCounter<"retired_uops">;
197 let IssueCounters = [
198 PfmIssueCounter<"BtFPU0", "dispatched_fpu:pipe0">,
199 PfmIssueCounter<"BtFPU1", "dispatched_fpu:pipe1">
202 def : PfmCountersBinding<"btver1", BtVer1PfmCounters>;
204 def BtVer2PfmCounters : ProcPfmCounters {
205 let CycleCounter = PfmCounter<"cpu_clk_unhalted">;
206 let UopsCounter = PfmCounter<"retired_uops">;
207 let IssueCounters = [
208 PfmIssueCounter<"JFPU0", "dispatched_fpu:pipe0">,
209 PfmIssueCounter<"JFPU1", "dispatched_fpu:pipe1">
212 def : PfmCountersBinding<"btver2", BtVer2PfmCounters>;
214 def ZnVer1PfmCounters : ProcPfmCounters {
215 let CycleCounter = PfmCounter<"cycles_not_in_halt">;
216 let UopsCounter = PfmCounter<"retired_uops">;
217 let IssueCounters = [
218 PfmIssueCounter<"ZnFPU0", "fpu_pipe_assignment:total0">,
219 PfmIssueCounter<"ZnFPU1", "fpu_pipe_assignment:total1">,
220 PfmIssueCounter<"ZnFPU2", "fpu_pipe_assignment:total2">,
221 PfmIssueCounter<"ZnFPU3", "fpu_pipe_assignment:total3">,
222 PfmIssueCounter<"ZnDivider", "div_op_count">
225 def : PfmCountersBinding<"znver1", ZnVer1PfmCounters>;