[ARM] MVE integer min and max
[llvm-core.git] / lib / Target / X86 / X86SelectionDAGInfo.h
blob0f2d979f91e383958fa33800331be9311eb1cb6f
1 //===-- X86SelectionDAGInfo.h - X86 SelectionDAG Info -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the X86 subclass for SelectionDAGTargetInfo.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H
14 #define LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H
16 #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
17 #include "llvm/MC/MCRegisterInfo.h"
19 namespace llvm {
21 class X86TargetLowering;
22 class X86TargetMachine;
23 class X86Subtarget;
25 class X86SelectionDAGInfo : public SelectionDAGTargetInfo {
26 /// Returns true if it is possible for the base register to conflict with the
27 /// given set of clobbers for a memory intrinsic.
28 bool isBaseRegConflictPossible(SelectionDAG &DAG,
29 ArrayRef<MCPhysReg> ClobberSet) const;
31 public:
32 explicit X86SelectionDAGInfo() = default;
34 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
35 SDValue Chain, SDValue Dst, SDValue Src,
36 SDValue Size, unsigned Align, bool isVolatile,
37 MachinePointerInfo DstPtrInfo) const override;
39 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl,
40 SDValue Chain, SDValue Dst, SDValue Src,
41 SDValue Size, unsigned Align, bool isVolatile,
42 bool AlwaysInline,
43 MachinePointerInfo DstPtrInfo,
44 MachinePointerInfo SrcPtrInfo) const override;
49 #endif