1 //===- TargetTransformInfo.h ------------------------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 /// This pass exposes codegen information to IR-level passes. Every
10 /// transformation that uses codegen information is broken into three parts:
11 /// 1. The IR-level analysis pass.
12 /// 2. The IR-level transformation interface which provides the needed
14 /// 3. Codegen-level implementation which uses target-specific hooks.
16 /// This file defines #2, which is the interface that IR-level transformations
17 /// use for querying the codegen.
19 //===----------------------------------------------------------------------===//
21 #ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
22 #define LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
24 #include "llvm/ADT/Optional.h"
25 #include "llvm/IR/Operator.h"
26 #include "llvm/IR/PassManager.h"
27 #include "llvm/Pass.h"
28 #include "llvm/Support/AtomicOrdering.h"
29 #include "llvm/Support/DataTypes.h"
30 #include "llvm/Analysis/LoopInfo.h"
31 #include "llvm/Analysis/ScalarEvolution.h"
32 #include "llvm/IR/Dominators.h"
33 #include "llvm/Analysis/AssumptionCache.h"
42 class AssumptionCache
;
50 class ScalarEvolution
;
53 class TargetLibraryInfo
;
58 /// Information about a load/store intrinsic defined by the target.
59 struct MemIntrinsicInfo
{
60 /// This is the pointer that the intrinsic is loading from or storing to.
61 /// If this is non-null, then analysis/optimization passes can assume that
62 /// this intrinsic is functionally equivalent to a load/store from this
64 Value
*PtrVal
= nullptr;
66 // Ordering for atomic operations.
67 AtomicOrdering Ordering
= AtomicOrdering::NotAtomic
;
69 // Same Id is set by the target for corresponding load/store intrinsics.
70 unsigned short MatchingId
= 0;
73 bool WriteMem
= false;
74 bool IsVolatile
= false;
76 bool isUnordered() const {
77 return (Ordering
== AtomicOrdering::NotAtomic
||
78 Ordering
== AtomicOrdering::Unordered
) && !IsVolatile
;
82 /// Attributes of a target dependent hardware loop.
83 struct HardwareLoopInfo
{
84 HardwareLoopInfo() = delete;
85 HardwareLoopInfo(Loop
*L
) : L(L
) {}
87 BasicBlock
*ExitBlock
= nullptr;
88 BranchInst
*ExitBranch
= nullptr;
89 const SCEV
*ExitCount
= nullptr;
90 IntegerType
*CountType
= nullptr;
91 Value
*LoopDecrement
= nullptr; // Decrement the loop counter by this
92 // value in every iteration.
93 bool IsNestingLegal
= false; // Can a hardware loop be a parent to
94 // another hardware loop?
95 bool CounterInReg
= false; // Should loop counter be updated in
96 // the loop via a phi?
97 bool PerformEntryTest
= false; // Generate the intrinsic which also performs
98 // icmp ne zero on the loop counter value and
99 // produces an i1 to guard the loop entry.
100 bool isHardwareLoopCandidate(ScalarEvolution
&SE
, LoopInfo
&LI
,
101 DominatorTree
&DT
, bool ForceNestedLoop
= false,
102 bool ForceHardwareLoopPHI
= false);
103 bool canAnalyze(LoopInfo
&LI
);
106 /// This pass provides access to the codegen interfaces that are needed
107 /// for IR-level transformations.
108 class TargetTransformInfo
{
110 /// Construct a TTI object using a type implementing the \c Concept
113 /// This is used by targets to construct a TTI wrapping their target-specific
114 /// implementation that encodes appropriate costs for their target.
115 template <typename T
> TargetTransformInfo(T Impl
);
117 /// Construct a baseline TTI object using a minimal implementation of
118 /// the \c Concept API below.
120 /// The TTI implementation will reflect the information in the DataLayout
121 /// provided if non-null.
122 explicit TargetTransformInfo(const DataLayout
&DL
);
124 // Provide move semantics.
125 TargetTransformInfo(TargetTransformInfo
&&Arg
);
126 TargetTransformInfo
&operator=(TargetTransformInfo
&&RHS
);
128 // We need to define the destructor out-of-line to define our sub-classes
130 ~TargetTransformInfo();
132 /// Handle the invalidation of this information.
134 /// When used as a result of \c TargetIRAnalysis this method will be called
135 /// when the function this was computed for changes. When it returns false,
136 /// the information is preserved across those changes.
137 bool invalidate(Function
&, const PreservedAnalyses
&,
138 FunctionAnalysisManager::Invalidator
&) {
139 // FIXME: We should probably in some way ensure that the subtarget
140 // information for a function hasn't changed.
144 /// \name Generic Target Information
147 /// The kind of cost model.
149 /// There are several different cost models that can be customized by the
150 /// target. The normalization of each cost model may be target specific.
151 enum TargetCostKind
{
152 TCK_RecipThroughput
, ///< Reciprocal throughput.
153 TCK_Latency
, ///< The latency of instruction.
154 TCK_CodeSize
///< Instruction code size.
157 /// Query the cost of a specified instruction.
159 /// Clients should use this interface to query the cost of an existing
160 /// instruction. The instruction must have a valid parent (basic block).
162 /// Note, this method does not cache the cost calculation and it
163 /// can be expensive in some cases.
164 int getInstructionCost(const Instruction
*I
, enum TargetCostKind kind
) const {
166 case TCK_RecipThroughput
:
167 return getInstructionThroughput(I
);
170 return getInstructionLatency(I
);
173 return getUserCost(I
);
175 llvm_unreachable("Unknown instruction cost kind");
178 /// Underlying constants for 'cost' values in this interface.
180 /// Many APIs in this interface return a cost. This enum defines the
181 /// fundamental values that should be used to interpret (and produce) those
182 /// costs. The costs are returned as an int rather than a member of this
183 /// enumeration because it is expected that the cost of one IR instruction
184 /// may have a multiplicative factor to it or otherwise won't fit directly
185 /// into the enum. Moreover, it is common to sum or average costs which works
186 /// better as simple integral values. Thus this enum only provides constants.
187 /// Also note that the returned costs are signed integers to make it natural
188 /// to add, subtract, and test with zero (a common boundary condition). It is
189 /// not expected that 2^32 is a realistic cost to be modeling at any point.
191 /// Note that these costs should usually reflect the intersection of code-size
192 /// cost and execution cost. A free instruction is typically one that folds
193 /// into another instruction. For example, reg-to-reg moves can often be
194 /// skipped by renaming the registers in the CPU, but they still are encoded
195 /// and thus wouldn't be considered 'free' here.
196 enum TargetCostConstants
{
197 TCC_Free
= 0, ///< Expected to fold away in lowering.
198 TCC_Basic
= 1, ///< The cost of a typical 'add' instruction.
199 TCC_Expensive
= 4 ///< The cost of a 'div' instruction on x86.
202 /// Estimate the cost of a specific operation when lowered.
204 /// Note that this is designed to work on an arbitrary synthetic opcode, and
205 /// thus work for hypothetical queries before an instruction has even been
206 /// formed. However, this does *not* work for GEPs, and must not be called
207 /// for a GEP instruction. Instead, use the dedicated getGEPCost interface as
208 /// analyzing a GEP's cost required more information.
210 /// Typically only the result type is required, and the operand type can be
211 /// omitted. However, if the opcode is one of the cast instructions, the
212 /// operand type is required.
214 /// The returned cost is defined in terms of \c TargetCostConstants, see its
215 /// comments for a detailed explanation of the cost values.
216 int getOperationCost(unsigned Opcode
, Type
*Ty
, Type
*OpTy
= nullptr) const;
218 /// Estimate the cost of a GEP operation when lowered.
220 /// The contract for this function is the same as \c getOperationCost except
221 /// that it supports an interface that provides extra information specific to
222 /// the GEP operation.
223 int getGEPCost(Type
*PointeeType
, const Value
*Ptr
,
224 ArrayRef
<const Value
*> Operands
) const;
226 /// Estimate the cost of a EXT operation when lowered.
228 /// The contract for this function is the same as \c getOperationCost except
229 /// that it supports an interface that provides extra information specific to
230 /// the EXT operation.
231 int getExtCost(const Instruction
*I
, const Value
*Src
) const;
233 /// Estimate the cost of a function call when lowered.
235 /// The contract for this is the same as \c getOperationCost except that it
236 /// supports an interface that provides extra information specific to call
239 /// This is the most basic query for estimating call cost: it only knows the
240 /// function type and (potentially) the number of arguments at the call site.
241 /// The latter is only interesting for varargs function types.
242 int getCallCost(FunctionType
*FTy
, int NumArgs
= -1,
243 const User
*U
= nullptr) const;
245 /// Estimate the cost of calling a specific function when lowered.
247 /// This overload adds the ability to reason about the particular function
248 /// being called in the event it is a library call with special lowering.
249 int getCallCost(const Function
*F
, int NumArgs
= -1,
250 const User
*U
= nullptr) const;
252 /// Estimate the cost of calling a specific function when lowered.
254 /// This overload allows specifying a set of candidate argument values.
255 int getCallCost(const Function
*F
, ArrayRef
<const Value
*> Arguments
,
256 const User
*U
= nullptr) const;
258 /// \returns A value by which our inlining threshold should be multiplied.
259 /// This is primarily used to bump up the inlining threshold wholesale on
260 /// targets where calls are unusually expensive.
262 /// TODO: This is a rather blunt instrument. Perhaps altering the costs of
263 /// individual classes of instructions would be better.
264 unsigned getInliningThresholdMultiplier() const;
266 /// \returns Vector bonus in percent.
268 /// Vector bonuses: We want to more aggressively inline vector-dense kernels
269 /// and apply this bonus based on the percentage of vector instructions. A
270 /// bonus is applied if the vector instructions exceed 50% and half that amount
271 /// is applied if it exceeds 10%. Note that these bonuses are some what
272 /// arbitrary and evolved over time by accident as much as because they are
273 /// principled bonuses.
274 /// FIXME: It would be nice to base the bonus values on something more
275 /// scientific. A target may has no bonus on vector instructions.
276 int getInlinerVectorBonusPercent() const;
278 /// Estimate the cost of an intrinsic when lowered.
280 /// Mirrors the \c getCallCost method but uses an intrinsic identifier.
281 int getIntrinsicCost(Intrinsic::ID IID
, Type
*RetTy
,
282 ArrayRef
<Type
*> ParamTys
,
283 const User
*U
= nullptr) const;
285 /// Estimate the cost of an intrinsic when lowered.
287 /// Mirrors the \c getCallCost method but uses an intrinsic identifier.
288 int getIntrinsicCost(Intrinsic::ID IID
, Type
*RetTy
,
289 ArrayRef
<const Value
*> Arguments
,
290 const User
*U
= nullptr) const;
292 /// \return the expected cost of a memcpy, which could e.g. depend on the
293 /// source/destination type and alignment and the number of bytes copied.
294 int getMemcpyCost(const Instruction
*I
) const;
296 /// \return The estimated number of case clusters when lowering \p 'SI'.
297 /// \p JTSize Set a jump table size only when \p SI is suitable for a jump
299 unsigned getEstimatedNumberOfCaseClusters(const SwitchInst
&SI
,
300 unsigned &JTSize
) const;
302 /// Estimate the cost of a given IR user when lowered.
304 /// This can estimate the cost of either a ConstantExpr or Instruction when
305 /// lowered. It has two primary advantages over the \c getOperationCost and
306 /// \c getGEPCost above, and one significant disadvantage: it can only be
307 /// used when the IR construct has already been formed.
309 /// The advantages are that it can inspect the SSA use graph to reason more
310 /// accurately about the cost. For example, all-constant-GEPs can often be
311 /// folded into a load or other instruction, but if they are used in some
312 /// other context they may not be folded. This routine can distinguish such
315 /// \p Operands is a list of operands which can be a result of transformations
316 /// of the current operands. The number of the operands on the list must equal
317 /// to the number of the current operands the IR user has. Their order on the
318 /// list must be the same as the order of the current operands the IR user
321 /// The returned cost is defined in terms of \c TargetCostConstants, see its
322 /// comments for a detailed explanation of the cost values.
323 int getUserCost(const User
*U
, ArrayRef
<const Value
*> Operands
) const;
325 /// This is a helper function which calls the two-argument getUserCost
326 /// with \p Operands which are the current operands U has.
327 int getUserCost(const User
*U
) const {
328 SmallVector
<const Value
*, 4> Operands(U
->value_op_begin(),
330 return getUserCost(U
, Operands
);
333 /// Return true if branch divergence exists.
335 /// Branch divergence has a significantly negative impact on GPU performance
336 /// when threads in the same wavefront take different paths due to conditional
338 bool hasBranchDivergence() const;
340 /// Returns whether V is a source of divergence.
342 /// This function provides the target-dependent information for
343 /// the target-independent LegacyDivergenceAnalysis. LegacyDivergenceAnalysis first
344 /// builds the dependency graph, and then runs the reachability algorithm
345 /// starting with the sources of divergence.
346 bool isSourceOfDivergence(const Value
*V
) const;
348 // Returns true for the target specific
349 // set of operations which produce uniform result
350 // even taking non-uniform arguments
351 bool isAlwaysUniform(const Value
*V
) const;
353 /// Returns the address space ID for a target's 'flat' address space. Note
354 /// this is not necessarily the same as addrspace(0), which LLVM sometimes
355 /// refers to as the generic address space. The flat address space is a
356 /// generic address space that can be used access multiple segments of memory
357 /// with different address spaces. Access of a memory location through a
358 /// pointer with this address space is expected to be legal but slower
359 /// compared to the same memory location accessed through a pointer with a
360 /// different address space.
362 /// This is for targets with different pointer representations which can
363 /// be converted with the addrspacecast instruction. If a pointer is converted
364 /// to this address space, optimizations should attempt to replace the access
365 /// with the source address space.
367 /// \returns ~0u if the target does not have such a flat address space to
369 unsigned getFlatAddressSpace() const;
371 /// Return any intrinsic address operand indexes which may be rewritten if
372 /// they use a flat address space pointer.
374 /// \returns true if the intrinsic was handled.
375 bool collectFlatAddressOperands(SmallVectorImpl
<int> &OpIndexes
,
376 Intrinsic::ID IID
) const;
378 /// Rewrite intrinsic call \p II such that \p OldV will be replaced with \p
379 /// NewV, which has a different address space. This should happen for every
380 /// operand index that collectFlatAddressOperands returned for the intrinsic.
381 /// \returns true if the intrinsic /// was handled.
382 bool rewriteIntrinsicWithAddressSpace(IntrinsicInst
*II
,
383 Value
*OldV
, Value
*NewV
) const;
385 /// Test whether calls to a function lower to actual program function
388 /// The idea is to test whether the program is likely to require a 'call'
389 /// instruction or equivalent in order to call the given function.
391 /// FIXME: It's not clear that this is a good or useful query API. Client's
392 /// should probably move to simpler cost metrics using the above.
393 /// Alternatively, we could split the cost interface into distinct code-size
394 /// and execution-speed costs. This would allow modelling the core of this
395 /// query more accurately as a call is a single small instruction, but
396 /// incurs significant execution cost.
397 bool isLoweredToCall(const Function
*F
) const;
400 /// TODO: Some of these could be merged. Also, a lexical ordering
401 /// isn't always optimal.
406 unsigned NumBaseAdds
;
412 /// Parameters that control the generic loop unrolling transformation.
413 struct UnrollingPreferences
{
414 /// The cost threshold for the unrolled loop. Should be relative to the
415 /// getUserCost values returned by this API, and the expectation is that
416 /// the unrolled loop's instructions when run through that interface should
417 /// not exceed this cost. However, this is only an estimate. Also, specific
418 /// loops may be unrolled even with a cost above this threshold if deemed
419 /// profitable. Set this to UINT_MAX to disable the loop body cost
422 /// If complete unrolling will reduce the cost of the loop, we will boost
423 /// the Threshold by a certain percent to allow more aggressive complete
424 /// unrolling. This value provides the maximum boost percentage that we
425 /// can apply to Threshold (The value should be no less than 100).
426 /// BoostedThreshold = Threshold * min(RolledCost / UnrolledCost,
427 /// MaxPercentThresholdBoost / 100)
428 /// E.g. if complete unrolling reduces the loop execution time by 50%
429 /// then we boost the threshold by the factor of 2x. If unrolling is not
430 /// expected to reduce the running time, then we do not increase the
432 unsigned MaxPercentThresholdBoost
;
433 /// The cost threshold for the unrolled loop when optimizing for size (set
434 /// to UINT_MAX to disable).
435 unsigned OptSizeThreshold
;
436 /// The cost threshold for the unrolled loop, like Threshold, but used
437 /// for partial/runtime unrolling (set to UINT_MAX to disable).
438 unsigned PartialThreshold
;
439 /// The cost threshold for the unrolled loop when optimizing for size, like
440 /// OptSizeThreshold, but used for partial/runtime unrolling (set to
441 /// UINT_MAX to disable).
442 unsigned PartialOptSizeThreshold
;
443 /// A forced unrolling factor (the number of concatenated bodies of the
444 /// original loop in the unrolled loop body). When set to 0, the unrolling
445 /// transformation will select an unrolling factor based on the current cost
446 /// threshold and other factors.
448 /// A forced peeling factor (the number of bodied of the original loop
449 /// that should be peeled off before the loop body). When set to 0, the
450 /// unrolling transformation will select a peeling factor based on profile
451 /// information and other factors.
453 /// Default unroll count for loops with run-time trip count.
454 unsigned DefaultUnrollRuntimeCount
;
455 // Set the maximum unrolling factor. The unrolling factor may be selected
456 // using the appropriate cost threshold, but may not exceed this number
457 // (set to UINT_MAX to disable). This does not apply in cases where the
458 // loop is being fully unrolled.
460 /// Set the maximum unrolling factor for full unrolling. Like MaxCount, but
461 /// applies even if full unrolling is selected. This allows a target to fall
462 /// back to Partial unrolling if full unrolling is above FullUnrollMaxCount.
463 unsigned FullUnrollMaxCount
;
464 // Represents number of instructions optimized when "back edge"
465 // becomes "fall through" in unrolled loop.
466 // For now we count a conditional branch on a backedge and a comparison
469 /// Allow partial unrolling (unrolling of loops to expand the size of the
470 /// loop body, not only to eliminate small constant-trip-count loops).
472 /// Allow runtime unrolling (unrolling of loops to expand the size of the
473 /// loop body even when the number of loop iterations is not known at
476 /// Allow generation of a loop remainder (extra iterations after unroll).
478 /// Allow emitting expensive instructions (such as divisions) when computing
479 /// the trip count of a loop for runtime unrolling.
480 bool AllowExpensiveTripCount
;
481 /// Apply loop unroll on any kind of loop
482 /// (mainly to loops that fail runtime unrolling).
484 /// Allow using trip count upper bound to unroll loops.
486 /// Allow peeling off loop iterations.
488 /// Allow unrolling of all the iterations of the runtime loop remainder.
489 bool UnrollRemainder
;
490 /// Allow unroll and jam. Used to enable unroll and jam for the target.
492 /// Allow peeling basing on profile. Uses to enable peeling off all
493 /// iterations basing on provided profile.
494 /// If the value is true the peeling cost model can decide to peel only
495 /// some iterations and in this case it will set this to false.
496 bool PeelProfiledIterations
;
497 /// Threshold for unroll and jam, for inner loop size. The 'Threshold'
498 /// value above is used during unroll and jam for the outer loop size.
499 /// This value is used in the same manner to limit the size of the inner
501 unsigned UnrollAndJamInnerLoopThreshold
;
504 /// Get target-customized preferences for the generic loop unrolling
505 /// transformation. The caller will initialize UP with the current
506 /// target-independent defaults.
507 void getUnrollingPreferences(Loop
*L
, ScalarEvolution
&,
508 UnrollingPreferences
&UP
) const;
510 /// Query the target whether it would be profitable to convert the given loop
511 /// into a hardware loop.
512 bool isHardwareLoopProfitable(Loop
*L
, ScalarEvolution
&SE
,
514 TargetLibraryInfo
*LibInfo
,
515 HardwareLoopInfo
&HWLoopInfo
) const;
519 /// \name Scalar Target Information
522 /// Flags indicating the kind of support for population count.
524 /// Compared to the SW implementation, HW support is supposed to
525 /// significantly boost the performance when the population is dense, and it
526 /// may or may not degrade performance if the population is sparse. A HW
527 /// support is considered as "Fast" if it can outperform, or is on a par
528 /// with, SW implementation when the population is sparse; otherwise, it is
529 /// considered as "Slow".
530 enum PopcntSupportKind
{ PSK_Software
, PSK_SlowHardware
, PSK_FastHardware
};
532 /// Return true if the specified immediate is legal add immediate, that
533 /// is the target has add instructions which can add a register with the
534 /// immediate without having to materialize the immediate into a register.
535 bool isLegalAddImmediate(int64_t Imm
) const;
537 /// Return true if the specified immediate is legal icmp immediate,
538 /// that is the target has icmp instructions which can compare a register
539 /// against the immediate without having to materialize the immediate into a
541 bool isLegalICmpImmediate(int64_t Imm
) const;
543 /// Return true if the addressing mode represented by AM is legal for
544 /// this target, for a load/store of the specified type.
545 /// The type may be VoidTy, in which case only return true if the addressing
546 /// mode is legal for a load/store of any legal type.
547 /// If target returns true in LSRWithInstrQueries(), I may be valid.
548 /// TODO: Handle pre/postinc as well.
549 bool isLegalAddressingMode(Type
*Ty
, GlobalValue
*BaseGV
, int64_t BaseOffset
,
550 bool HasBaseReg
, int64_t Scale
,
551 unsigned AddrSpace
= 0,
552 Instruction
*I
= nullptr) const;
554 /// Return true if LSR cost of C1 is lower than C1.
555 bool isLSRCostLess(TargetTransformInfo::LSRCost
&C1
,
556 TargetTransformInfo::LSRCost
&C2
) const;
558 /// Return true if the target can fuse a compare and branch.
559 /// Loop-strength-reduction (LSR) uses that knowledge to adjust its cost
560 /// calculation for the instructions in a loop.
561 bool canMacroFuseCmp() const;
563 /// Return true if the target can save a compare for loop count, for example
564 /// hardware loop saves a compare.
565 bool canSaveCmp(Loop
*L
, BranchInst
**BI
, ScalarEvolution
*SE
, LoopInfo
*LI
,
566 DominatorTree
*DT
, AssumptionCache
*AC
,
567 TargetLibraryInfo
*LibInfo
) const;
569 /// \return True is LSR should make efforts to create/preserve post-inc
570 /// addressing mode expressions.
571 bool shouldFavorPostInc() const;
573 /// Return true if LSR should make efforts to generate indexed addressing
574 /// modes that operate across loop iterations.
575 bool shouldFavorBackedgeIndex(const Loop
*L
) const;
577 /// Return true if the target supports masked load.
578 bool isLegalMaskedStore(Type
*DataType
) const;
579 /// Return true if the target supports masked store.
580 bool isLegalMaskedLoad(Type
*DataType
) const;
582 /// Return true if the target supports nontemporal store.
583 bool isLegalNTStore(Type
*DataType
, llvm::Align Alignment
) const;
584 /// Return true if the target supports nontemporal load.
585 bool isLegalNTLoad(Type
*DataType
, llvm::Align Alignment
) const;
587 /// Return true if the target supports masked scatter.
588 bool isLegalMaskedScatter(Type
*DataType
) const;
589 /// Return true if the target supports masked gather.
590 bool isLegalMaskedGather(Type
*DataType
) const;
592 /// Return true if the target supports masked compress store.
593 bool isLegalMaskedCompressStore(Type
*DataType
) const;
594 /// Return true if the target supports masked expand load.
595 bool isLegalMaskedExpandLoad(Type
*DataType
) const;
597 /// Return true if the target has a unified operation to calculate division
598 /// and remainder. If so, the additional implicit multiplication and
599 /// subtraction required to calculate a remainder from division are free. This
600 /// can enable more aggressive transformations for division and remainder than
601 /// would typically be allowed using throughput or size cost models.
602 bool hasDivRemOp(Type
*DataType
, bool IsSigned
) const;
604 /// Return true if the given instruction (assumed to be a memory access
605 /// instruction) has a volatile variant. If that's the case then we can avoid
606 /// addrspacecast to generic AS for volatile loads/stores. Default
607 /// implementation returns false, which prevents address space inference for
608 /// volatile loads/stores.
609 bool hasVolatileVariant(Instruction
*I
, unsigned AddrSpace
) const;
611 /// Return true if target doesn't mind addresses in vectors.
612 bool prefersVectorizedAddressing() const;
614 /// Return the cost of the scaling factor used in the addressing
615 /// mode represented by AM for this target, for a load/store
616 /// of the specified type.
617 /// If the AM is supported, the return value must be >= 0.
618 /// If the AM is not supported, it returns a negative value.
619 /// TODO: Handle pre/postinc as well.
620 int getScalingFactorCost(Type
*Ty
, GlobalValue
*BaseGV
, int64_t BaseOffset
,
621 bool HasBaseReg
, int64_t Scale
,
622 unsigned AddrSpace
= 0) const;
624 /// Return true if the loop strength reduce pass should make
625 /// Instruction* based TTI queries to isLegalAddressingMode(). This is
626 /// needed on SystemZ, where e.g. a memcpy can only have a 12 bit unsigned
627 /// immediate offset and no index register.
628 bool LSRWithInstrQueries() const;
630 /// Return true if it's free to truncate a value of type Ty1 to type
631 /// Ty2. e.g. On x86 it's free to truncate a i32 value in register EAX to i16
632 /// by referencing its sub-register AX.
633 bool isTruncateFree(Type
*Ty1
, Type
*Ty2
) const;
635 /// Return true if it is profitable to hoist instruction in the
636 /// then/else to before if.
637 bool isProfitableToHoist(Instruction
*I
) const;
641 /// Return true if this type is legal.
642 bool isTypeLegal(Type
*Ty
) const;
644 /// Return true if switches should be turned into lookup tables for the
646 bool shouldBuildLookupTables() const;
648 /// Return true if switches should be turned into lookup tables
649 /// containing this constant value for the target.
650 bool shouldBuildLookupTablesForConstant(Constant
*C
) const;
652 /// Return true if the input function which is cold at all call sites,
653 /// should use coldcc calling convention.
654 bool useColdCCForColdCall(Function
&F
) const;
656 unsigned getScalarizationOverhead(Type
*Ty
, bool Insert
, bool Extract
) const;
658 unsigned getOperandsScalarizationOverhead(ArrayRef
<const Value
*> Args
,
661 /// If target has efficient vector element load/store instructions, it can
662 /// return true here so that insertion/extraction costs are not added to
663 /// the scalarization cost of a load/store.
664 bool supportsEfficientVectorElementLoadStore() const;
666 /// Don't restrict interleaved unrolling to small loops.
667 bool enableAggressiveInterleaving(bool LoopHasReductions
) const;
669 /// Returns options for expansion of memcmp. IsZeroCmp is
670 // true if this is the expansion of memcmp(p1, p2, s) == 0.
671 struct MemCmpExpansionOptions
{
672 // Return true if memcmp expansion is enabled.
673 operator bool() const { return MaxNumLoads
> 0; }
675 // Maximum number of load operations.
676 unsigned MaxNumLoads
= 0;
678 // The list of available load sizes (in bytes), sorted in decreasing order.
679 SmallVector
<unsigned, 8> LoadSizes
;
681 // For memcmp expansion when the memcmp result is only compared equal or
682 // not-equal to 0, allow up to this number of load pairs per block. As an
683 // example, this may allow 'memcmp(a, b, 3) == 0' in a single block:
684 // a0 = load2bytes &a[0]
685 // b0 = load2bytes &b[0]
686 // a2 = load1byte &a[2]
687 // b2 = load1byte &b[2]
688 // r = cmp eq (a0 ^ b0 | a2 ^ b2), 0
689 unsigned NumLoadsPerBlock
= 1;
691 // Set to true to allow overlapping loads. For example, 7-byte compares can
692 // be done with two 4-byte compares instead of 4+2+1-byte compares. This
693 // requires all loads in LoadSizes to be doable in an unaligned way.
694 bool AllowOverlappingLoads
= false;
696 MemCmpExpansionOptions
enableMemCmpExpansion(bool OptSize
,
697 bool IsZeroCmp
) const;
699 /// Enable matching of interleaved access groups.
700 bool enableInterleavedAccessVectorization() const;
702 /// Enable matching of interleaved access groups that contain predicated
703 /// accesses or gaps and therefore vectorized using masked
704 /// vector loads/stores.
705 bool enableMaskedInterleavedAccessVectorization() const;
707 /// Indicate that it is potentially unsafe to automatically vectorize
708 /// floating-point operations because the semantics of vector and scalar
709 /// floating-point semantics may differ. For example, ARM NEON v7 SIMD math
710 /// does not support IEEE-754 denormal numbers, while depending on the
711 /// platform, scalar floating-point math does.
712 /// This applies to floating-point math operations and calls, not memory
713 /// operations, shuffles, or casts.
714 bool isFPVectorizationPotentiallyUnsafe() const;
716 /// Determine if the target supports unaligned memory accesses.
717 bool allowsMisalignedMemoryAccesses(LLVMContext
&Context
,
718 unsigned BitWidth
, unsigned AddressSpace
= 0,
719 unsigned Alignment
= 1,
720 bool *Fast
= nullptr) const;
722 /// Return hardware support for population count.
723 PopcntSupportKind
getPopcntSupport(unsigned IntTyWidthInBit
) const;
725 /// Return true if the hardware has a fast square-root instruction.
726 bool haveFastSqrt(Type
*Ty
) const;
728 /// Return true if it is faster to check if a floating-point value is NaN
729 /// (or not-NaN) versus a comparison against a constant FP zero value.
730 /// Targets should override this if materializing a 0.0 for comparison is
731 /// generally as cheap as checking for ordered/unordered.
732 bool isFCmpOrdCheaperThanFCmpZero(Type
*Ty
) const;
734 /// Return the expected cost of supporting the floating point operation
735 /// of the specified type.
736 int getFPOpCost(Type
*Ty
) const;
738 /// Return the expected cost of materializing for the given integer
739 /// immediate of the specified type.
740 int getIntImmCost(const APInt
&Imm
, Type
*Ty
) const;
742 /// Return the expected cost of materialization for the given integer
743 /// immediate of the specified type for a given instruction. The cost can be
744 /// zero if the immediate can be folded into the specified instruction.
745 int getIntImmCost(unsigned Opc
, unsigned Idx
, const APInt
&Imm
,
747 int getIntImmCost(Intrinsic::ID IID
, unsigned Idx
, const APInt
&Imm
,
750 /// Return the expected cost for the given integer when optimising
751 /// for size. This is different than the other integer immediate cost
752 /// functions in that it is subtarget agnostic. This is useful when you e.g.
753 /// target one ISA such as Aarch32 but smaller encodings could be possible
754 /// with another such as Thumb. This return value is used as a penalty when
755 /// the total costs for a constant is calculated (the bigger the cost, the
756 /// more beneficial constant hoisting is).
757 int getIntImmCodeSizeCost(unsigned Opc
, unsigned Idx
, const APInt
&Imm
,
761 /// \name Vector Target Information
764 /// The various kinds of shuffle patterns for vector queries.
766 SK_Broadcast
, ///< Broadcast element 0 to all other elements.
767 SK_Reverse
, ///< Reverse the order of the vector.
768 SK_Select
, ///< Selects elements from the corresponding lane of
769 ///< either source operand. This is equivalent to a
770 ///< vector select with a constant condition operand.
771 SK_Transpose
, ///< Transpose two vectors.
772 SK_InsertSubvector
, ///< InsertSubvector. Index indicates start offset.
773 SK_ExtractSubvector
,///< ExtractSubvector Index indicates start offset.
774 SK_PermuteTwoSrc
, ///< Merge elements from two source vectors into one
775 ///< with any shuffle mask.
776 SK_PermuteSingleSrc
///< Shuffle elements of single source vector with any
780 /// Additional information about an operand's possible values.
781 enum OperandValueKind
{
782 OK_AnyValue
, // Operand can have any value.
783 OK_UniformValue
, // Operand is uniform (splat of a value).
784 OK_UniformConstantValue
, // Operand is uniform constant.
785 OK_NonUniformConstantValue
// Operand is a non uniform constant value.
788 /// Additional properties of an operand's values.
789 enum OperandValueProperties
{ OP_None
= 0, OP_PowerOf2
= 1 };
791 /// \return The number of scalar or vector registers that the target has.
792 /// If 'Vectors' is true, it returns the number of vector registers. If it is
793 /// set to false, it returns the number of scalar registers.
794 unsigned getNumberOfRegisters(bool Vector
) const;
796 /// \return The width of the largest scalar or vector register type.
797 unsigned getRegisterBitWidth(bool Vector
) const;
799 /// \return The width of the smallest vector register type.
800 unsigned getMinVectorRegisterBitWidth() const;
802 /// \return True if the vectorization factor should be chosen to
803 /// make the vector of the smallest element type match the size of a
804 /// vector register. For wider element types, this could result in
805 /// creating vectors that span multiple vector registers.
806 /// If false, the vectorization factor will be chosen based on the
807 /// size of the widest element type.
808 bool shouldMaximizeVectorBandwidth(bool OptSize
) const;
810 /// \return The minimum vectorization factor for types of given element
811 /// bit width, or 0 if there is no minimum VF. The returned value only
812 /// applies when shouldMaximizeVectorBandwidth returns true.
813 unsigned getMinimumVF(unsigned ElemWidth
) const;
815 /// \return True if it should be considered for address type promotion.
816 /// \p AllowPromotionWithoutCommonHeader Set true if promoting \p I is
817 /// profitable without finding other extensions fed by the same input.
818 bool shouldConsiderAddressTypePromotion(
819 const Instruction
&I
, bool &AllowPromotionWithoutCommonHeader
) const;
821 /// \return The size of a cache line in bytes.
822 unsigned getCacheLineSize() const;
824 /// The possible cache levels
825 enum class CacheLevel
{
826 L1D
, // The L1 data cache
827 L2D
, // The L2 data cache
829 // We currently do not model L3 caches, as their sizes differ widely between
830 // microarchitectures. Also, we currently do not have a use for L3 cache
831 // size modeling yet.
834 /// \return The size of the cache level in bytes, if available.
835 llvm::Optional
<unsigned> getCacheSize(CacheLevel Level
) const;
837 /// \return The associativity of the cache level, if available.
838 llvm::Optional
<unsigned> getCacheAssociativity(CacheLevel Level
) const;
840 /// \return How much before a load we should place the prefetch instruction.
841 /// This is currently measured in number of instructions.
842 unsigned getPrefetchDistance() const;
844 /// \return Some HW prefetchers can handle accesses up to a certain constant
845 /// stride. This is the minimum stride in bytes where it makes sense to start
846 /// adding SW prefetches. The default is 1, i.e. prefetch with any stride.
847 unsigned getMinPrefetchStride() const;
849 /// \return The maximum number of iterations to prefetch ahead. If the
850 /// required number of iterations is more than this number, no prefetching is
852 unsigned getMaxPrefetchIterationsAhead() const;
854 /// \return The maximum interleave factor that any transform should try to
855 /// perform for this target. This number depends on the level of parallelism
856 /// and the number of execution units in the CPU.
857 unsigned getMaxInterleaveFactor(unsigned VF
) const;
859 /// Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
860 static OperandValueKind
getOperandInfo(Value
*V
,
861 OperandValueProperties
&OpProps
);
863 /// This is an approximation of reciprocal throughput of a math/logic op.
864 /// A higher cost indicates less expected throughput.
865 /// From Agner Fog's guides, reciprocal throughput is "the average number of
866 /// clock cycles per instruction when the instructions are not part of a
867 /// limiting dependency chain."
868 /// Therefore, costs should be scaled to account for multiple execution units
869 /// on the target that can process this type of instruction. For example, if
870 /// there are 5 scalar integer units and 2 vector integer units that can
871 /// calculate an 'add' in a single cycle, this model should indicate that the
872 /// cost of the vector add instruction is 2.5 times the cost of the scalar
874 /// \p Args is an optional argument which holds the instruction operands
875 /// values so the TTI can analyze those values searching for special
876 /// cases or optimizations based on those values.
877 int getArithmeticInstrCost(
878 unsigned Opcode
, Type
*Ty
, OperandValueKind Opd1Info
= OK_AnyValue
,
879 OperandValueKind Opd2Info
= OK_AnyValue
,
880 OperandValueProperties Opd1PropInfo
= OP_None
,
881 OperandValueProperties Opd2PropInfo
= OP_None
,
882 ArrayRef
<const Value
*> Args
= ArrayRef
<const Value
*>()) const;
884 /// \return The cost of a shuffle instruction of kind Kind and of type Tp.
885 /// The index and subtype parameters are used by the subvector insertion and
886 /// extraction shuffle kinds to show the insert/extract point and the type of
887 /// the subvector being inserted/extracted.
888 /// NOTE: For subvector extractions Tp represents the source type.
889 int getShuffleCost(ShuffleKind Kind
, Type
*Tp
, int Index
= 0,
890 Type
*SubTp
= nullptr) const;
892 /// \return The expected cost of cast instructions, such as bitcast, trunc,
893 /// zext, etc. If there is an existing instruction that holds Opcode, it
894 /// may be passed in the 'I' parameter.
895 int getCastInstrCost(unsigned Opcode
, Type
*Dst
, Type
*Src
,
896 const Instruction
*I
= nullptr) const;
898 /// \return The expected cost of a sign- or zero-extended vector extract. Use
899 /// -1 to indicate that there is no information about the index value.
900 int getExtractWithExtendCost(unsigned Opcode
, Type
*Dst
, VectorType
*VecTy
,
901 unsigned Index
= -1) const;
903 /// \return The expected cost of control-flow related instructions such as
905 int getCFInstrCost(unsigned Opcode
) const;
907 /// \returns The expected cost of compare and select instructions. If there
908 /// is an existing instruction that holds Opcode, it may be passed in the
910 int getCmpSelInstrCost(unsigned Opcode
, Type
*ValTy
,
911 Type
*CondTy
= nullptr, const Instruction
*I
= nullptr) const;
913 /// \return The expected cost of vector Insert and Extract.
914 /// Use -1 to indicate that there is no information on the index value.
915 int getVectorInstrCost(unsigned Opcode
, Type
*Val
, unsigned Index
= -1) const;
917 /// \return The cost of Load and Store instructions.
918 int getMemoryOpCost(unsigned Opcode
, Type
*Src
, unsigned Alignment
,
919 unsigned AddressSpace
, const Instruction
*I
= nullptr) const;
921 /// \return The cost of masked Load and Store instructions.
922 int getMaskedMemoryOpCost(unsigned Opcode
, Type
*Src
, unsigned Alignment
,
923 unsigned AddressSpace
) const;
925 /// \return The cost of Gather or Scatter operation
926 /// \p Opcode - is a type of memory access Load or Store
927 /// \p DataTy - a vector type of the data to be loaded or stored
928 /// \p Ptr - pointer [or vector of pointers] - address[es] in memory
929 /// \p VariableMask - true when the memory access is predicated with a mask
930 /// that is not a compile-time constant
931 /// \p Alignment - alignment of single element
932 int getGatherScatterOpCost(unsigned Opcode
, Type
*DataTy
, Value
*Ptr
,
933 bool VariableMask
, unsigned Alignment
) const;
935 /// \return The cost of the interleaved memory operation.
936 /// \p Opcode is the memory operation code
937 /// \p VecTy is the vector type of the interleaved access.
938 /// \p Factor is the interleave factor
939 /// \p Indices is the indices for interleaved load members (as interleaved
940 /// load allows gaps)
941 /// \p Alignment is the alignment of the memory operation
942 /// \p AddressSpace is address space of the pointer.
943 /// \p UseMaskForCond indicates if the memory access is predicated.
944 /// \p UseMaskForGaps indicates if gaps should be masked.
945 int getInterleavedMemoryOpCost(unsigned Opcode
, Type
*VecTy
, unsigned Factor
,
946 ArrayRef
<unsigned> Indices
, unsigned Alignment
,
947 unsigned AddressSpace
,
948 bool UseMaskForCond
= false,
949 bool UseMaskForGaps
= false) const;
951 /// Calculate the cost of performing a vector reduction.
953 /// This is the cost of reducing the vector value of type \p Ty to a scalar
954 /// value using the operation denoted by \p Opcode. The form of the reduction
955 /// can either be a pairwise reduction or a reduction that splits the vector
956 /// at every reduction level.
960 /// ((v0+v1), (v2+v3), undef, undef)
963 /// ((v0+v2), (v1+v3), undef, undef)
964 int getArithmeticReductionCost(unsigned Opcode
, Type
*Ty
,
965 bool IsPairwiseForm
) const;
966 int getMinMaxReductionCost(Type
*Ty
, Type
*CondTy
, bool IsPairwiseForm
,
967 bool IsUnsigned
) const;
969 /// \returns The cost of Intrinsic instructions. Analyses the real arguments.
970 /// Three cases are handled: 1. scalar instruction 2. vector instruction
971 /// 3. scalar instruction which is to be vectorized with VF.
972 int getIntrinsicInstrCost(Intrinsic::ID ID
, Type
*RetTy
,
973 ArrayRef
<Value
*> Args
, FastMathFlags FMF
,
974 unsigned VF
= 1) const;
976 /// \returns The cost of Intrinsic instructions. Types analysis only.
977 /// If ScalarizationCostPassed is UINT_MAX, the cost of scalarizing the
978 /// arguments and the return value will be computed based on types.
979 int getIntrinsicInstrCost(Intrinsic::ID ID
, Type
*RetTy
,
980 ArrayRef
<Type
*> Tys
, FastMathFlags FMF
,
981 unsigned ScalarizationCostPassed
= UINT_MAX
) const;
983 /// \returns The cost of Call instructions.
984 int getCallInstrCost(Function
*F
, Type
*RetTy
, ArrayRef
<Type
*> Tys
) const;
986 /// \returns The number of pieces into which the provided type must be
987 /// split during legalization. Zero is returned when the answer is unknown.
988 unsigned getNumberOfParts(Type
*Tp
) const;
990 /// \returns The cost of the address computation. For most targets this can be
991 /// merged into the instruction indexing mode. Some targets might want to
992 /// distinguish between address computation for memory operations on vector
993 /// types and scalar types. Such targets should override this function.
994 /// The 'SE' parameter holds pointer for the scalar evolution object which
995 /// is used in order to get the Ptr step value in case of constant stride.
996 /// The 'Ptr' parameter holds SCEV of the access pointer.
997 int getAddressComputationCost(Type
*Ty
, ScalarEvolution
*SE
= nullptr,
998 const SCEV
*Ptr
= nullptr) const;
1000 /// \returns The cost, if any, of keeping values of the given types alive
1001 /// over a callsite.
1003 /// Some types may require the use of register classes that do not have
1004 /// any callee-saved registers, so would require a spill and fill.
1005 unsigned getCostOfKeepingLiveOverCall(ArrayRef
<Type
*> Tys
) const;
1007 /// \returns True if the intrinsic is a supported memory intrinsic. Info
1008 /// will contain additional information - whether the intrinsic may write
1009 /// or read to memory, volatility and the pointer. Info is undefined
1010 /// if false is returned.
1011 bool getTgtMemIntrinsic(IntrinsicInst
*Inst
, MemIntrinsicInfo
&Info
) const;
1013 /// \returns The maximum element size, in bytes, for an element
1014 /// unordered-atomic memory intrinsic.
1015 unsigned getAtomicMemIntrinsicMaxElementSize() const;
1017 /// \returns A value which is the result of the given memory intrinsic. New
1018 /// instructions may be created to extract the result from the given intrinsic
1019 /// memory operation. Returns nullptr if the target cannot create a result
1020 /// from the given intrinsic.
1021 Value
*getOrCreateResultFromMemIntrinsic(IntrinsicInst
*Inst
,
1022 Type
*ExpectedType
) const;
1024 /// \returns The type to use in a loop expansion of a memcpy call.
1025 Type
*getMemcpyLoopLoweringType(LLVMContext
&Context
, Value
*Length
,
1026 unsigned SrcAlign
, unsigned DestAlign
) const;
1028 /// \param[out] OpsOut The operand types to copy RemainingBytes of memory.
1029 /// \param RemainingBytes The number of bytes to copy.
1031 /// Calculates the operand types to use when copying \p RemainingBytes of
1032 /// memory, where source and destination alignments are \p SrcAlign and
1033 /// \p DestAlign respectively.
1034 void getMemcpyLoopResidualLoweringType(SmallVectorImpl
<Type
*> &OpsOut
,
1035 LLVMContext
&Context
,
1036 unsigned RemainingBytes
,
1038 unsigned DestAlign
) const;
1040 /// \returns True if the two functions have compatible attributes for inlining
1042 bool areInlineCompatible(const Function
*Caller
,
1043 const Function
*Callee
) const;
1045 /// \returns True if the caller and callee agree on how \p Args will be passed
1047 /// \param[out] Args The list of compatible arguments. The implementation may
1048 /// filter out any incompatible args from this list.
1049 bool areFunctionArgsABICompatible(const Function
*Caller
,
1050 const Function
*Callee
,
1051 SmallPtrSetImpl
<Argument
*> &Args
) const;
1053 /// The type of load/store indexing.
1054 enum MemIndexedMode
{
1055 MIM_Unindexed
, ///< No indexing.
1056 MIM_PreInc
, ///< Pre-incrementing.
1057 MIM_PreDec
, ///< Pre-decrementing.
1058 MIM_PostInc
, ///< Post-incrementing.
1059 MIM_PostDec
///< Post-decrementing.
1062 /// \returns True if the specified indexed load for the given type is legal.
1063 bool isIndexedLoadLegal(enum MemIndexedMode Mode
, Type
*Ty
) const;
1065 /// \returns True if the specified indexed store for the given type is legal.
1066 bool isIndexedStoreLegal(enum MemIndexedMode Mode
, Type
*Ty
) const;
1068 /// \returns The bitwidth of the largest vector type that should be used to
1069 /// load/store in the given address space.
1070 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace
) const;
1072 /// \returns True if the load instruction is legal to vectorize.
1073 bool isLegalToVectorizeLoad(LoadInst
*LI
) const;
1075 /// \returns True if the store instruction is legal to vectorize.
1076 bool isLegalToVectorizeStore(StoreInst
*SI
) const;
1078 /// \returns True if it is legal to vectorize the given load chain.
1079 bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes
,
1081 unsigned AddrSpace
) const;
1083 /// \returns True if it is legal to vectorize the given store chain.
1084 bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes
,
1086 unsigned AddrSpace
) const;
1088 /// \returns The new vector factor value if the target doesn't support \p
1089 /// SizeInBytes loads or has a better vector factor.
1090 unsigned getLoadVectorFactor(unsigned VF
, unsigned LoadSize
,
1091 unsigned ChainSizeInBytes
,
1092 VectorType
*VecTy
) const;
1094 /// \returns The new vector factor value if the target doesn't support \p
1095 /// SizeInBytes stores or has a better vector factor.
1096 unsigned getStoreVectorFactor(unsigned VF
, unsigned StoreSize
,
1097 unsigned ChainSizeInBytes
,
1098 VectorType
*VecTy
) const;
1100 /// Flags describing the kind of vector reduction.
1101 struct ReductionFlags
{
1102 ReductionFlags() : IsMaxOp(false), IsSigned(false), NoNaN(false) {}
1103 bool IsMaxOp
; ///< If the op a min/max kind, true if it's a max operation.
1104 bool IsSigned
; ///< Whether the operation is a signed int reduction.
1105 bool NoNaN
; ///< If op is an fp min/max, whether NaNs may be present.
1108 /// \returns True if the target wants to handle the given reduction idiom in
1109 /// the intrinsics form instead of the shuffle form.
1110 bool useReductionIntrinsic(unsigned Opcode
, Type
*Ty
,
1111 ReductionFlags Flags
) const;
1113 /// \returns True if the target wants to expand the given reduction intrinsic
1114 /// into a shuffle sequence.
1115 bool shouldExpandReduction(const IntrinsicInst
*II
) const;
1117 /// \returns the size cost of rematerializing a GlobalValue address relative
1118 /// to a stack reload.
1119 unsigned getGISelRematGlobalCost() const;
1124 /// Estimate the latency of specified instruction.
1125 /// Returns 1 as the default value.
1126 int getInstructionLatency(const Instruction
*I
) const;
1128 /// Returns the expected throughput cost of the instruction.
1129 /// Returns -1 if the cost is unknown.
1130 int getInstructionThroughput(const Instruction
*I
) const;
1132 /// The abstract base class used to type erase specific TTI
1133 /// implementations.
1136 /// The template model for the base class which wraps a concrete
1137 /// implementation in a type erased interface.
1138 template <typename T
> class Model
;
1140 std::unique_ptr
<Concept
> TTIImpl
;
1143 class TargetTransformInfo::Concept
{
1145 virtual ~Concept() = 0;
1146 virtual const DataLayout
&getDataLayout() const = 0;
1147 virtual int getOperationCost(unsigned Opcode
, Type
*Ty
, Type
*OpTy
) = 0;
1148 virtual int getGEPCost(Type
*PointeeType
, const Value
*Ptr
,
1149 ArrayRef
<const Value
*> Operands
) = 0;
1150 virtual int getExtCost(const Instruction
*I
, const Value
*Src
) = 0;
1151 virtual int getCallCost(FunctionType
*FTy
, int NumArgs
, const User
*U
) = 0;
1152 virtual int getCallCost(const Function
*F
, int NumArgs
, const User
*U
) = 0;
1153 virtual int getCallCost(const Function
*F
,
1154 ArrayRef
<const Value
*> Arguments
, const User
*U
) = 0;
1155 virtual unsigned getInliningThresholdMultiplier() = 0;
1156 virtual int getInlinerVectorBonusPercent() = 0;
1157 virtual int getIntrinsicCost(Intrinsic::ID IID
, Type
*RetTy
,
1158 ArrayRef
<Type
*> ParamTys
, const User
*U
) = 0;
1159 virtual int getIntrinsicCost(Intrinsic::ID IID
, Type
*RetTy
,
1160 ArrayRef
<const Value
*> Arguments
,
1162 virtual int getMemcpyCost(const Instruction
*I
) = 0;
1163 virtual unsigned getEstimatedNumberOfCaseClusters(const SwitchInst
&SI
,
1164 unsigned &JTSize
) = 0;
1166 getUserCost(const User
*U
, ArrayRef
<const Value
*> Operands
) = 0;
1167 virtual bool hasBranchDivergence() = 0;
1168 virtual bool isSourceOfDivergence(const Value
*V
) = 0;
1169 virtual bool isAlwaysUniform(const Value
*V
) = 0;
1170 virtual unsigned getFlatAddressSpace() = 0;
1171 virtual bool collectFlatAddressOperands(SmallVectorImpl
<int> &OpIndexes
,
1172 Intrinsic::ID IID
) const = 0;
1173 virtual bool rewriteIntrinsicWithAddressSpace(
1174 IntrinsicInst
*II
, Value
*OldV
, Value
*NewV
) const = 0;
1175 virtual bool isLoweredToCall(const Function
*F
) = 0;
1176 virtual void getUnrollingPreferences(Loop
*L
, ScalarEvolution
&,
1177 UnrollingPreferences
&UP
) = 0;
1178 virtual bool isHardwareLoopProfitable(Loop
*L
, ScalarEvolution
&SE
,
1179 AssumptionCache
&AC
,
1180 TargetLibraryInfo
*LibInfo
,
1181 HardwareLoopInfo
&HWLoopInfo
) = 0;
1182 virtual bool isLegalAddImmediate(int64_t Imm
) = 0;
1183 virtual bool isLegalICmpImmediate(int64_t Imm
) = 0;
1184 virtual bool isLegalAddressingMode(Type
*Ty
, GlobalValue
*BaseGV
,
1185 int64_t BaseOffset
, bool HasBaseReg
,
1188 Instruction
*I
) = 0;
1189 virtual bool isLSRCostLess(TargetTransformInfo::LSRCost
&C1
,
1190 TargetTransformInfo::LSRCost
&C2
) = 0;
1191 virtual bool canMacroFuseCmp() = 0;
1192 virtual bool canSaveCmp(Loop
*L
, BranchInst
**BI
, ScalarEvolution
*SE
,
1193 LoopInfo
*LI
, DominatorTree
*DT
, AssumptionCache
*AC
,
1194 TargetLibraryInfo
*LibInfo
) = 0;
1195 virtual bool shouldFavorPostInc() const = 0;
1196 virtual bool shouldFavorBackedgeIndex(const Loop
*L
) const = 0;
1197 virtual bool isLegalMaskedStore(Type
*DataType
) = 0;
1198 virtual bool isLegalMaskedLoad(Type
*DataType
) = 0;
1199 virtual bool isLegalNTStore(Type
*DataType
, llvm::Align Alignment
) = 0;
1200 virtual bool isLegalNTLoad(Type
*DataType
, llvm::Align Alignment
) = 0;
1201 virtual bool isLegalMaskedScatter(Type
*DataType
) = 0;
1202 virtual bool isLegalMaskedGather(Type
*DataType
) = 0;
1203 virtual bool isLegalMaskedCompressStore(Type
*DataType
) = 0;
1204 virtual bool isLegalMaskedExpandLoad(Type
*DataType
) = 0;
1205 virtual bool hasDivRemOp(Type
*DataType
, bool IsSigned
) = 0;
1206 virtual bool hasVolatileVariant(Instruction
*I
, unsigned AddrSpace
) = 0;
1207 virtual bool prefersVectorizedAddressing() = 0;
1208 virtual int getScalingFactorCost(Type
*Ty
, GlobalValue
*BaseGV
,
1209 int64_t BaseOffset
, bool HasBaseReg
,
1210 int64_t Scale
, unsigned AddrSpace
) = 0;
1211 virtual bool LSRWithInstrQueries() = 0;
1212 virtual bool isTruncateFree(Type
*Ty1
, Type
*Ty2
) = 0;
1213 virtual bool isProfitableToHoist(Instruction
*I
) = 0;
1214 virtual bool useAA() = 0;
1215 virtual bool isTypeLegal(Type
*Ty
) = 0;
1216 virtual bool shouldBuildLookupTables() = 0;
1217 virtual bool shouldBuildLookupTablesForConstant(Constant
*C
) = 0;
1218 virtual bool useColdCCForColdCall(Function
&F
) = 0;
1220 getScalarizationOverhead(Type
*Ty
, bool Insert
, bool Extract
) = 0;
1221 virtual unsigned getOperandsScalarizationOverhead(ArrayRef
<const Value
*> Args
,
1223 virtual bool supportsEfficientVectorElementLoadStore() = 0;
1224 virtual bool enableAggressiveInterleaving(bool LoopHasReductions
) = 0;
1225 virtual MemCmpExpansionOptions
1226 enableMemCmpExpansion(bool OptSize
, bool IsZeroCmp
) const = 0;
1227 virtual bool enableInterleavedAccessVectorization() = 0;
1228 virtual bool enableMaskedInterleavedAccessVectorization() = 0;
1229 virtual bool isFPVectorizationPotentiallyUnsafe() = 0;
1230 virtual bool allowsMisalignedMemoryAccesses(LLVMContext
&Context
,
1232 unsigned AddressSpace
,
1235 virtual PopcntSupportKind
getPopcntSupport(unsigned IntTyWidthInBit
) = 0;
1236 virtual bool haveFastSqrt(Type
*Ty
) = 0;
1237 virtual bool isFCmpOrdCheaperThanFCmpZero(Type
*Ty
) = 0;
1238 virtual int getFPOpCost(Type
*Ty
) = 0;
1239 virtual int getIntImmCodeSizeCost(unsigned Opc
, unsigned Idx
, const APInt
&Imm
,
1241 virtual int getIntImmCost(const APInt
&Imm
, Type
*Ty
) = 0;
1242 virtual int getIntImmCost(unsigned Opc
, unsigned Idx
, const APInt
&Imm
,
1244 virtual int getIntImmCost(Intrinsic::ID IID
, unsigned Idx
, const APInt
&Imm
,
1246 virtual unsigned getNumberOfRegisters(bool Vector
) = 0;
1247 virtual unsigned getRegisterBitWidth(bool Vector
) const = 0;
1248 virtual unsigned getMinVectorRegisterBitWidth() = 0;
1249 virtual bool shouldMaximizeVectorBandwidth(bool OptSize
) const = 0;
1250 virtual unsigned getMinimumVF(unsigned ElemWidth
) const = 0;
1251 virtual bool shouldConsiderAddressTypePromotion(
1252 const Instruction
&I
, bool &AllowPromotionWithoutCommonHeader
) = 0;
1253 virtual unsigned getCacheLineSize() = 0;
1254 virtual llvm::Optional
<unsigned> getCacheSize(CacheLevel Level
) = 0;
1255 virtual llvm::Optional
<unsigned> getCacheAssociativity(CacheLevel Level
) = 0;
1256 virtual unsigned getPrefetchDistance() = 0;
1257 virtual unsigned getMinPrefetchStride() = 0;
1258 virtual unsigned getMaxPrefetchIterationsAhead() = 0;
1259 virtual unsigned getMaxInterleaveFactor(unsigned VF
) = 0;
1261 getArithmeticInstrCost(unsigned Opcode
, Type
*Ty
, OperandValueKind Opd1Info
,
1262 OperandValueKind Opd2Info
,
1263 OperandValueProperties Opd1PropInfo
,
1264 OperandValueProperties Opd2PropInfo
,
1265 ArrayRef
<const Value
*> Args
) = 0;
1266 virtual int getShuffleCost(ShuffleKind Kind
, Type
*Tp
, int Index
,
1268 virtual int getCastInstrCost(unsigned Opcode
, Type
*Dst
, Type
*Src
,
1269 const Instruction
*I
) = 0;
1270 virtual int getExtractWithExtendCost(unsigned Opcode
, Type
*Dst
,
1271 VectorType
*VecTy
, unsigned Index
) = 0;
1272 virtual int getCFInstrCost(unsigned Opcode
) = 0;
1273 virtual int getCmpSelInstrCost(unsigned Opcode
, Type
*ValTy
,
1274 Type
*CondTy
, const Instruction
*I
) = 0;
1275 virtual int getVectorInstrCost(unsigned Opcode
, Type
*Val
,
1276 unsigned Index
) = 0;
1277 virtual int getMemoryOpCost(unsigned Opcode
, Type
*Src
, unsigned Alignment
,
1278 unsigned AddressSpace
, const Instruction
*I
) = 0;
1279 virtual int getMaskedMemoryOpCost(unsigned Opcode
, Type
*Src
,
1281 unsigned AddressSpace
) = 0;
1282 virtual int getGatherScatterOpCost(unsigned Opcode
, Type
*DataTy
,
1283 Value
*Ptr
, bool VariableMask
,
1284 unsigned Alignment
) = 0;
1285 virtual int getInterleavedMemoryOpCost(unsigned Opcode
, Type
*VecTy
,
1287 ArrayRef
<unsigned> Indices
,
1289 unsigned AddressSpace
,
1290 bool UseMaskForCond
= false,
1291 bool UseMaskForGaps
= false) = 0;
1292 virtual int getArithmeticReductionCost(unsigned Opcode
, Type
*Ty
,
1293 bool IsPairwiseForm
) = 0;
1294 virtual int getMinMaxReductionCost(Type
*Ty
, Type
*CondTy
,
1295 bool IsPairwiseForm
, bool IsUnsigned
) = 0;
1296 virtual int getIntrinsicInstrCost(Intrinsic::ID ID
, Type
*RetTy
,
1297 ArrayRef
<Type
*> Tys
, FastMathFlags FMF
,
1298 unsigned ScalarizationCostPassed
) = 0;
1299 virtual int getIntrinsicInstrCost(Intrinsic::ID ID
, Type
*RetTy
,
1300 ArrayRef
<Value
*> Args
, FastMathFlags FMF
, unsigned VF
) = 0;
1301 virtual int getCallInstrCost(Function
*F
, Type
*RetTy
,
1302 ArrayRef
<Type
*> Tys
) = 0;
1303 virtual unsigned getNumberOfParts(Type
*Tp
) = 0;
1304 virtual int getAddressComputationCost(Type
*Ty
, ScalarEvolution
*SE
,
1305 const SCEV
*Ptr
) = 0;
1306 virtual unsigned getCostOfKeepingLiveOverCall(ArrayRef
<Type
*> Tys
) = 0;
1307 virtual bool getTgtMemIntrinsic(IntrinsicInst
*Inst
,
1308 MemIntrinsicInfo
&Info
) = 0;
1309 virtual unsigned getAtomicMemIntrinsicMaxElementSize() const = 0;
1310 virtual Value
*getOrCreateResultFromMemIntrinsic(IntrinsicInst
*Inst
,
1311 Type
*ExpectedType
) = 0;
1312 virtual Type
*getMemcpyLoopLoweringType(LLVMContext
&Context
, Value
*Length
,
1314 unsigned DestAlign
) const = 0;
1315 virtual void getMemcpyLoopResidualLoweringType(
1316 SmallVectorImpl
<Type
*> &OpsOut
, LLVMContext
&Context
,
1317 unsigned RemainingBytes
, unsigned SrcAlign
, unsigned DestAlign
) const = 0;
1318 virtual bool areInlineCompatible(const Function
*Caller
,
1319 const Function
*Callee
) const = 0;
1321 areFunctionArgsABICompatible(const Function
*Caller
, const Function
*Callee
,
1322 SmallPtrSetImpl
<Argument
*> &Args
) const = 0;
1323 virtual bool isIndexedLoadLegal(MemIndexedMode Mode
, Type
*Ty
) const = 0;
1324 virtual bool isIndexedStoreLegal(MemIndexedMode Mode
,Type
*Ty
) const = 0;
1325 virtual unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace
) const = 0;
1326 virtual bool isLegalToVectorizeLoad(LoadInst
*LI
) const = 0;
1327 virtual bool isLegalToVectorizeStore(StoreInst
*SI
) const = 0;
1328 virtual bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes
,
1330 unsigned AddrSpace
) const = 0;
1331 virtual bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes
,
1333 unsigned AddrSpace
) const = 0;
1334 virtual unsigned getLoadVectorFactor(unsigned VF
, unsigned LoadSize
,
1335 unsigned ChainSizeInBytes
,
1336 VectorType
*VecTy
) const = 0;
1337 virtual unsigned getStoreVectorFactor(unsigned VF
, unsigned StoreSize
,
1338 unsigned ChainSizeInBytes
,
1339 VectorType
*VecTy
) const = 0;
1340 virtual bool useReductionIntrinsic(unsigned Opcode
, Type
*Ty
,
1341 ReductionFlags
) const = 0;
1342 virtual bool shouldExpandReduction(const IntrinsicInst
*II
) const = 0;
1343 virtual unsigned getGISelRematGlobalCost() const = 0;
1344 virtual int getInstructionLatency(const Instruction
*I
) = 0;
1347 template <typename T
>
1348 class TargetTransformInfo::Model final
: public TargetTransformInfo::Concept
{
1352 Model(T Impl
) : Impl(std::move(Impl
)) {}
1353 ~Model() override
{}
1355 const DataLayout
&getDataLayout() const override
{
1356 return Impl
.getDataLayout();
1359 int getOperationCost(unsigned Opcode
, Type
*Ty
, Type
*OpTy
) override
{
1360 return Impl
.getOperationCost(Opcode
, Ty
, OpTy
);
1362 int getGEPCost(Type
*PointeeType
, const Value
*Ptr
,
1363 ArrayRef
<const Value
*> Operands
) override
{
1364 return Impl
.getGEPCost(PointeeType
, Ptr
, Operands
);
1366 int getExtCost(const Instruction
*I
, const Value
*Src
) override
{
1367 return Impl
.getExtCost(I
, Src
);
1369 int getCallCost(FunctionType
*FTy
, int NumArgs
, const User
*U
) override
{
1370 return Impl
.getCallCost(FTy
, NumArgs
, U
);
1372 int getCallCost(const Function
*F
, int NumArgs
, const User
*U
) override
{
1373 return Impl
.getCallCost(F
, NumArgs
, U
);
1375 int getCallCost(const Function
*F
,
1376 ArrayRef
<const Value
*> Arguments
, const User
*U
) override
{
1377 return Impl
.getCallCost(F
, Arguments
, U
);
1379 unsigned getInliningThresholdMultiplier() override
{
1380 return Impl
.getInliningThresholdMultiplier();
1382 int getInlinerVectorBonusPercent() override
{
1383 return Impl
.getInlinerVectorBonusPercent();
1385 int getIntrinsicCost(Intrinsic::ID IID
, Type
*RetTy
,
1386 ArrayRef
<Type
*> ParamTys
, const User
*U
= nullptr) override
{
1387 return Impl
.getIntrinsicCost(IID
, RetTy
, ParamTys
, U
);
1389 int getIntrinsicCost(Intrinsic::ID IID
, Type
*RetTy
,
1390 ArrayRef
<const Value
*> Arguments
,
1391 const User
*U
= nullptr) override
{
1392 return Impl
.getIntrinsicCost(IID
, RetTy
, Arguments
, U
);
1394 int getMemcpyCost(const Instruction
*I
) override
{
1395 return Impl
.getMemcpyCost(I
);
1397 int getUserCost(const User
*U
, ArrayRef
<const Value
*> Operands
) override
{
1398 return Impl
.getUserCost(U
, Operands
);
1400 bool hasBranchDivergence() override
{ return Impl
.hasBranchDivergence(); }
1401 bool isSourceOfDivergence(const Value
*V
) override
{
1402 return Impl
.isSourceOfDivergence(V
);
1405 bool isAlwaysUniform(const Value
*V
) override
{
1406 return Impl
.isAlwaysUniform(V
);
1409 unsigned getFlatAddressSpace() override
{
1410 return Impl
.getFlatAddressSpace();
1413 bool collectFlatAddressOperands(SmallVectorImpl
<int> &OpIndexes
,
1414 Intrinsic::ID IID
) const override
{
1415 return Impl
.collectFlatAddressOperands(OpIndexes
, IID
);
1418 bool rewriteIntrinsicWithAddressSpace(
1419 IntrinsicInst
*II
, Value
*OldV
, Value
*NewV
) const override
{
1420 return Impl
.rewriteIntrinsicWithAddressSpace(II
, OldV
, NewV
);
1423 bool isLoweredToCall(const Function
*F
) override
{
1424 return Impl
.isLoweredToCall(F
);
1426 void getUnrollingPreferences(Loop
*L
, ScalarEvolution
&SE
,
1427 UnrollingPreferences
&UP
) override
{
1428 return Impl
.getUnrollingPreferences(L
, SE
, UP
);
1430 bool isHardwareLoopProfitable(Loop
*L
, ScalarEvolution
&SE
,
1431 AssumptionCache
&AC
,
1432 TargetLibraryInfo
*LibInfo
,
1433 HardwareLoopInfo
&HWLoopInfo
) override
{
1434 return Impl
.isHardwareLoopProfitable(L
, SE
, AC
, LibInfo
, HWLoopInfo
);
1436 bool isLegalAddImmediate(int64_t Imm
) override
{
1437 return Impl
.isLegalAddImmediate(Imm
);
1439 bool isLegalICmpImmediate(int64_t Imm
) override
{
1440 return Impl
.isLegalICmpImmediate(Imm
);
1442 bool isLegalAddressingMode(Type
*Ty
, GlobalValue
*BaseGV
, int64_t BaseOffset
,
1443 bool HasBaseReg
, int64_t Scale
,
1445 Instruction
*I
) override
{
1446 return Impl
.isLegalAddressingMode(Ty
, BaseGV
, BaseOffset
, HasBaseReg
,
1447 Scale
, AddrSpace
, I
);
1449 bool isLSRCostLess(TargetTransformInfo::LSRCost
&C1
,
1450 TargetTransformInfo::LSRCost
&C2
) override
{
1451 return Impl
.isLSRCostLess(C1
, C2
);
1453 bool canMacroFuseCmp() override
{
1454 return Impl
.canMacroFuseCmp();
1456 bool canSaveCmp(Loop
*L
, BranchInst
**BI
,
1457 ScalarEvolution
*SE
,
1458 LoopInfo
*LI
, DominatorTree
*DT
, AssumptionCache
*AC
,
1459 TargetLibraryInfo
*LibInfo
) override
{
1460 return Impl
.canSaveCmp(L
, BI
, SE
, LI
, DT
, AC
, LibInfo
);
1462 bool shouldFavorPostInc() const override
{
1463 return Impl
.shouldFavorPostInc();
1465 bool shouldFavorBackedgeIndex(const Loop
*L
) const override
{
1466 return Impl
.shouldFavorBackedgeIndex(L
);
1468 bool isLegalMaskedStore(Type
*DataType
) override
{
1469 return Impl
.isLegalMaskedStore(DataType
);
1471 bool isLegalMaskedLoad(Type
*DataType
) override
{
1472 return Impl
.isLegalMaskedLoad(DataType
);
1474 bool isLegalNTStore(Type
*DataType
, llvm::Align Alignment
) override
{
1475 return Impl
.isLegalNTStore(DataType
, Alignment
);
1477 bool isLegalNTLoad(Type
*DataType
, llvm::Align Alignment
) override
{
1478 return Impl
.isLegalNTLoad(DataType
, Alignment
);
1480 bool isLegalMaskedScatter(Type
*DataType
) override
{
1481 return Impl
.isLegalMaskedScatter(DataType
);
1483 bool isLegalMaskedGather(Type
*DataType
) override
{
1484 return Impl
.isLegalMaskedGather(DataType
);
1486 bool isLegalMaskedCompressStore(Type
*DataType
) override
{
1487 return Impl
.isLegalMaskedCompressStore(DataType
);
1489 bool isLegalMaskedExpandLoad(Type
*DataType
) override
{
1490 return Impl
.isLegalMaskedExpandLoad(DataType
);
1492 bool hasDivRemOp(Type
*DataType
, bool IsSigned
) override
{
1493 return Impl
.hasDivRemOp(DataType
, IsSigned
);
1495 bool hasVolatileVariant(Instruction
*I
, unsigned AddrSpace
) override
{
1496 return Impl
.hasVolatileVariant(I
, AddrSpace
);
1498 bool prefersVectorizedAddressing() override
{
1499 return Impl
.prefersVectorizedAddressing();
1501 int getScalingFactorCost(Type
*Ty
, GlobalValue
*BaseGV
, int64_t BaseOffset
,
1502 bool HasBaseReg
, int64_t Scale
,
1503 unsigned AddrSpace
) override
{
1504 return Impl
.getScalingFactorCost(Ty
, BaseGV
, BaseOffset
, HasBaseReg
,
1507 bool LSRWithInstrQueries() override
{
1508 return Impl
.LSRWithInstrQueries();
1510 bool isTruncateFree(Type
*Ty1
, Type
*Ty2
) override
{
1511 return Impl
.isTruncateFree(Ty1
, Ty2
);
1513 bool isProfitableToHoist(Instruction
*I
) override
{
1514 return Impl
.isProfitableToHoist(I
);
1516 bool useAA() override
{ return Impl
.useAA(); }
1517 bool isTypeLegal(Type
*Ty
) override
{ return Impl
.isTypeLegal(Ty
); }
1518 bool shouldBuildLookupTables() override
{
1519 return Impl
.shouldBuildLookupTables();
1521 bool shouldBuildLookupTablesForConstant(Constant
*C
) override
{
1522 return Impl
.shouldBuildLookupTablesForConstant(C
);
1524 bool useColdCCForColdCall(Function
&F
) override
{
1525 return Impl
.useColdCCForColdCall(F
);
1528 unsigned getScalarizationOverhead(Type
*Ty
, bool Insert
,
1529 bool Extract
) override
{
1530 return Impl
.getScalarizationOverhead(Ty
, Insert
, Extract
);
1532 unsigned getOperandsScalarizationOverhead(ArrayRef
<const Value
*> Args
,
1533 unsigned VF
) override
{
1534 return Impl
.getOperandsScalarizationOverhead(Args
, VF
);
1537 bool supportsEfficientVectorElementLoadStore() override
{
1538 return Impl
.supportsEfficientVectorElementLoadStore();
1541 bool enableAggressiveInterleaving(bool LoopHasReductions
) override
{
1542 return Impl
.enableAggressiveInterleaving(LoopHasReductions
);
1544 MemCmpExpansionOptions
enableMemCmpExpansion(bool OptSize
,
1545 bool IsZeroCmp
) const override
{
1546 return Impl
.enableMemCmpExpansion(OptSize
, IsZeroCmp
);
1548 bool enableInterleavedAccessVectorization() override
{
1549 return Impl
.enableInterleavedAccessVectorization();
1551 bool enableMaskedInterleavedAccessVectorization() override
{
1552 return Impl
.enableMaskedInterleavedAccessVectorization();
1554 bool isFPVectorizationPotentiallyUnsafe() override
{
1555 return Impl
.isFPVectorizationPotentiallyUnsafe();
1557 bool allowsMisalignedMemoryAccesses(LLVMContext
&Context
,
1558 unsigned BitWidth
, unsigned AddressSpace
,
1559 unsigned Alignment
, bool *Fast
) override
{
1560 return Impl
.allowsMisalignedMemoryAccesses(Context
, BitWidth
, AddressSpace
,
1563 PopcntSupportKind
getPopcntSupport(unsigned IntTyWidthInBit
) override
{
1564 return Impl
.getPopcntSupport(IntTyWidthInBit
);
1566 bool haveFastSqrt(Type
*Ty
) override
{ return Impl
.haveFastSqrt(Ty
); }
1568 bool isFCmpOrdCheaperThanFCmpZero(Type
*Ty
) override
{
1569 return Impl
.isFCmpOrdCheaperThanFCmpZero(Ty
);
1572 int getFPOpCost(Type
*Ty
) override
{ return Impl
.getFPOpCost(Ty
); }
1574 int getIntImmCodeSizeCost(unsigned Opc
, unsigned Idx
, const APInt
&Imm
,
1575 Type
*Ty
) override
{
1576 return Impl
.getIntImmCodeSizeCost(Opc
, Idx
, Imm
, Ty
);
1578 int getIntImmCost(const APInt
&Imm
, Type
*Ty
) override
{
1579 return Impl
.getIntImmCost(Imm
, Ty
);
1581 int getIntImmCost(unsigned Opc
, unsigned Idx
, const APInt
&Imm
,
1582 Type
*Ty
) override
{
1583 return Impl
.getIntImmCost(Opc
, Idx
, Imm
, Ty
);
1585 int getIntImmCost(Intrinsic::ID IID
, unsigned Idx
, const APInt
&Imm
,
1586 Type
*Ty
) override
{
1587 return Impl
.getIntImmCost(IID
, Idx
, Imm
, Ty
);
1589 unsigned getNumberOfRegisters(bool Vector
) override
{
1590 return Impl
.getNumberOfRegisters(Vector
);
1592 unsigned getRegisterBitWidth(bool Vector
) const override
{
1593 return Impl
.getRegisterBitWidth(Vector
);
1595 unsigned getMinVectorRegisterBitWidth() override
{
1596 return Impl
.getMinVectorRegisterBitWidth();
1598 bool shouldMaximizeVectorBandwidth(bool OptSize
) const override
{
1599 return Impl
.shouldMaximizeVectorBandwidth(OptSize
);
1601 unsigned getMinimumVF(unsigned ElemWidth
) const override
{
1602 return Impl
.getMinimumVF(ElemWidth
);
1604 bool shouldConsiderAddressTypePromotion(
1605 const Instruction
&I
, bool &AllowPromotionWithoutCommonHeader
) override
{
1606 return Impl
.shouldConsiderAddressTypePromotion(
1607 I
, AllowPromotionWithoutCommonHeader
);
1609 unsigned getCacheLineSize() override
{
1610 return Impl
.getCacheLineSize();
1612 llvm::Optional
<unsigned> getCacheSize(CacheLevel Level
) override
{
1613 return Impl
.getCacheSize(Level
);
1615 llvm::Optional
<unsigned> getCacheAssociativity(CacheLevel Level
) override
{
1616 return Impl
.getCacheAssociativity(Level
);
1618 unsigned getPrefetchDistance() override
{ return Impl
.getPrefetchDistance(); }
1619 unsigned getMinPrefetchStride() override
{
1620 return Impl
.getMinPrefetchStride();
1622 unsigned getMaxPrefetchIterationsAhead() override
{
1623 return Impl
.getMaxPrefetchIterationsAhead();
1625 unsigned getMaxInterleaveFactor(unsigned VF
) override
{
1626 return Impl
.getMaxInterleaveFactor(VF
);
1628 unsigned getEstimatedNumberOfCaseClusters(const SwitchInst
&SI
,
1629 unsigned &JTSize
) override
{
1630 return Impl
.getEstimatedNumberOfCaseClusters(SI
, JTSize
);
1633 getArithmeticInstrCost(unsigned Opcode
, Type
*Ty
, OperandValueKind Opd1Info
,
1634 OperandValueKind Opd2Info
,
1635 OperandValueProperties Opd1PropInfo
,
1636 OperandValueProperties Opd2PropInfo
,
1637 ArrayRef
<const Value
*> Args
) override
{
1638 return Impl
.getArithmeticInstrCost(Opcode
, Ty
, Opd1Info
, Opd2Info
,
1639 Opd1PropInfo
, Opd2PropInfo
, Args
);
1641 int getShuffleCost(ShuffleKind Kind
, Type
*Tp
, int Index
,
1642 Type
*SubTp
) override
{
1643 return Impl
.getShuffleCost(Kind
, Tp
, Index
, SubTp
);
1645 int getCastInstrCost(unsigned Opcode
, Type
*Dst
, Type
*Src
,
1646 const Instruction
*I
) override
{
1647 return Impl
.getCastInstrCost(Opcode
, Dst
, Src
, I
);
1649 int getExtractWithExtendCost(unsigned Opcode
, Type
*Dst
, VectorType
*VecTy
,
1650 unsigned Index
) override
{
1651 return Impl
.getExtractWithExtendCost(Opcode
, Dst
, VecTy
, Index
);
1653 int getCFInstrCost(unsigned Opcode
) override
{
1654 return Impl
.getCFInstrCost(Opcode
);
1656 int getCmpSelInstrCost(unsigned Opcode
, Type
*ValTy
, Type
*CondTy
,
1657 const Instruction
*I
) override
{
1658 return Impl
.getCmpSelInstrCost(Opcode
, ValTy
, CondTy
, I
);
1660 int getVectorInstrCost(unsigned Opcode
, Type
*Val
, unsigned Index
) override
{
1661 return Impl
.getVectorInstrCost(Opcode
, Val
, Index
);
1663 int getMemoryOpCost(unsigned Opcode
, Type
*Src
, unsigned Alignment
,
1664 unsigned AddressSpace
, const Instruction
*I
) override
{
1665 return Impl
.getMemoryOpCost(Opcode
, Src
, Alignment
, AddressSpace
, I
);
1667 int getMaskedMemoryOpCost(unsigned Opcode
, Type
*Src
, unsigned Alignment
,
1668 unsigned AddressSpace
) override
{
1669 return Impl
.getMaskedMemoryOpCost(Opcode
, Src
, Alignment
, AddressSpace
);
1671 int getGatherScatterOpCost(unsigned Opcode
, Type
*DataTy
,
1672 Value
*Ptr
, bool VariableMask
,
1673 unsigned Alignment
) override
{
1674 return Impl
.getGatherScatterOpCost(Opcode
, DataTy
, Ptr
, VariableMask
,
1677 int getInterleavedMemoryOpCost(unsigned Opcode
, Type
*VecTy
, unsigned Factor
,
1678 ArrayRef
<unsigned> Indices
, unsigned Alignment
,
1679 unsigned AddressSpace
, bool UseMaskForCond
,
1680 bool UseMaskForGaps
) override
{
1681 return Impl
.getInterleavedMemoryOpCost(Opcode
, VecTy
, Factor
, Indices
,
1682 Alignment
, AddressSpace
,
1683 UseMaskForCond
, UseMaskForGaps
);
1685 int getArithmeticReductionCost(unsigned Opcode
, Type
*Ty
,
1686 bool IsPairwiseForm
) override
{
1687 return Impl
.getArithmeticReductionCost(Opcode
, Ty
, IsPairwiseForm
);
1689 int getMinMaxReductionCost(Type
*Ty
, Type
*CondTy
,
1690 bool IsPairwiseForm
, bool IsUnsigned
) override
{
1691 return Impl
.getMinMaxReductionCost(Ty
, CondTy
, IsPairwiseForm
, IsUnsigned
);
1693 int getIntrinsicInstrCost(Intrinsic::ID ID
, Type
*RetTy
, ArrayRef
<Type
*> Tys
,
1694 FastMathFlags FMF
, unsigned ScalarizationCostPassed
) override
{
1695 return Impl
.getIntrinsicInstrCost(ID
, RetTy
, Tys
, FMF
,
1696 ScalarizationCostPassed
);
1698 int getIntrinsicInstrCost(Intrinsic::ID ID
, Type
*RetTy
,
1699 ArrayRef
<Value
*> Args
, FastMathFlags FMF
, unsigned VF
) override
{
1700 return Impl
.getIntrinsicInstrCost(ID
, RetTy
, Args
, FMF
, VF
);
1702 int getCallInstrCost(Function
*F
, Type
*RetTy
,
1703 ArrayRef
<Type
*> Tys
) override
{
1704 return Impl
.getCallInstrCost(F
, RetTy
, Tys
);
1706 unsigned getNumberOfParts(Type
*Tp
) override
{
1707 return Impl
.getNumberOfParts(Tp
);
1709 int getAddressComputationCost(Type
*Ty
, ScalarEvolution
*SE
,
1710 const SCEV
*Ptr
) override
{
1711 return Impl
.getAddressComputationCost(Ty
, SE
, Ptr
);
1713 unsigned getCostOfKeepingLiveOverCall(ArrayRef
<Type
*> Tys
) override
{
1714 return Impl
.getCostOfKeepingLiveOverCall(Tys
);
1716 bool getTgtMemIntrinsic(IntrinsicInst
*Inst
,
1717 MemIntrinsicInfo
&Info
) override
{
1718 return Impl
.getTgtMemIntrinsic(Inst
, Info
);
1720 unsigned getAtomicMemIntrinsicMaxElementSize() const override
{
1721 return Impl
.getAtomicMemIntrinsicMaxElementSize();
1723 Value
*getOrCreateResultFromMemIntrinsic(IntrinsicInst
*Inst
,
1724 Type
*ExpectedType
) override
{
1725 return Impl
.getOrCreateResultFromMemIntrinsic(Inst
, ExpectedType
);
1727 Type
*getMemcpyLoopLoweringType(LLVMContext
&Context
, Value
*Length
,
1729 unsigned DestAlign
) const override
{
1730 return Impl
.getMemcpyLoopLoweringType(Context
, Length
, SrcAlign
, DestAlign
);
1732 void getMemcpyLoopResidualLoweringType(SmallVectorImpl
<Type
*> &OpsOut
,
1733 LLVMContext
&Context
,
1734 unsigned RemainingBytes
,
1736 unsigned DestAlign
) const override
{
1737 Impl
.getMemcpyLoopResidualLoweringType(OpsOut
, Context
, RemainingBytes
,
1738 SrcAlign
, DestAlign
);
1740 bool areInlineCompatible(const Function
*Caller
,
1741 const Function
*Callee
) const override
{
1742 return Impl
.areInlineCompatible(Caller
, Callee
);
1744 bool areFunctionArgsABICompatible(
1745 const Function
*Caller
, const Function
*Callee
,
1746 SmallPtrSetImpl
<Argument
*> &Args
) const override
{
1747 return Impl
.areFunctionArgsABICompatible(Caller
, Callee
, Args
);
1749 bool isIndexedLoadLegal(MemIndexedMode Mode
, Type
*Ty
) const override
{
1750 return Impl
.isIndexedLoadLegal(Mode
, Ty
, getDataLayout());
1752 bool isIndexedStoreLegal(MemIndexedMode Mode
, Type
*Ty
) const override
{
1753 return Impl
.isIndexedStoreLegal(Mode
, Ty
, getDataLayout());
1755 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace
) const override
{
1756 return Impl
.getLoadStoreVecRegBitWidth(AddrSpace
);
1758 bool isLegalToVectorizeLoad(LoadInst
*LI
) const override
{
1759 return Impl
.isLegalToVectorizeLoad(LI
);
1761 bool isLegalToVectorizeStore(StoreInst
*SI
) const override
{
1762 return Impl
.isLegalToVectorizeStore(SI
);
1764 bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes
,
1766 unsigned AddrSpace
) const override
{
1767 return Impl
.isLegalToVectorizeLoadChain(ChainSizeInBytes
, Alignment
,
1770 bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes
,
1772 unsigned AddrSpace
) const override
{
1773 return Impl
.isLegalToVectorizeStoreChain(ChainSizeInBytes
, Alignment
,
1776 unsigned getLoadVectorFactor(unsigned VF
, unsigned LoadSize
,
1777 unsigned ChainSizeInBytes
,
1778 VectorType
*VecTy
) const override
{
1779 return Impl
.getLoadVectorFactor(VF
, LoadSize
, ChainSizeInBytes
, VecTy
);
1781 unsigned getStoreVectorFactor(unsigned VF
, unsigned StoreSize
,
1782 unsigned ChainSizeInBytes
,
1783 VectorType
*VecTy
) const override
{
1784 return Impl
.getStoreVectorFactor(VF
, StoreSize
, ChainSizeInBytes
, VecTy
);
1786 bool useReductionIntrinsic(unsigned Opcode
, Type
*Ty
,
1787 ReductionFlags Flags
) const override
{
1788 return Impl
.useReductionIntrinsic(Opcode
, Ty
, Flags
);
1790 bool shouldExpandReduction(const IntrinsicInst
*II
) const override
{
1791 return Impl
.shouldExpandReduction(II
);
1794 unsigned getGISelRematGlobalCost() const override
{
1795 return Impl
.getGISelRematGlobalCost();
1798 int getInstructionLatency(const Instruction
*I
) override
{
1799 return Impl
.getInstructionLatency(I
);
1803 template <typename T
>
1804 TargetTransformInfo::TargetTransformInfo(T Impl
)
1805 : TTIImpl(new Model
<T
>(Impl
)) {}
1807 /// Analysis pass providing the \c TargetTransformInfo.
1809 /// The core idea of the TargetIRAnalysis is to expose an interface through
1810 /// which LLVM targets can analyze and provide information about the middle
1811 /// end's target-independent IR. This supports use cases such as target-aware
1812 /// cost modeling of IR constructs.
1814 /// This is a function analysis because much of the cost modeling for targets
1815 /// is done in a subtarget specific way and LLVM supports compiling different
1816 /// functions targeting different subtargets in order to support runtime
1817 /// dispatch according to the observed subtarget.
1818 class TargetIRAnalysis
: public AnalysisInfoMixin
<TargetIRAnalysis
> {
1820 typedef TargetTransformInfo Result
;
1822 /// Default construct a target IR analysis.
1824 /// This will use the module's datalayout to construct a baseline
1825 /// conservative TTI result.
1828 /// Construct an IR analysis pass around a target-provide callback.
1830 /// The callback will be called with a particular function for which the TTI
1831 /// is needed and must return a TTI object for that function.
1832 TargetIRAnalysis(std::function
<Result(const Function
&)> TTICallback
);
1834 // Value semantics. We spell out the constructors for MSVC.
1835 TargetIRAnalysis(const TargetIRAnalysis
&Arg
)
1836 : TTICallback(Arg
.TTICallback
) {}
1837 TargetIRAnalysis(TargetIRAnalysis
&&Arg
)
1838 : TTICallback(std::move(Arg
.TTICallback
)) {}
1839 TargetIRAnalysis
&operator=(const TargetIRAnalysis
&RHS
) {
1840 TTICallback
= RHS
.TTICallback
;
1843 TargetIRAnalysis
&operator=(TargetIRAnalysis
&&RHS
) {
1844 TTICallback
= std::move(RHS
.TTICallback
);
1848 Result
run(const Function
&F
, FunctionAnalysisManager
&);
1851 friend AnalysisInfoMixin
<TargetIRAnalysis
>;
1852 static AnalysisKey Key
;
1854 /// The callback used to produce a result.
1856 /// We use a completely opaque callback so that targets can provide whatever
1857 /// mechanism they desire for constructing the TTI for a given function.
1859 /// FIXME: Should we really use std::function? It's relatively inefficient.
1860 /// It might be possible to arrange for even stateful callbacks to outlive
1861 /// the analysis and thus use a function_ref which would be lighter weight.
1862 /// This may also be less error prone as the callback is likely to reference
1863 /// the external TargetMachine, and that reference needs to never dangle.
1864 std::function
<Result(const Function
&)> TTICallback
;
1866 /// Helper function used as the callback in the default constructor.
1867 static Result
getDefaultTTI(const Function
&F
);
1870 /// Wrapper pass for TargetTransformInfo.
1872 /// This pass can be constructed from a TTI object which it stores internally
1873 /// and is queried by passes.
1874 class TargetTransformInfoWrapperPass
: public ImmutablePass
{
1875 TargetIRAnalysis TIRA
;
1876 Optional
<TargetTransformInfo
> TTI
;
1878 virtual void anchor();
1883 /// We must provide a default constructor for the pass but it should
1886 /// Use the constructor below or call one of the creation routines.
1887 TargetTransformInfoWrapperPass();
1889 explicit TargetTransformInfoWrapperPass(TargetIRAnalysis TIRA
);
1891 TargetTransformInfo
&getTTI(const Function
&F
);
1894 /// Create an analysis pass wrapper around a TTI object.
1896 /// This analysis pass just holds the TTI instance and makes it available to
1898 ImmutablePass
*createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA
);
1900 } // End llvm namespace