include/llvm/CodeGen/Analysis.h

   1 //===- CodeGen/Analysis.h - CodeGen LLVM IR Analysis Utilities --*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file declares several CodeGen-specific LLVM IR analysis utilities.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #ifndef LLVM_CODEGEN_ANALYSIS_H
  14 #define LLVM_CODEGEN_ANALYSIS_H
  15
  16 #include "llvm/ADT/ArrayRef.h"
  17 #include "llvm/ADT/DenseMap.h"
  18 #include "llvm/ADT/SmallVector.h"
  19 #include "llvm/ADT/Triple.h"
  20 #include "llvm/CodeGen/ISDOpcodes.h"
  21 #include "llvm/IR/CallSite.h"
  22 #include "llvm/IR/InlineAsm.h"
  23 #include "llvm/IR/Instructions.h"
  24 #include "llvm/Support/CodeGen.h"
  25
  26 namespace llvm {
  27 class GlobalValue;
  28 class LLT;
  29 class MachineBasicBlock;
  30 class MachineFunction;
  31 class TargetLoweringBase;
  32 class TargetLowering;
  33 class TargetMachine;
  34 class SDNode;
  35 class SDValue;
  36 class SelectionDAG;
  37 struct EVT;
  38
  39 /// Compute the linearized index of a member in a nested
  40 /// aggregate/struct/array.
  41 ///
  42 /// Given an LLVM IR aggregate type and a sequence of insertvalue or
  43 /// extractvalue indices that identify a member, return the linearized index of
  44 /// the start of the member, i.e the number of element in memory before the
  45 /// sought one. This is disconnected from the number of bytes.
  46 ///
  47 /// \param Ty is the type indexed by \p Indices.
  48 /// \param Indices is an optional pointer in the indices list to the current
  49 /// index.
  50 /// \param IndicesEnd is the end of the indices list.
  51 /// \param CurIndex is the current index in the recursion.
  52 ///
  53 /// \returns \p CurIndex plus the linear index in \p Ty  the indices list.
  54 unsigned ComputeLinearIndex(Type *Ty,
  55                             const unsigned *Indices,
  56                             const unsigned *IndicesEnd,
  57                             unsigned CurIndex = 0);
  58
  59 inline unsigned ComputeLinearIndex(Type *Ty,
  60                                    ArrayRef<unsigned> Indices,
  61                                    unsigned CurIndex = 0) {
  62   return ComputeLinearIndex(Ty, Indices.begin(), Indices.end(), CurIndex);
  63 }
  64
  65 /// ComputeValueVTs - Given an LLVM IR type, compute a sequence of
  66 /// EVTs that represent all the individual underlying
  67 /// non-aggregate types that comprise it.
  68 ///
  69 /// If Offsets is non-null, it points to a vector to be filled in
  70 /// with the in-memory offsets of each of the individual values.
  71 ///
  72 void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty,
  73                      SmallVectorImpl<EVT> &ValueVTs,
  74                      SmallVectorImpl<uint64_t> *Offsets = nullptr,
  75                      uint64_t StartingOffset = 0);
  76
  77 /// Variant of ComputeValueVTs that also produces the memory VTs.
  78 void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty,
  79                      SmallVectorImpl<EVT> &ValueVTs,
  80                      SmallVectorImpl<EVT> *MemVTs,
  81                      SmallVectorImpl<uint64_t> *Offsets = nullptr,
  82                      uint64_t StartingOffset = 0);
  83
  84 /// computeValueLLTs - Given an LLVM IR type, compute a sequence of
  85 /// LLTs that represent all the individual underlying
  86 /// non-aggregate types that comprise it.
  87 ///
  88 /// If Offsets is non-null, it points to a vector to be filled in
  89 /// with the in-memory offsets of each of the individual values.
  90 ///
  91 void computeValueLLTs(const DataLayout &DL, Type &Ty,
  92                       SmallVectorImpl<LLT> &ValueTys,
  93                       SmallVectorImpl<uint64_t> *Offsets = nullptr,
  94                       uint64_t StartingOffset = 0);
  95
  96 /// ExtractTypeInfo - Returns the type info, possibly bitcast, encoded in V.
  97 GlobalValue *ExtractTypeInfo(Value *V);
  98
  99 /// hasInlineAsmMemConstraint - Return true if the inline asm instruction being
 100 /// processed uses a memory 'm' constraint.
 101 bool hasInlineAsmMemConstraint(InlineAsm::ConstraintInfoVector &CInfos,
 102                                const TargetLowering &TLI);
 103
 104 /// getFCmpCondCode - Return the ISD condition code corresponding to
 105 /// the given LLVM IR floating-point condition code.  This includes
 106 /// consideration of global floating-point math flags.
 107 ///
 108 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
 109
 110 /// getFCmpCodeWithoutNaN - Given an ISD condition code comparing floats,
 111 /// return the equivalent code if we're allowed to assume that NaNs won't occur.
 112 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
 113
 114 /// getICmpCondCode - Return the ISD condition code corresponding to
 115 /// the given LLVM IR integer condition code.
 116 ///
 117 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
 118
 119 /// Test if the given instruction is in a position to be optimized
 120 /// with a tail-call. This roughly means that it's in a block with
 121 /// a return and there's nothing that needs to be scheduled
 122 /// between it and the return.
 123 ///
 124 /// This function only tests target-independent requirements.
 125 bool isInTailCallPosition(ImmutableCallSite CS, const TargetMachine &TM);
 126
 127 /// Test if given that the input instruction is in the tail call position, if
 128 /// there is an attribute mismatch between the caller and the callee that will
 129 /// inhibit tail call optimizations.
 130 /// \p AllowDifferingSizes is an output parameter which, if forming a tail call
 131 /// is permitted, determines whether it's permitted only if the size of the
 132 /// caller's and callee's return types match exactly.
 133 bool attributesPermitTailCall(const Function *F, const Instruction *I,
 134                               const ReturnInst *Ret,
 135                               const TargetLoweringBase &TLI,
 136                               bool *AllowDifferingSizes = nullptr);
 137
 138 /// Test if given that the input instruction is in the tail call position if the
 139 /// return type or any attributes of the function will inhibit tail call
 140 /// optimization.
 141 bool returnTypeIsEligibleForTailCall(const Function *F, const Instruction *I,
 142                                      const ReturnInst *Ret,
 143                                      const TargetLoweringBase &TLI);
 144
 145 DenseMap<const MachineBasicBlock *, int>
 146 getEHScopeMembership(const MachineFunction &MF);
 147
 148 } // End llvm namespace
 149
 150 #endif