[ARM] Add support for MVE pre and post inc loads and stores
[llvm-core.git] / tools / llvm-exegesis / lib / BenchmarkCode.h
blob1976004c251a32b4e1546313edd1b7d966a35547
1 //===-- BenchmarkCode.h -----------------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_TOOLS_LLVM_EXEGESIS_BENCHMARKCODE_H
10 #define LLVM_TOOLS_LLVM_EXEGESIS_BENCHMARKCODE_H
12 #include "RegisterValue.h"
13 #include "llvm/MC/MCInst.h"
14 #include <string>
15 #include <vector>
17 namespace llvm {
18 namespace exegesis {
20 // A collection of instructions that are to be assembled, executed and measured.
21 struct BenchmarkCode {
22 // The sequence of instructions that are to be repeated.
23 std::vector<llvm::MCInst> Instructions;
25 // Before the code is executed some instructions are added to setup the
26 // registers initial values.
27 std::vector<RegisterValue> RegisterInitialValues;
29 // We also need to provide the registers that are live on entry for the
30 // assembler to generate proper prologue/epilogue.
31 std::vector<unsigned> LiveIns;
33 // Informations about how this configuration was built.
34 std::string Info;
37 } // namespace exegesis
38 } // namespace llvm
40 #endif // LLVM_TOOLS_LLVM_EXEGESIS_BENCHMARKCODE_H