[InstCombine] Signed saturation patterns
[llvm-core.git] / lib / Target / Mips / Mips16FrameLowering.cpp
blob5a2a916a6b7a113fb16f761ce71928fe753ffbf5
1 //===- Mips16FrameLowering.cpp - Mips16 Frame Information -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the Mips16 implementation of TargetFrameLowering class.
11 //===----------------------------------------------------------------------===//
13 #include "Mips16FrameLowering.h"
14 #include "MCTargetDesc/MipsBaseInfo.h"
15 #include "Mips16InstrInfo.h"
16 #include "MipsInstrInfo.h"
17 #include "MipsRegisterInfo.h"
18 #include "MipsSubtarget.h"
19 #include "llvm/ADT/BitVector.h"
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/CodeGen/MachineFrameInfo.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineInstr.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/DebugLoc.h"
27 #include "llvm/MC/MCContext.h"
28 #include "llvm/MC/MCDwarf.h"
29 #include "llvm/MC/MCRegisterInfo.h"
30 #include "llvm/MC/MachineLocation.h"
31 #include "llvm/Support/MathExtras.h"
32 #include "llvm/CodeGen/TargetFrameLowering.h"
33 #include <cassert>
34 #include <cstdint>
35 #include <vector>
37 using namespace llvm;
39 Mips16FrameLowering::Mips16FrameLowering(const MipsSubtarget &STI)
40 : MipsFrameLowering(STI, STI.getStackAlignment()) {}
42 void Mips16FrameLowering::emitPrologue(MachineFunction &MF,
43 MachineBasicBlock &MBB) const {
44 MachineFrameInfo &MFI = MF.getFrameInfo();
45 const Mips16InstrInfo &TII =
46 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
47 MachineBasicBlock::iterator MBBI = MBB.begin();
49 // Debug location must be unknown since the first debug location is used
50 // to determine the end of the prologue.
51 DebugLoc dl;
53 uint64_t StackSize = MFI.getStackSize();
55 // No need to allocate space on the stack.
56 if (StackSize == 0 && !MFI.adjustsStack()) return;
58 MachineModuleInfo &MMI = MF.getMMI();
59 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
61 // Adjust stack.
62 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
64 // emit ".cfi_def_cfa_offset StackSize"
65 unsigned CFIIndex = MF.addFrameInst(
66 MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize));
67 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
68 .addCFIIndex(CFIIndex);
70 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
72 if (!CSI.empty()) {
73 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
75 for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
76 E = CSI.end(); I != E; ++I) {
77 int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
78 unsigned Reg = I->getReg();
79 unsigned DReg = MRI->getDwarfRegNum(Reg, true);
80 unsigned CFIIndex = MF.addFrameInst(
81 MCCFIInstruction::createOffset(nullptr, DReg, Offset));
82 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
83 .addCFIIndex(CFIIndex);
86 if (hasFP(MF))
87 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
88 .addReg(Mips::SP).setMIFlag(MachineInstr::FrameSetup);
91 void Mips16FrameLowering::emitEpilogue(MachineFunction &MF,
92 MachineBasicBlock &MBB) const {
93 MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
94 MachineFrameInfo &MFI = MF.getFrameInfo();
95 const Mips16InstrInfo &TII =
96 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
97 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
98 uint64_t StackSize = MFI.getStackSize();
100 if (!StackSize)
101 return;
103 if (hasFP(MF))
104 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP)
105 .addReg(Mips::S0);
107 // Adjust stack.
108 // assumes stacksize multiple of 8
109 TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI);
112 bool Mips16FrameLowering::
113 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
114 MachineBasicBlock::iterator MI,
115 const std::vector<CalleeSavedInfo> &CSI,
116 const TargetRegisterInfo *TRI) const {
117 MachineFunction *MF = MBB.getParent();
120 // Registers RA, S0,S1 are the callee saved registers and they
121 // will be saved with the "save" instruction
122 // during emitPrologue
124 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
125 // Add the callee-saved register as live-in. Do not add if the register is
126 // RA and return address is taken, because it has already been added in
127 // method MipsTargetLowering::lowerRETURNADDR.
128 // It's killed at the spill, unless the register is RA and return address
129 // is taken.
130 unsigned Reg = CSI[i].getReg();
131 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA)
132 && MF->getFrameInfo().isReturnAddressTaken();
133 if (!IsRAAndRetAddrIsTaken)
134 MBB.addLiveIn(Reg);
137 return true;
140 bool Mips16FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
141 MachineBasicBlock::iterator MI,
142 std::vector<CalleeSavedInfo> &CSI,
143 const TargetRegisterInfo *TRI) const {
145 // Registers RA,S0,S1 are the callee saved registers and they will be restored
146 // with the restore instruction during emitEpilogue.
147 // We need to override this virtual function, otherwise llvm will try and
148 // restore the registers on it's on from the stack.
151 return true;
154 bool
155 Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
156 const MachineFrameInfo &MFI = MF.getFrameInfo();
157 // Reserve call frame if the size of the maximum call frame fits into 15-bit
158 // immediate field and there are no variable sized objects on the stack.
159 return isInt<15>(MFI.getMaxCallFrameSize()) && !MFI.hasVarSizedObjects();
162 void Mips16FrameLowering::determineCalleeSaves(MachineFunction &MF,
163 BitVector &SavedRegs,
164 RegScavenger *RS) const {
165 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
166 const Mips16InstrInfo &TII =
167 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
168 const MipsRegisterInfo &RI = TII.getRegisterInfo();
169 const BitVector Reserved = RI.getReservedRegs(MF);
170 bool SaveS2 = Reserved[Mips::S2];
171 if (SaveS2)
172 SavedRegs.set(Mips::S2);
173 if (hasFP(MF))
174 SavedRegs.set(Mips::S0);
177 const MipsFrameLowering *
178 llvm::createMips16FrameLowering(const MipsSubtarget &ST) {
179 return new Mips16FrameLowering(ST);