lib/Target/Mips/MipsRegisterInfo.h

   1 //===- MipsRegisterInfo.h - Mips Register Information Impl ------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file contains the Mips implementation of the TargetRegisterInfo class.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
  14 #define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
  15
  16 #include "Mips.h"
  17 #include "llvm/CodeGen/MachineBasicBlock.h"
  18 #include <cstdint>
  19
  20 #define GET_REGINFO_HEADER
  21 #include "MipsGenRegisterInfo.inc"
  22
  23 namespace llvm {
  24
  25 class TargetRegisterClass;
  26
  27 class MipsRegisterInfo : public MipsGenRegisterInfo {
  28 public:
  29   enum class MipsPtrClass {
  30     /// The default register class for integer values.
  31     Default = 0,
  32     /// The subset of registers permitted in certain microMIPS instructions
  33     /// such as lw16.
  34     GPR16MM = 1,
  35     /// The stack pointer only.
  36     StackPointer = 2,
  37     /// The global pointer only.
  38     GlobalPointer = 3,
  39   };
  40
  41   MipsRegisterInfo();
  42
  43   /// Get PIC indirect call register
  44   static unsigned getPICCallReg();
  45
  46   /// Code Generation virtual methods...
  47   const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
  48                                                 unsigned Kind) const override;
  49
  50   unsigned getRegPressureLimit(const TargetRegisterClass *RC,
  51                                MachineFunction &MF) const override;
  52   const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
  53   const uint32_t *getCallPreservedMask(const MachineFunction &MF,
  54                                        CallingConv::ID) const override;
  55   static const uint32_t *getMips16RetHelperMask();
  56
  57   BitVector getReservedRegs(const MachineFunction &MF) const override;
  58
  59   bool requiresRegisterScavenging(const MachineFunction &MF) const override;
  60
  61   bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
  62
  63   /// Stack Frame Processing Methods
  64   void eliminateFrameIndex(MachineBasicBlock::iterator II,
  65                            int SPAdj, unsigned FIOperandNum,
  66                            RegScavenger *RS = nullptr) const override;
  67
  68   // Stack realignment queries.
  69   bool canRealignStack(const MachineFunction &MF) const override;
  70
  71   /// Debug information queries.
  72   Register getFrameRegister(const MachineFunction &MF) const override;
  73
  74   /// Return GPR register class.
  75   virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
  76
  77 private:
  78   virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
  79                            int FrameIndex, uint64_t StackSize,
  80                            int64_t SPOffset) const = 0;
  81 };
  82
  83 } // end namespace llvm
  84
  85 #endif // LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H