1 ; RUN: llc < %s -mtriple=arm-eabi -mattr=+neon -mcpu=cortex-a9
5 define arm_aapcs_vfpcc void @foo(i8* nocapture %pBuffer, i32 %numItems) nounwind {
7 br i1 undef, label %return, label %bb.preheader
9 bb.preheader: ; preds = %entry
12 bb: ; preds = %bb, %bb.preheader
13 %0 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
14 %1 = insertelement <4 x float> %0, float undef, i32 1 ; <<4 x float>> [#uses=1]
15 %2 = insertelement <4 x float> %1, float undef, i32 2 ; <<4 x float>> [#uses=1]
16 %3 = insertelement <4 x float> %2, float undef, i32 3 ; <<4 x float>> [#uses=1]
17 %4 = fmul <4 x float> undef, %3 ; <<4 x float>> [#uses=1]
18 %5 = extractelement <4 x float> %4, i32 3 ; <float> [#uses=1]
19 store float %5, float* undef, align 4
20 br i1 undef, label %return, label %bb
22 return: ; preds = %bb, %entry
26 define arm_aapcs_vfpcc <4 x float> @bar(i8* nocapture %pBuffer, i32 %numItems) nounwind {
27 %1 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
28 %2 = insertelement <4 x float> %1, float undef, i32 1 ; <<4 x float>> [#uses=1]
29 %3 = insertelement <4 x float> %2, float undef, i32 2 ; <<4 x float>> [#uses=1]
30 %4 = insertelement <4 x float> %3, float undef, i32 3 ; <<4 x float>> [#uses=1]
31 %5 = shufflevector <4 x float> %4, <4 x float> undef, <2 x i32> <i32 0, i32 1> ; <<2 x float>> [#uses=1]
32 %6 = shufflevector <2 x float> %5, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x float>> [#uses=1]