1 ; RUN: llc -O0 -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s
2 ; RUN: llc -O0 -mtriple thumbv7-windows-msvc -filetype asm -o - %s | FileCheck %s
3 ; RUN: llc -O0 -mtriple thumbv7-windows-mingw32 -filetype asm -o - %s | FileCheck %s
5 declare arm_aapcs_vfpcc i32 @num_entries()
7 define arm_aapcs_vfpcc void @test___builtin_alloca() {
9 %array = alloca i8*, align 4
10 %call = call arm_aapcs_vfpcc i32 @num_entries()
11 %mul = mul i32 4, %call
12 %0 = alloca i8, i32 %mul
13 store i8* %0, i8** %array, align 4
17 ; CHECK: bl num_entries
18 ; Any register is actually valid here, but turns out we use lr,
19 ; because we do not have the kill flag on R0.
20 ; CHECK: movs [[R1:r1]], #7
21 ; CHECK: add.w [[R0:r[0-9]+]], [[R1]], [[R0]], lsl #2
22 ; CHECK: bic [[R0]], [[R0]], #4
23 ; CHECK: lsrs r4, [[R0]], #2
25 ; CHECK: sub.w sp, sp, r4