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[InstCombine] Signed saturation patterns
[llvm-core.git]
/
test
/
CodeGen
/
Generic
/
i128-arith.ll
blob
cf10463143c9c8e9cf73181565182316494aba5e
1
; RUN: llc < %s
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define i64 @foo(i64 %x, i64 %y, i32 %amt) {
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%tmp0 = zext i64 %x to i128
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%tmp1 = sext i64 %y to i128
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%tmp2 = or i128 %tmp0, %tmp1
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%tmp7 = zext i32 13 to i128
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%tmp3 = lshr i128 %tmp2, %tmp7
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%tmp4 = trunc i128 %tmp3 to i64
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ret i64 %tmp4
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}