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[InstCombine] Signed saturation patterns
[llvm-core.git]
/
test
/
CodeGen
/
RISCV
/
align.ll
blob
f044f3bb156a41080735b6672e88214aae1c1632
1
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=RV32I
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; RUN: llc -mtriple=riscv32 -mattr=+c -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=RV32C
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define void @foo() {
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;RV32I: .p2align 2
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;RV32I: foo:
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;RV32C: .p2align 1
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;RV32C: foo:
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entry:
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ret void
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}