1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=i686-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
6 source_filename = "srem.ll"
7 target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
8 target triple = "i386--linux-gnu"
10 define i8 @test_srem_i8(i8 %arg1, i8 %arg2) {
11 %res = srem i8 %arg1, %arg2
15 define i16 @test_srem_i16(i16 %arg1, i16 %arg2) {
16 %res = srem i16 %arg1, %arg2
20 define i32 @test_srem_i32(i32 %arg1, i32 %arg2) {
21 %res = srem i32 %arg1, %arg2
29 exposesReturnsTwice: false
31 regBankSelected: false
34 tracksRegLiveness: true
36 - { id: 0, class: _, preferred-register: '' }
37 - { id: 1, class: _, preferred-register: '' }
38 - { id: 2, class: _, preferred-register: '' }
39 - { id: 3, class: _, preferred-register: '' }
40 - { id: 4, class: _, preferred-register: '' }
43 isFrameAddressTaken: false
44 isReturnAddressTaken: false
53 maxCallFrameSize: 4294967295
54 hasOpaqueSPAdjustment: false
56 hasMustTailInVarArgFunc: false
61 - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: default,
62 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
63 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
64 - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: default,
65 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
66 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
71 ; CHECK-LABEL: name: test_srem_i8
72 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
73 ; CHECK: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load 1 from %fixed-stack.0, align 16)
74 ; CHECK: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
75 ; CHECK: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load 1 from %fixed-stack.1, align 4)
76 ; CHECK: [[SREM:%[0-9]+]]:_(s8) = G_SREM [[LOAD]], [[LOAD1]]
77 ; CHECK: $al = COPY [[SREM]](s8)
78 ; CHECK: RET 0, implicit $al
79 %2:_(p0) = G_FRAME_INDEX %fixed-stack.1
80 %0:_(s8) = G_LOAD %2(p0) :: (invariant load 1 from %fixed-stack.1, align 16)
81 %3:_(p0) = G_FRAME_INDEX %fixed-stack.0
82 %1:_(s8) = G_LOAD %3(p0) :: (invariant load 1 from %fixed-stack.0, align 4)
83 %4:_(s8) = G_SREM %0, %1
91 exposesReturnsTwice: false
93 regBankSelected: false
96 tracksRegLiveness: true
98 - { id: 0, class: _, preferred-register: '' }
99 - { id: 1, class: _, preferred-register: '' }
100 - { id: 2, class: _, preferred-register: '' }
101 - { id: 3, class: _, preferred-register: '' }
102 - { id: 4, class: _, preferred-register: '' }
105 isFrameAddressTaken: false
106 isReturnAddressTaken: false
115 maxCallFrameSize: 4294967295
116 hasOpaqueSPAdjustment: false
118 hasMustTailInVarArgFunc: false
123 - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: default,
124 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
125 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
126 - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: default,
127 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
128 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
133 ; CHECK-LABEL: name: test_srem_i16
134 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
135 ; CHECK: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load 2 from %fixed-stack.0, align 16)
136 ; CHECK: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
137 ; CHECK: [[LOAD1:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load 2 from %fixed-stack.1, align 4)
138 ; CHECK: [[SREM:%[0-9]+]]:_(s16) = G_SREM [[LOAD]], [[LOAD1]]
139 ; CHECK: $ax = COPY [[SREM]](s16)
140 ; CHECK: RET 0, implicit $ax
141 %2:_(p0) = G_FRAME_INDEX %fixed-stack.1
142 %0:_(s16) = G_LOAD %2(p0) :: (invariant load 2 from %fixed-stack.1, align 16)
143 %3:_(p0) = G_FRAME_INDEX %fixed-stack.0
144 %1:_(s16) = G_LOAD %3(p0) :: (invariant load 2 from %fixed-stack.0, align 4)
145 %4:_(s16) = G_SREM %0, %1
153 exposesReturnsTwice: false
155 regBankSelected: false
158 tracksRegLiveness: true
160 - { id: 0, class: _, preferred-register: '' }
161 - { id: 1, class: _, preferred-register: '' }
162 - { id: 2, class: _, preferred-register: '' }
163 - { id: 3, class: _, preferred-register: '' }
164 - { id: 4, class: _, preferred-register: '' }
167 isFrameAddressTaken: false
168 isReturnAddressTaken: false
177 maxCallFrameSize: 4294967295
178 hasOpaqueSPAdjustment: false
180 hasMustTailInVarArgFunc: false
185 - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
186 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
187 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
188 - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
189 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
190 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
195 ; CHECK-LABEL: name: test_srem_i32
196 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
197 ; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load 4 from %fixed-stack.0, align 16)
198 ; CHECK: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
199 ; CHECK: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load 4 from %fixed-stack.1)
200 ; CHECK: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[LOAD]], [[LOAD1]]
201 ; CHECK: $eax = COPY [[SREM]](s32)
202 ; CHECK: RET 0, implicit $eax
203 %2:_(p0) = G_FRAME_INDEX %fixed-stack.1
204 %0:_(s32) = G_LOAD %2(p0) :: (invariant load 4 from %fixed-stack.1, align 16)
205 %3:_(p0) = G_FRAME_INDEX %fixed-stack.0
206 %1:_(s32) = G_LOAD %3(p0) :: (invariant load 4 from %fixed-stack.0, align 4)
207 %4:_(s32) = G_SREM %0, %1